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from 9d5dbf706ad MIPS: Adjust mips16e2 related tests for ifcvt costing changes new 0af87afb3fd RISC-V:Add float16 tuple type support
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Summary of changes: gcc/config/riscv/genrvv-type-indexer.cc | 3 -- gcc/config/riscv/riscv-modes.def | 15 ++++++ gcc/config/riscv/riscv-vector-builtins-types.def | 25 +++++++++ gcc/config/riscv/riscv-vector-builtins.def | 30 +++++++++++ gcc/config/riscv/riscv-vector-switch.def | 32 ++++++++++++ gcc/config/riscv/riscv.md | 5 ++ gcc/config/riscv/vector-iterators.md | 37 ++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/tuple-28.c | 59 ++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/tuple-29.c | 59 ++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/tuple-30.c | 58 +++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/tuple-31.c | 30 +++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/tuple-32.c | 16 ++++++ 12 files changed, 366 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-28.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-29.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-30.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-31.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/tuple-32.c