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from d9b5db8 [3/4] ARMv8.2-A testsuite for new vector intrinsics new ade2e45 [4/4] ARMv8.2-A testsuite for new scalar intrinsics
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Summary of changes: gcc/testsuite/ChangeLog | 62 +++++++++ .../aarch64/advsimd-intrinsics/unary_scalar_op.inc | 1 + .../aarch64/advsimd-intrinsics/vabdh_f16_1.c | 44 +++++++ .../aarch64/advsimd-intrinsics/vcageh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcagth_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcaleh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcalth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vceqh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vceqzh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcgeh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgezh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcgtzh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcleh_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vclezh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vclth_f16_1.c | 22 ++++ .../aarch64/advsimd-intrinsics/vcltzh_f16_1.c | 21 +++ .../aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c | 25 ++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c | 46 +++++++ .../aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c | 29 +++++ .../aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c | 23 ++++ .../aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c | 143 +++++++++++++++++++++ .../aarch64/advsimd-intrinsics/vmaxh_f16_1.c | 34 +++++ .../aarch64/advsimd-intrinsics/vminh_f16_1.c | 34 +++++ .../aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c | 90 +++++++++++++ .../aarch64/advsimd-intrinsics/vmulxh_f16_1.c | 50 +++++++ .../aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c | 91 +++++++++++++ .../aarch64/advsimd-intrinsics/vrecpeh_f16_1.c | 42 ++++++ .../aarch64/advsimd-intrinsics/vrecpsh_f16_1.c | 50 +++++++ .../aarch64/advsimd-intrinsics/vrecpxh_f16_1.c | 32 +++++ .../aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c | 30 +++++ .../aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c | 50 +++++++ 60 files changed, 1916 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c