[Tcwg-commits] [llvm] branch stable updated (8fa03b95380 -> a623298d4f7)

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from 8fa03b95380 Updating branches/google/stable to r305862 adds 16d0f5a96b8 Add a cantFail overload for Expected-reference (Expected<T& [...] adds 7188ced7552 clang-format a region. adds f8a3ad7e76c Updated llvm-objdump with Mach-O files and the -objc-meta-d [...] adds 84fac2c58cd [NewGVN] Fix a bug that made the store verifier less effective. adds 608be862ffd [ImplicitNullChecks] Uphold an invariant in areMemoryOpsAliased adds e479ac85d5b [XRay] Reduce synthetic references emitted by XRay adds 6716382e29a Simplify test. adds a0c83f81b9b [SCEV] Make MulOpsInlineThreshold lower to avoid excessive [...] adds 415c6676800 [DAGCombiner] Add another combine from build vector to shuffle adds 0f194333896 [AArch64] Preserve register flags when promoting a load fro [...] adds 7ff8af4ed89 [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions adds 829442ad48c Use range-loop in machine-scheduler. NFCI. adds 1f165906bb1 [MIPS] Fix for selecting of DINS/INS instruction adds 3b3d0f0cd3f [AArch64] Add early exit to promoteLoadFromStore. adds 84aab6f9f06 [Support] Add RetryAfterSignal helper function adds 39ca2eff5a9 [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. adds 7ce729b0708 Fix build after r305892 adds f2d422d498a [X86] Rerun the update_llc_test_checks tool on test. NFC. adds 1fa0c45640a [X86][SSE] Add SSE2/SSE42 shuffle truncation tests adds 9bb17187e1b [X86][AVX] Add AVX1 shuffle truncation tests adds 1c0fdaa2c23 [X86][SSE] Dropped -mcpu from variable shuffle tests adds 01a84a7c0e0 [X86][SSE] Dropped -mcpu from vector zero extend tests adds 5313649a34b [X86][SSE] Dropped -mcpu from vector shuffle tests adds 158809ea074 [X86][SSE] Dropped -mcpu from vector blend shuffle tests an [...] adds 8b6d662c93b [X86][SSE] Regenerate merge store tests adds 2f102b02670 [X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests adds e5be7e365ae [x86] fix formatting; NFC adds a03e7679c5f [AMDGPU][MC] Corrected V_*QSAD* instructions to check that [...] adds a110a35ffd0 [X86][SSE] Dropped -mcpu from 256-bit vector shuffle tests adds 24058c71a93 [DAG] Remove Node csonstruction from BaseIndexOffset match. NFCI. adds 6c84300fb5e [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. adds 833be198cd0 ClangFormat some changes from r305226 adds 34e56f0bf74 [DAG] Move BaseIndexOffset into separate Libarary. NFC. adds 80514214e1f [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix dis [...] adds e44557f0194 [Reassociate] Support xor reassociating for splat vectors adds f2fe26d60eb [InstCombine] Don't let folding (select (icmp eq (and X, C1 [...] adds ebc007dabbe [InstCombine] Add range metadata to cttz/ctlz/ctpop intrins [...] adds 2c60ba89439 [x86] set the datalayout to match the RUN line triple; NFC adds acaf7916965 [PowerPC] define target hook isReallyTriviallyReMaterializable() adds 41428eb757c [PDB] Add symbols to the PDB adds 5f67a41bab1 Do not inline recursive direct calls in sample loader pass. adds 8c9101fe001 [CGP] fix variables to be unsigned in memcmp expansion adds d8cbb8e87ac [CGP, memcmp] replace CreateZextOrTrunc with CreateZext bec [...] adds dc07e63ced8 Object: Have the irsymtab builder take a string table build [...] adds 52ebe03cb0a [BasicAA] Use MayAlias instead of PartialAlias for fallback. adds 4c34d0afe1f Add a "probe-stack" attribute adds 0adc85d83fe [InstCombine] Cleanup using commutable matchers. Make a cou [...] adds 0773a82c471 [Hexagon] Handle more types of immediate operands in expand [...] adds b9c4ad20bf3 [DWARF] Support for DW_FORM_strx3 and complete support for [...] adds 19b0aab37a7 [Reassociate] Const correct a helper function. NFC adds eef2a1e7890 [Reassociate] Use early returns in a couple places to reduc [...] adds 7c6b4748073 [Solaris] emit .init_array instead of .ctors on Solaris (Sp [...] adds 267d13eb839 [Target] Implement the ".rdata" MIPS assembly directive. adds 9500616f97a [Target/Mips] Add test associated with r305949. adds a625ee45de2 Add Aarch64 ldst-opt test. adds 5a11c6711d5 Rename WinCOFFStreamer.cpp -> MCWinCOFFStreamer.cpp adds 225f28a6dba [Hexagon] Use MachineInstrBuilder instead of changing instr [...] adds 998914d3010 Enable vectorizer-maximize-bandwidth by default. adds 52c64527391 TableGen.cmake: Use DEPFILE for Ninja Generator with CMake>=3.7. adds 1a1f5442634 [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc adds b209206d2ce Mark dump() methods as const. NFC adds 6189e647397 [AMDGPU] Combine add and adde, sub and sube adds d0b66dbf40b [codeview] respect signedness of APSInts when printing to YAML adds 91f66751eba Fix build. adds bb561ec0608 Use a MutableArrayRef. NFC. adds dfaebc43c98 [ProfileData, Support] Fix some Clang-tidy modernize-use-us [...] adds 91cd127b898 [AMDGPU] Add FP_CLASS to the add/setcc combine adds 4f724efaa6a [WebAssembly] Cleanup WasmObjectWriter.cpp. NFC adds 05a4b44a1bc Revert "[Target] Implement the ".rdata" MIPS assembly directive." adds 2eeaae37a51 Also test thumb. adds 42bbb7fb323 [wasm] Fix WebAssembly asm backend after r305968 adds 367f21dc721 [llvm-readobj] Dump the COFF image load config adds 9afae179994 [PowerPC] fix potential verification errors adds e696366e67b [InstCombine] Add test cases to demonstrate that and->xnor [...] adds e88fc4046f7 [AMDGPU] SDWA: add support for GFX9 in peephole pass adds 347e991ccaf AVX-512: Lowering Masked Gather intrinsic - fixed a bug adds 7ebe2a28312 [ARM] Add macro fusion for AES instructions. adds 54b8b993d17 [GlobalISel][X86] Support vector type G_INSERT legalization [...] adds e36adbda884 Revert "Enable vectorizer-maximize-bandwidth by default." adds 943dd9a9fee [ARM] Clean up choice of narrow instructions in ARMAsmParser, NFC adds e001a156b8d [ARM] Add .w aliases of MOV with shifted operand adds 5ffaf3e12f2 Test commit adds 00619943f09 [mips] Implement the ".rdata" MIPS assembly directive. adds 9410186031e [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocati [...] adds bfafbd5fbf8 Don't conditionalize Neon instructions, even in IT blocks. adds 1f2bcd710fe [AMDGPU] SDWA: remove support for VOP2 instructions that ha [...] adds 7cbb839d2be Revert [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST r [...] adds 841b888a685 [Testing/Support] Remove the const_cast in TakeExpected adds fb1808c2544 [Solaris] replace Solaris.h hack with a set of better hacks adds fc01a4a7c8b [Support] Fix return type deduction in RetryAfterSignal adds 7e5eff00e0c [Hexagon] Recognize potential offset overflow for store-imm [...] adds 2dfb7e4fe8b Revert "[Support] Add RetryAfterSignal helper function" and [...] adds 9bd0f56ab3e [DAG] Add Target Store Merge pass ordering function adds 27bff2421e4 [mips] Allow $AT to be used as a register name adds e8033d703b7 [InstCombine] add peekThroughBitcast() helper; NFC adds bd91b7fe65a [ARM] Create relocations for beq.w branches to ARM function syms. adds 3a93e4af816 [X86] Add support for "probe-stack" attribute adds 4c45e36dd83 [InstCombine] reverse bitcast + bitwise-logic canonicalizat [...] adds 52e734792d8 [Hexagon] Handle a global operand to A2_addi when creating [...] adds b776efaa09f [InstCombine] Add one use checks to or/and->xnor folding adds 8c8509b508f [ThinLTO] Remove unnecessary include of Linker.h (NFC) adds bba5503eed7 [InstCombine] Teach foldSelectICmpAndOr to recognize (selec [...] adds 5715184cc4c [Hexagon] Fix typo in a testcase adds dad6e61ce7f [AMDGPU] Add intrinsics for tbuffer load and store adds ea114fd5191 [x86] add tests for select --> sbb transform; NFC adds 9066575ebea [AMDGPU] Add intrinsics for tbuffer load and store - build [...] adds 6f1c76b0b9f Add a common error checking for some invalid expressions. adds 96e8b4cb368 Updated llvm-objdump symbolic disassembly with x86_64 Mach- [...] adds d9802349026 Silence warnings about hidden virtual methods. adds ff51fdebece MC: Fix dumping of MCFragment values adds dc0e67d2a5e [x86] add/sub (X==0) --> sbb(neg X) adds b841963b254 Make IPDBSession::getGlobalScope a non-const method adds dba69154c2c Add IDs and clone methods to NativeRawSymbol adds e23fe9c902c Fix build break by using llvm::make_unique instead of std:: [...] adds 6de0dc01efd [BasicAA] Add type check and Value equality check around co [...] adds e6b75a9bee0 [MC] Fix const qualifier warning adds bf84e2cbee8 Updated llvm-objdump for arm64 Mach-O MH_KEXT_BUNDLE file t [...] adds d40aee4db00 [AVX-512] Remove and autoupgrade the masked integer compare [...] adds 980c01094a3 [LoopDeletion] Update exits correctly when multiple duplica [...] adds 7eb15c6d33b Simplify WinCOFFObjectWriter::recordRelocation. adds cc350332fc3 [Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux adds 0895032e6e1 [llvm-pdbutil] Rename "raw" to "dump". adds 08bb54f87ba [llvm-pdbutil] Create a "bytes" subcommand. adds 130b76bf336 [MC] Allow assembling .secidx and .secrel32 for undefined symbols adds 08ef6db9916 [ORC] Switch the object layer API from addObjectSet to addO [...] adds b03a7e10d51 [Hexagon] Properly update kill flags in HexagonNewValueJump adds 3f3e2c4f631 [WebAssembly] WebAssemblyFastISel getelementptr variable in [...] adds 14b319c4ea9 Fix modular build adds a5245c1109c [ORC] Expose a typedef in RTDyldObjectLinkingLayer. adds f2891bee471 Change creation of relative relocations on COFF. adds d6dbca43aa5 [x86] add more tests for select --> sbb transform; NFC adds e1ae008085f Remove the LoadCombine pass. It was never enabled and is un [...] adds e83d2eccefb Supported lowerInterleavedStore() in X86InterleavedAccess. adds e4b1890fdaf Define behavior of "stack-probe-size" attribute when inlining. adds c539eea7c6d Restrict the definition of loop preheader to avoid EH blocks adds ac12e1602f7 [x86] add/sub (X==0) --> sbb(cmp X, 1) adds c9d5a52ac18 Fixed a (product) build error that was due to an unused variable adds 9c13e87ea8c [LVI] Teach LVI to reason about ORs of icmps similar to how [...] adds d4771b8a21f COFF: handle "undef - ." expressions. adds 455f8b7cda7 Make the test a bit more strict. NFC. adds 9dc2b94a11d [LoopSimplify] Factor the logic to form dedicated exits int [...] adds ef42908fbcd COFF: Produce an error on invalid pcrel relocs. adds d26da70a968 [JumpThreading] Use some temporary variables to reduce the [...] adds a98fd55665d [JumpThreading] Teach jump threading how to analyze (and (c [...] adds bc1000f7b06 [mips][msa] Splat.d endianness check adds f066646d1ff [X86][SSE] Dropped -mcpu from insertps tests adds 42345361c6f [mips] Fix register positions in the aui/daui instructions adds 44499d7a418 [ADT] Add llvm::to_float adds d5df6f8a70f [X86][SSE] Dropped -mcpu from scalar math tests adds 547bbfbdbdb Fix build breakage caused by r306096 adds 2d829cd8cbe Revert r306095: [mips] Fix reg positions in the aui/daui in [...] adds 2cfdb4aa6cc [InstCombine] Recognize and simplify three way comparison idioms adds d263a71f37d Fix double->float truncation warning on MSVC adds 5cb7c56962a [docs] As of binutils 2.21.51.0.2, ld.bfd supports plugins [...] adds 6ae9f209aa5 [X86][SSE] Dropped -mcpu from vector average tests adds 5b66dfbd506 [RuntimeLoopUnrolling] Rename exit block and move assert ea [...] adds a550fda1e69 [SystemZ] Fix trap issue and enable expensive checks. adds 47b190de86f [X86][AVX] Extended vector average tests adds 65b48742f40 [x86] rename test file and auto-generate complete checks; NFC adds 1963676fa16 [x86] remove overridden target settings in test; NFC adds 111d1b387d7 AMDGPU/GlobalISel: Mark 32-bit G_AND as legal adds c5596640da8 [x86] auto-generate complete checks; NFC adds 45dca99e22e [x86] auto-generate complete checks; NFC adds dd1f27e281a [SystemZ] Remove unnecessary serialization before volatile loads adds 910c8cc5329 [InlineCost] Do not take INT_MAX when Cost is negative adds 5e24d2fee2b GlobalISel: convert buildSequence to use non-deprecated ins [...] adds 7d0b44e1561 GlobalISel: remove G_SEQUENCE instruction. adds d9be98a70d9 Remove trailing whitespace. NFCI. adds 36e5ba3f322 Add a BinarySubstreamRef, and a method to read one. adds 1e5c31d7ad5 [Hexagon] Handle decreasing of stack alignment in frame lowering adds 5cc49a26453 Add a ThinLTO cache policy for controlling the maximum cach [...] adds 5974d48eea7 Make the size specification for cache_size_bytes case insensitive. adds 5a653c222d6 Fix a misleading indentation warning. adds cc9f39b3497 Regenerate extract-store.ll tests adds c7c5bca330a Fix Wdocumentation warning. adds 34c8eeb7921 [X86][AVX] Regenerate i256 bitcasted store test adds 243c5c12f5b [x86] fix value types for SBB transform (PR33560) adds 5c1e1168dc2 [Hexagon] Remove call to printAndVerify from HexagonPassConfig adds 35abb61d549 [llvm-pdbutil] Add a function for formatting MSF data. adds 2624197bc0d [X86] Fix SP adjustment in stack probes emitted on 32-bit Windows. adds 74854f14324 [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags c [...] adds 0804de030c4 Revert "[Hexagon] Handle decreasing of stack alignment in f [...] adds 87f3ec22f79 [llvm-pdbutil] Add the ability to dump raw bytes from the file. adds ddb4efa8b2b [opt-viewer] Remove positional arg checks (NFC) adds a77c3fdb212 [llvm-pdbutil] Dump raw bytes of pdb name map. adds 055ae721289 [llvm-pdbutil] Show what blocks a stream occupies. adds 5c4dd22e835 [CorrelatedValuePropagation] Remove comment about iterating [...] adds a8f03fad1f9 [CorrelatedValuePropagation] Fix typo in comment sense->since. NFC adds 7584e452e62 [APInt] Move the single word cases of countTrailingZeros an [...] adds 1a9610bd3ca [APInt] Use trailing bit counting methods instead of popula [...] adds c8bc59b0b33 [APInt] Make the single word cases of isMaxSignedValue/isMi [...] adds 93ca10c6fc0 [LoopDeletion] NFC: Move phi node value setting into prepass adds 309f49b92a1 Add bitcast store-merge test. adds 66f026bb25a [MSP430] Fix data layout string. adds 777bbb5e05c [llvm-pdbutil] Dump raw bytes of various DBI stream subsections. adds 48d560bf0c6 Revert "[LoopDeletion] NFC: Move phi node value setting int [...] adds a5b199883c2 [ORC] Move ORC IR layer interface from addModuleSet to addM [...] adds 5d2c9175233 [llvm-pdbutil] Dump raw bytes of type and id records. adds 6a1d3e987ba [ORC] Remove redundant semicolons from DEFINE_SIMPLE_CONVER [...] adds 84310abf197 [DebugInfo] Fix some Clang-tidy modernize-use-using and Inc [...] adds bebeb6f17e2 [AArch64][Falkor] Remove some non-existent opcodes from sch [...] adds d24edfe46ae [llvm-readobj] Fix COFF RVA table dumping bug adds b1a9f25ebf0 Reland r306095: [mips] Fix reg positions in the aui/daui in [...] adds 51e4b46c2c6 This reverts commit r306166 and r306168. adds 3d8b65f7124 ARM: move some logic from processFixupValue to applyFixup. adds 374592322d2 Move Value adjustment to applyFixup. NFC. adds 554302ac5bc [llvm-pdbutil] Dump raw bytes of module symbols and debug chunks. adds 72786af0ac8 [ORC] Re-apply r306166 and r306168 with fix for regression test. adds 8eec1b83586 Fix use of uninitialized value. adds bfb1e6dd81c Remove redundant argument. adds 39844e05bae [WebAssembly] Fix build after r306177 adds 5c10c248803 Update constants in complex-return test to prevent reductio [...] adds 2587e3ecef2 Make visible isDereferenceableAndAlignedPointer(..., const [...] adds 739f0de995b [InstCombine] Don't replace allocas with smaller globals adds 9210f44c094 Test commit: update my email adds a887b09351a [CODE_OWNERS] Add my other email address since my commits a [...] adds 82693db1503 Test the object file creation too. adds c88c3632e76 Add missing %s to RUN line. adds 3a48f331ba0 Remove a processFixupValue hack. adds 718bab77bef Add comments for OrderedInstruction. NFC adds 64b68b36f51 Simplify the processFixupValue interface. NFC. adds bd1a80dfb09 [Analysis][Transforms] Use commutable matchers instead of m [...] adds 5f53d1df702 [ValueTracking][InstCombine] Use m_Shr instead m_CombineOr( [...] adds 82dfc83ad0c [IR][AssumptionCache] Add m_Shift and m_BitwiseLogic matche [...] adds d68b29ae181 [IR] Remove BinOp2_match and replace its usage with the mor [...] adds 7f3bf01d637 Ensure backends available in 'opt' are also available in 'b [...] adds 059bd0e36ce [SelectionDAG] set dereferenceable flag when expanding memc [...] adds aa970efe79c fix trivial typos in comment, NFC adds d64f8eb85d7 fix trivial typos in comment, NFC adds a13c3598b68 Test commit adds 4ec00d2567b Another test commit adds 90c358f0e80 Another test commit adds 946178903d5 Still test commit adds 0d6b8a04493 Still debugging adds 0663649ed32 test commit adds 62a29da117c Remove test commit change. adds 472c4c70536 Another test commit adds 96479ada9c0 [IR] Implement commutable matchers without using combineOr adds 456b664433f [PatternMatch] Use ConstantFP::isNan instead of getting the [...] adds 5e4b09c56f6 [SCEV] Avoid copying ConstantRange just to get the min/max value adds f33ec6fb184 [Support] Don't use std::iterator, it's deprecated in C++17. adds 0a14fbb39c7 [PGO] Implementate profile counter regiser promotion adds e7f7e6d72a6 [pdb] Fix reading of llvm-generated PDBs by cvdump. adds 750feae3fa8 [PatternMatch] Just check if value is a Constant before cal [...] adds fc7d8c45e2e Add support for Ananas platform adds 65b3f67e1c4 [AVX2] [TTI CostModel] Add cost of interleaved loads/stores [...] adds 17d822b423d [GlobalISel][X86] Support vector type G_EXTRACT selection. adds 5b97b27fed3 [AST] Fix a bug in aliasesUnknownInst. Make sure we are com [...] adds e8c8f158500 AVX-512: Fixed a crash during legalization of <3 x i8> type adds 1e95676e58f [InstCombine] add (sext i1 X), 1 --> zext (not X) adds d33969c6c7b [X86] Add test case for PR15705 adds 90dbf3c8659 Strip trailing whitespace. NFCI. adds 61b5c7bb8be [X86][SSE] Remove unused memopfsf32_128/memopfsf64_128 scal [...] adds 37582000a6e [IR] Move repeated asserts in FCmpInst constructor to a hel [...] adds 0b2cfb74b61 [IR] Use isIntOrIntVectorTy instead of writing it out the l [...] adds 3ace6d8a954 [TableGen] Remove some copies around PatternToMatch. adds 6cf9acbae60 Revert "[LoopSimplify] Factor the logic to form dedicated e [...] adds dcc5fa654c7 [LoopDeletion] NFC: Move phi node value setting into prepass adds 82f1a7fc018 [MemDep] Cleanup return after else & use `auto`. NFC. adds 5999c342a6b [LoopSimplify] Improve a test for loop simplify minorly. NFC. adds e27904f6c7d [LoopSimplify] Re-instate r306081 with a bug fix w.r.t. ind [...] adds e9d67e46c29 fix various typos adds ec6175c524c AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling adds 92c7507eee3 AMDGPU: Whitespace fixes adds 5a057dc8edb [InstCombine] Factor the logic for propagating !nonnull and [...] adds 6eebd6c2746 [CFL-AA] Remove unneeded function declaration. NFCI. adds 0eb7237e753 [MBP] do not rotate loop if it creates extra branch adds 6d7e03aae93 fix trivial typo in comment, NFC adds 5be3ca82d98 [bugpoint] Do not initialize disassembler passes adds 330bfeddce5 This reverts commit r306272. adds 8edc5b1c77d [IR] Rename BinaryOperator::init to AssertOK and remove arg [...] adds 4ae836e7b47 [IfConversion] Hoist removeBranch calls out of if/else clau [...] adds 2e6fc83eac5 [llvm-stress] Ensure that the C++11 random device respects [...] adds 151f40dceae [llvm-stress] Remove Rand32 helper function adds b76f903b2e3 [X86][LLVM][test]Expanding Supports lowerInterleavedStore() [...] adds 018c368d384 [SystemZ] Add a check against zero before calling getTestU [...] adds ca59b915b5d [Hexagon] Handle cases when the aligned stack pointer is missing adds 8bfecccf46b [x86] transform vector inc/dec to use -1 constant (PR33483) adds 7c16260531d [llvm-stress] Add getRandom() helper that was going to be p [...] adds d71e04af3ae [X86] Add test case for PR15981 adds 8d3ca7cfeb8 AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal adds 699f4c431de [X86][AVX-512] Don't raise inexact in ceil, floor, round, trunc. adds 2db1a71f597 [inline asm] dot operator while using imm generates wrong i [...] adds 575411ebf86 [X86][SSE] Add combine tests for PMULDQ/PMULUDQ adds 18f8cae7668 [SystemZ] Fix missing emergency spill slot corner case adds 8ae15db2a4e [opt-viewer] Python 3 support in opt-stats.py adds 7226719a52d [llvm-pdbutil] Add a mode to `bytes` for dumping split debu [...] adds 69e4d36881e Replace trivial use of external rc.exe by writing our own . [...] adds 8e828b87b2d AMDGPU: Setup SP/FP in callee function prolog/epilog adds 71d7c09ce8b [GVN] Recommit the patch "Add phi-translate support in scalarpre". adds b988cd6c7f4 [X86][SSE] Check SSE2/SSE3 codegen tests on i686 and x86_64 adds fd770ea4979 [DWARF] NFC: Collect info used by DWARFFormValue into a helper. adds 6649090b224 AArch64: remove all kill flags when extending register liveness. adds d2381bc76f0 [DWARF] NFC: Give DwarfFormat a 1-byte base type. adds 05321d30b5e AArch64: legalize G_EXTRACT operations. adds 3a8fe655a52 [WebAssembly] Add more support for weak symbols adds faf416b5ae6 [LV] Changing the interface of ValueMap, NFC. adds fff93248d0f Add missing forward declaration. adds ab5d97fb870 RenameIndependentSubregs: Fix iterator problem adds e43cb60ea4e Fix the bug when handling shufflevector for aarch64. adds fd167cf907f Enable vectorizer-maximize-bandwidth by default. adds a31e3ee3045 [x86] add tests for missing sbb transforms; NFC adds bfc8711de97 reverting 306331. adds 1c3c1bee722 [Coverage] Improve readability by using a struct. NFC. adds ea42b4f0bdf [CodeGen] Fix some Clang-tidy modernize-use-using and Inclu [...] adds 74c2abe3c6c revert r306336 for breaking ppc test. adds ffee4824e9e DAGCombine: Make sure we only eliminate trunc/extend when t [...] adds 4d73d7ad46a [CFLAA] Change FunctionHandle to be common to Steensgaard's [...] adds 2ba26728be6 [CFLAA] Use raw pointers instead of Optional<Pointer>. NFC. adds ea254cbf8f0 ScheduleDAGInstrs: Fix fixupKills() adding too many kill flags. adds 477bd758b48 [SROA] Clean up a test case a bit prior to adding more test [...] adds 257136b174c [CFLAA] Move a common function to the header to reduce dupl [...] adds 8ff688d0554 [CFLAA] Move FunctionHandle to llvm::cflaa. adds 156cc49e505 [SROA] Further test cleanup and add a test for the actual p [...] adds 2a1334dd59a [AVR] Migrate to new MCAsmBackend applyFixup and processFixupValue adds 6309a52c0bc [InstCombine] Add test cases demonstrating that we don't op [...] adds 64cca8fa27a [COFF, ARM64] Fix typo in COFF ARM64 Relocation Type adds 1d9383cd849 [PowerPC] set optimization level in SelectionDAGISel adds 029ab41a287 [Reassociate] Make sure EraseInst sets MadeChange adds 025f924a12a Fixed the warning introduced by r306289 to make ubuntu-gcc7 [...] adds 5d353d47501 [GlobalISel][X86] Add fp32/62 legalizer, regbank-select, se [...] adds 1921b1c5edc [TableGen] Fix bug in TableGen CodeGenPatterns when adding [...] adds 7ca35760c51 AMDGPU: M0 operands to spill/restore opcodes are dead adds 9767b5aee61 Add missing forward declaraion. adds 7df06519765 [SROA] Fix PR32902 by more carefully propagating !nonnull m [...] adds 27952de6cae [PowerPC] fix incorrect processor name for -mcpu in a test case adds 84b5668c177 Recommitting 306331. adds 99b52fe13c3 [ARM] GlobalISel: Support G_SELECT for i32 adds 349de318a78 [mips] Refine the condition for when to use CALL16 vs a GOT [...] adds 3f723360abf [globalisel][tablegen] Add support for EXTRACT_SUBREG. adds 915fe39cd1d [X86][AVX512] Regenerate avx512 arithmetic tests adds a2474d43c4d [ARM] GlobalISel: Support G_SELECT for pointers adds 0df653a65ed fix trivial typos, NFC adds d954633ce29 Add missing include. Should fix modules libstdc++ builds. adds ae1022198b4 Recommitting rL305465 after fixing bug in TableGen in rL306 [...] adds 903642ae3c9 [SelectionDAG] set dereferenceable flag in MergeConsecutive [...] adds 962d3674b2d [mips] Add instruction aliases for ds(r|l)l. adds 383b68fd7f3 [LoopUnrollRuntime] Use SCEV exit count for calculating tri [...] adds 64db11515ac [AArch64] Update successor probabilities after ccmp-conversion adds 06ed4a14fdc [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions adds d88e02ecb78 Updated and extended the information about each instruction [...] adds 0c15ad3a8cd [JumpThreading] Add test case that was supposed to go with [...] adds 0c8e44ed166 [PatternMatch] Remove 64-bit or less restriction from m_Spe [...] adds 9896afe6bfb [DWARF] NFC: Make string-offset handling more like address- [...] adds f521444e805 Another test commit adds 5aa56b280d1 Change sort function used in tblgen to be strict weak ordering adds 5925f313086 [opt-viewer] Python 3 support in opt-diff.py adds d253a7278c8 Fix incorrect comment in machine-scheduler adds dd03b340423 [X86][AsmParser][MS-compatability] Binary/Unary operators e [...] adds e6fcc9052aa [InstCombine] Add test cases to show that we don't propagat [...] adds 423b99d0256 [InstCombine] Add test case demonstrating that we don't pro [...] adds 65340be3b40 [ProfData] Make the method threadsafe adds c02a794b926 Enable ICP for AutoFDO. adds 32f1f18b64d [InstCombine] canonicalize icmp predicate feeding select adds 41308c99e9a LiveRangeCalc: Slightly improve map usage; NFC adds 3d019d384a4 [Dominators] Use Semi-NCA instead of SLT to calculate dominators adds cfc8374c458 [CGP] add an IR builder to memcmp expansion class instead o [...] adds e2d935510ce [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0 adds 197bda66359 [SROA] Fix APInt size when alloca address space is not 0 adds d841eae40bb RenameIndependentSubregs: Fix infinite loop adds ecf693d5352 [Hexagon] Update kills in hexagon-nvj even more properly th [...] adds e764e24028a [AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc adds 3f92d751f7f [CodeExtractor] Prevent extraction of block involving blockaddress adds 040f338ab82 [AMDGPU] Add 2 new alignbit patterns adds 6891a99c365 [CGP] simplify code to get bswap in memcmp expansion; NFCI adds aa9b82348cb [Constants] Fix copy-pasto in llvm_unreachable message. NFC adds ea86c526fbd [InstCombine] Propagate nsw flag when turning mul by pow2 i [...] adds f4a2d1d749c [Hexagon] Use proper predicate register state when expandin [...] adds 49ab5d59922 [WebAssembly] Add data size and alignement to linking section adds 08da5c5be51 [WebAssembly] Add support for printing relocations with llv [...] adds 5cc4d23410a [AArch64] Performance enhancements for Cavium ThunderX2 T99 adds 3279867fcea [WebAssembly] Only run WebAssembly objdump tests if it is e [...] adds a432d58a0fe Create a PHI value when merging with a known undef live-in adds d1357b6fb27 Clean up a test case adds 96470fe7e99 GlobalISel: verify that a COPY is trivial when created. adds ca9df19568d [CGP] eliminate a sub instruction in memcmp expansion adds 01187b342a7 [Analysis] Fix some Clang-tidy modernize-use-using and Incl [...] adds c9d2291c968 re-commit r306336: Enable vectorizer-maximize-bandwidth by [...] adds c9c63328afd clang-format a file. adds 69d966c000a [GISel]: Add G_FEXP, G_FEXP2 opcodes adds 44e80299e51 [Analysis] Revert r306472 changes in LoopInfo headers to fi [...] adds 607969f748f [EarlyCSE][MemorySSA] Enable MemorySSA in function-simplifi [...] adds 240a1f8074a [AArch64] Inline callee if its target-features are a subset [...] adds 5af1d0751a2 GlobalISel: add some more sanity-checking to MachineInstrBu [...] adds ef9aa5a6ad7 [NewPM/Inliner] Reduce threshold for cold callsites in the [...] adds dbbccbae975 [CGP] add specialization for memcmp expansion with only one [...] adds 0293dd1939a Object: Add version and producer fields to the irsymtab hea [...] adds fdc12501773 Bitcode: Write the irsymtab to disk. adds a4799adf391 Object: Teach irsymtab::read() to try to use the irsymtab t [...] adds 85e09462670 [COFF, ARM64] Add support for Windows ARM64 COFF format adds 24b479ea290 Add missing library dependency. adds 59d9d429cca [TableGen] Improve Debug Output for --debug-only=subtarget- [...] adds fa84770d209 Inlining: Don't re-map simplified cloned instructions. adds 64a075b52c9 [DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI. adds a5e3faf5db8 Allow to truncate left shift with non-constant shift amount adds 8b38a13919b [AMDGPU] Add pattern for v_alignbit_b32 with immediate adds af639e8d6c4 Revert "[DAG] Fold FrameIndex offset into BaseIndexOffset a [...] adds 499abe30534 [IRCE][NFC] Better get SCEV for 1 in calculateSubRanges adds 215f133d738 Add missing library dependency to fix build break in llvm-lto2 adds 13501a8d08b [InstCombine] Add test case demonstrating that we don't han [...] adds 48aca4075c8 Revert r306508 "[InstCombine] Add test case demonstrating t [...] adds 7da83c803ef [InstCombine] Add test case demonstrating that we don't han [...] adds 75f572053a8 [ELF] - Add ability for DWARFContextInMemory to exit early [...] adds 61e059d1711 Revert r306512 "[ELF] - Add ability for DWARFContextInMemor [...] adds f41c3c92397 [ARM] Make -mcpu=generic schedule for an in-order core (Cor [...] adds c9c94f42b16 Recommit "[ELF] - Add ability for DWARFContextInMemory to e [...] adds 39b79bcf899 [DebugInfo] - Removed trailing whitespaces. NFC. adds cd701a90110 Add tests to document current InstCombine behavior for clam [...] adds 5b91c92a71b [InstCombine] Canonicalize clamp of float types to minmax i [...] adds 455327abba0 [ValueTracking] Enabling existing ValueTracking patch by default. adds 32d37d67203 [X86] Correct dwarf unwind information in function epilogue adds a06118f48b4 [X86][AVX2] Dropped -mcpu from avx2 arithmetic/intrinsics tests adds fd3c664b137 Reverting commit 306414 on behalf of @gadi.haber adds 31bb0eb5180 [GlobalISel][X86] Support bitwise operations : G_AND, G_OR, G_XOR adds f90583eadc7 Revert r306528 adds 79b4061151c [GlobalISel][X86] Test G_CONSTANT i32 0 TableGen'erated sel [...] adds 457765feeb5 Add zero-length check to memcpy/memset load store loop expansion adds 4459676489c Create inliner params based on size and opt levels. adds 3d557de741a [X86][LLVM][test]Expanding Supports lowerInterleavedStore() [...] adds 93efc10cbc8 [globalisel][tablegen] Multiple 80-col corrections. adds 234fff26f1c [X86][SSE] Dropped -mcpu from vector bswap tests adds 2a3af681117 [X86] Added BSWAP tests for illegal i64/i128/i256 'wide' sc [...] adds 5ae42c7d63a [ARM] Improve if-conversion for M-class CPUs without branch [...] adds fd486726d15 Don't repeat name in comments. 80 columns. NFC. adds fa3697c0b45 [AArch64] AArch64CondBrTuningPass generates wrong branch in [...] adds b0947d968f2 [globalisel][tablegen] Post-commit review nits for r306388. NFC adds d37294a1a29 Missed a check for UndefVI in r306466 adds 28b3f06e1a4 [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI. adds 56f2647d4a8 Don't repeat names and reformat. NFC. adds 7a4e530f9e9 Rangify loops, formatting changes, use bool instead of unsi [...] adds 8941512f5b8 [InstCombine] use local variable to reduce code; NFCI adds 741f2b25548 [Dominators] Move number to node mapping out of DominatorTreeBase adds 0dc8cf78dd9 [InstCombine] add tests for icmp with bswapped operands; NFC adds b6867d2be91 [LoopUnroll] Fix bug in computeUnrollCount causing it to no [...] adds c3ff98d125c Another test commit. adds aaafc05efeb Don't repeat name in comment and format. NFC. adds 881a07c421b [BBVectorize] Regenerate simple tests adds 662f95d0d6b [Dominators] Move InfoRec outside of DominatorTreeBase adds 641f2e122bf Fix PR33625. adds 52cfa7b1fb4 [Dominators] Move IDoms out of DominatorTreeBase and put th [...] adds 9a06b5298e5 [LV] Fix PR33613 - retain order of insertelement per part adds 370f3b8d453 [Dominators] Move SemiNCAInfo and helper functions out of D [...] adds 5f8077c6348 [InstCombine] Remove 64-bit bit width restriction from m_Co [...] adds d49ee75600c [BBVectorize][X86] Regenerate simple tests adds 59d4f7d763e [Dominators] Move helper functions into SemiNCAInfo adds 31c22b7d97b Reuse existing variable. NFC. adds 8b3a547eec0 [AArch64][Falkor] Try to avoid exhausting HW prefetcher res [...] adds 5383c7ced17 Break up long lines, NFC adds 4599a3a970c Reuse existing variables. NFC. adds f340eacb76f [AArch64][Falkor] Attempt to fix Windows buildbots adds d9e1a181d14 [AArch64] Make assert messages uniform and general [NFC] adds de55cfe3931 [InstCombine] add tests for icmp with bitreversed ops; NFC adds a143b4a4f33 Fold fneg and fabs like multiplications adds e6bc60b8355 Fix a typo. adds a898e97f001 [lit] Remove dead code (not referenced anywhere), and clari [...] adds c278dccfd0a AMDGPU: Remove SITypeRewriter adds 70e6b37768d Make OrderedInstructions and OrderedBasicBlock use Assertin [...] adds c1376f35734 Revert "Make OrderedInstructions and OrderedBasicBlock use [...] adds a39a2bd7c14 Introduce symbol cache to PDB NativeSession adds a4998402557 [NFC] Remove multiple semicolons adds 7caefab1703 [InstCombine] Retain TBAA when narrowing memory accesses adds bde81f144d6 [CodeView] Fix some Clang-tidy modernize-use-using and Incl [...] adds 01c9f8cd035 [InstCombine] In visitXor, use m_Not on the instruction its [...] adds b2489ffb462 Revert "Replace trivial use of external rc.exe by writing o [...] adds 148af8f5ce5 [lit] Remove dead code not referenced in the LLVM SVN repo. adds 48e5c1173e2 [lit] Fix some convoluted logic around Unicode encoding, an [...] adds bd55db3dcb8 Fix spelling: uncode -> unicode. adds b9a73118baf Revert "[lit] Fix some convoluted logic around Unicode enco [...] adds 6956b5e8f10 llvm-profdata: Indirect infrequently used fields to reduce [...] adds d1176ce9c6a [lit] Re-apply: Fix some convoluted logic around Unicode en [...] adds 81d3d1fc319 [X86] Adding shuffle tests demonstrating missed vcompress o [...] adds 4976d5c7cb7 [BinaryFormat] Identify AArch64 COFF files adds d83ceeeedb9 [ARM] Add tGPRwithpc register class and use it for TBB/THH adds c0dfd2f6710 [SLPVectorizer] Introducing getTreeEntry() helper function [NFC] adds 0ee559e87f7 Test commit adds 67e5e6bb52e [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont adds a8623316512 [X86][SSE] Dropped -mcpu from zero insertion tests adds 723ef71dbf4 [X86][SSE] Dropped -mcpu from vector shift tests adds 44bbc9af33c [X86][SSE] Regenerate shuffle test with update_llc_test_checks.py adds e72abe8aa15 [X86][SSE] Dropped -mcpu from palignr tests adds 6b54220c086 [GlobalISel][X86] Support vector type G_MERGE_VALUES selection. adds d04333d38b8 Recommit "[Support] Add RetryAfterSignal helper function" adds 0812c948be5 [TargetTransformInfo, API] Add a list of operands to TTI::g [...] adds f8c0ad0f541 [TBAA] Remove metadata keyword from IR examples in comments (NFC). adds 7da5231e329 Revert "r306529 - [X86] Correct dwarf unwind information in [...] adds f2469c0fac8 [DWARF] - Fix message reporting about broken relocation. adds 16d661a030c [PowerPC] fix potential verification error on __tls_get_addr adds 2e8a8343803 Explicitly check for presence of correct results in instcom [...] adds 6a7b0b9cd50 Restore original intent of memset instcombine test adds 39f5e6d6b08 [NFC] Use stdin for some tests instead of positional argument. adds 332b051685b bpf: remove unnecessary truncate operation adds a6d135a4a72 [llvm-objdump] Handle invalid instruction gracefully on ARM adds 8ebfef5200c [DAG] Fold FrameIndex offset into BaseIndexOffset analysis. NFCI. adds aeca92c5753 [Hexagon] Keep all phi nodes when building DFG in addr-mode-opt adds 11eef886481 [opt-viewer] opt-viewer.py takes -o argument adds a70a8a0aa7a ScalarEvolution: Add URem support adds 502fd5ddfab [DWARF] NFC: DWARFDataExtractor combines relocs with DataEx [...] adds 6ac1ea33ad5 Remove unneeded else from OrderedInstructions::dominates. adds 7a954fc3ee1 NewGVN: Remove useless test in addPhiOfOps. adds fe0d5f970c7 PredicateInfo: Use OrderedInstructions instead of our homem [...] adds 2079d678b5b [ConstantHoisting] Avoid hoisting constants in GEPs that in [...] adds 1eb58b7d04b [Dominators] Add parent and sibling property verification ( [...] adds 6352868d784 Remove useless header. NFC adds de342018a6f [Dominators] Remove DominatorBase class adds 564f59ff4dd [Dominators] Rearrange access specifiers in DominatorTreeBase adds 55912571e9e fix trivial typo, NFC adds 756094d8ef6 [OrderedInst] Add const to constant parameter. NFCI adds a79c4fecfd2 llvm-nm: Add support for symbol demangling (-C/--demangle) adds 11d48a5fe93 [opt-viewer] Python 3 support in opt-viewer.py adds 1894c023076 Reverting r306695 while investigating failing test case. adds fb66991577d [opt-viewer] Add progress indicators (PR33522) adds cf416dcc408 [AliasSetTracker] Don't drop AA MD so eagerly adds fd1b7e89e7a Remove `inline` keyword from inline `classof` methods adds 7eed73772dc [DWARF] Added verification checks for the .apple_names sect [...] adds 1c48ce48f37 Attempt to fix Orc JIT test timeouts adds 35d7a2e8604 [CodeGenPrepare] Don't create inttoptr for ni ptrs adds a8de25b16ff [AArch64] Silence an unused variable warning in Release bui [...] adds 616d6a1621f Revert "[mips] Fix multiprecision arithmetic." adds d5b3cba3bbe [SLPVectorizer] Moving Entry->NeedToGather check out of inn [...] adds 88a765a7079 [CFLAA] Remove unneded function declaration. NFCI. adds a65a5bf0061 [ThinkLTO] Invoke build(Thin)?LTOPreLinkDefaultPipeline. adds 2ce547eb3de Remove redundant copy in recurrences adds e681ab2a883 Make the PPCCTRLoops pass depend on being able to access th [...] adds a633437a75e To help readability of mightUseCTR pull out the inline asm [...] adds ade8407c6e4 Hook the sample PGO machinery in the new PM adds 3dd22a8dcca [GISel]: New Opcode G_FLOG/G_FLOG2 adds 271565d7e6d Unified logic for computing target ABI in backend and front [...] adds ec3ac50fcec [DWARF] Move a couple of member functions to the DWARFUnit [...] adds f21a6b7f6b3 [WebAssembly] Add support for exception handling instructions adds 16264149cd6 [Coverage] Remove two overloads of CoverageMapping::load. NFC. adds 075dc444144 Add a C API section to the release notes. adds c9087d07bbe [Dominators] Don't compute DFS InOut numbers eagerly. adds f89749b21f5 Reduce the complexity of the signbit/branch test functions. adds 47b2ec11a19 Change the type of Undecorated to unique_ptr<char[]> since [...] adds 3da8c4ff2d6 Reduce indenting and clean up comparisons around sign bit. adds 461aeca0735 Try to appease a buildbot. adds 76aac8f1cec [SCEV] Use depth limit instead of local cache for SExt and ZExt adds 7fd563d2834 Rewrite demangle memory handling. The return of itaniumDema [...] adds ed1642feee1 Revert "r306473 - re-commit r306336: Enable vectorizer-maxi [...] adds ab8d3d1763b Revert "r306541 - Add zero-length check to memcpy/memset lo [...] adds 824ab5175a6 [llvm-readobj] Include the PE magic value in printouts adds 9f0e6a18bce [llvm-readobj] Improve printouts for COFF ARM64 binaries adds cebf3467bc0 Remove the BBVectorize pass. adds 11496e7e16e fix trivial typo; NFC adds 006e1f79e63 [InstCombine] In foldXorToXor, move the commutable matcher [...] adds c9df51e6e95 [InstCombine] Add test cases to demonstrate failure to fold [...] adds bfae62c2cba [LV] Optimize for size when vectorizing loops with tiny trip count adds e6f158fee49 [GlobalISel] Make multi-step legalization work. adds 7dab9bfe301 fix trivial typos, NFC adds 83aa9ad2a39 Added Dockerfiles to build clang from sources. adds 0cf8704795c Fixed misplaced table border in the docs. adds b68c6ed9f1f [DWARF] - Simplify HandleExpectedError implementation in DW [...] adds 940b9a117bc [YAML] - Teach yaml2obj/obj2yaml to work with numeric reloc [...] adds fd6c45d107d Revert of r306525: "Canonicalize clamp of float types to minmax" adds ec4d81d2021 [X86] Updated 32-bit memcmp tests to run with/without SSE2 adds c407e0824e8 CREDITS.TXT: Update myself. adds 8f57a78615b [DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseInd [...] adds d1814a363fb Revert "[DAG] Rewrite areNonVolatileConsecutiveLoads to use [...] adds 31866f9f66b [SystemZ] Add missing high-word facility instructions adds d7e9b74bb80 Remove unnecessary commented out argument. NFCI. adds ae8374b5534 [LTO] Remove values from non-prevailing comdats adds adc0734b69f [SLP] A test for limiting vectorization of instructions, NFC. adds 333b6cb7604 [MIPS] Handle PIC load address macro instructions in N64. adds 5a321ee929f [lit] Clean output directories before running tests. adds 8956eb97949 Revert "[lit] Clean output directories before running tests." adds 65bddf3b68b [Dominators] Do not perform expensive checks by default. Fi [...] adds dc482f3f63c [DWARF] Don't include TestingSupport in LLVM_LINK_COMPONENTS. adds f6b4a0347c0 [RuntimeUnrolling] Add logic for loops with multiple exit blocks adds eef7226d491 [X86][SSE] Pulled common variables to top of matchUnaryPerm [...] adds 8e8ec784f8b [ORE] Unify spelling as "diagnostics hotness" adds f330d3e627a [llvm-pdbutil] Add the ability to dump the dependency tree [...] adds f16503af2bf Fix bug in symbol generation for resource COFF adds 8187cd601c6 Drop the LLVM mangler escape when printing the IR name in a [...] adds 2d8feb35d1b Fix test broken by parameter mixup. adds 61b3e82aaa7 Fix opt --help ordering of available optimizations. adds 78fbc18aed8 Completely disable git/svn version checking if not needed. adds cf6016e62d3 [InstCombine] Add m_BitReverse pattern match helper. NFCI. adds 9a170a630e1 [PowerPC] auto-generate check lines; NFC adds f0dc005cf08 Make 0 argument getSubtargetImpl functions for the X86, AAr [...] adds a8b6c543a8f ARM: fix big-endian 64-bit cmpxchg. adds a6974a4e446 [ORE] Remove old "diagnostic hotness" spelling adds ecea903af0b [SimplifyCFG] Update the name of switch generated lookup table. adds ae521f4192c [Hexagon] Guard the generation of lookup table adds 409c609253e Revert "[Hexagon] Guard the generation of lookup table" adds 7005a5a0471 [Hexagon] Emit jump tables in text section based on a flag adds 699416df0f3 GlobalISel: add G_IMPLICIT_DEF instruction. adds 75d5833bd6e [SystemZ] Add all remaining instructions adds e33b6de6d6d [Hexagon] Guard the generation of lookup table adds 638ba5afb5d Fix ODR violations due to abuse of LLVM_YAML_IS_(FLOW_)?SEQ [...] adds e050d57c744 [LV] Sink casts to unravel first order recurrence adds 9bb85ad4f77 [InstCombine] Replace an unnecessary use of a matcher with [...] adds 7bf0a87e3ac [SLPVectorizer] Add isOdd() helper function, NFCI. adds 515de5651c1 [Hexagon] Implement frame pointer elimination with -fomit-f [...] adds 478b1eca4d3 [codeview] Use the first valid source location at the top o [...] adds d36e155be16 [llvm-pdbutil] Output the symbol offset when dumping. adds cf2414fa4d7 Remove spurious semicolons. adds 950d20c7580 [Dominators] Keep tree level in DomTreeNode and use it to f [...] adds 83971cbd44f [Dominators] Add NearestCommonDominator verification adds 429cd8e5880 [Dominators] Teach IDF to use level information adds 8c7c8491f0a [lit] Factor out listdir logic shared by different test formats. adds 42ad1630f0a Rename and adjust processFixupValue. adds 6d12ee83fa5 Revert "[Dominators] Teach IDF to use level information" adds 14a125c6c66 [CodeView, PDB] Fix some Clang-tidy modernize and Include W [...] adds e3305284e8f [ORE] Add diagnostics hotness threshold adds 28bd12fcf5b Add comments on sibling and parent properties in dominator trees adds 5da2439a1ab [RegisterCoalescer] Account for instructions deleted by rem [...] adds d5fcbff0e97 A little wordsmithing of dominator verification comments. adds 8915ae98bd0 [Dominators] Reapply r306892, r306893, r306893. adds 72109100ef8 [ARM] Move GISel accessor initialization from TargetMachine [...] adds 5a45a656080 [X86] Move GISel accessor initialization from TargetMachine [...] adds f3b91ec06a8 [AVR] Update AVRASmBackend from API change in r306906 adds cd90344c00b [ObjectYAML] Fix some Clang-tidy modernize and Include What [...] adds ed4cc74af34 Rewrite ARM execute only support to avoid the use of a comm [...] adds 4f3fdf35d22 Another test commit adds fa4a226466f Still test commit adds 98ec643c43a Still debugging adds 747e9516670 Another test commit adds 005cfad2e88 Enable vectorizer-maximize-bandwidth by default. adds 423d09931a7 revert r306336 for breaking ppc test. adds f7497bfb4a1 re-commit r306336: Enable vectorizer-maximize-bandwidth by [...] adds 9d923b35aa3 Revert "r306473 - re-commit r306336: Enable vectorizer-maxi [...] adds 4da9193a656 Recommit "r306541 - Add zero-length check to memcpy/memset [...] adds b7a280badb5 [Cloner] Re-map simplfied cloned instructions. adds 26e9879a19b Remove the default ARMSubtarget from the ARM TargetMachine. adds 24c1125ed07 Revert "Revert "Replace trivial use of external rc.exe by w [...] adds ef0aeadf374 [AVR] Remove a bunch of now-obselete tests adds 328ed4754f5 [SelectionDAGBuilder] Use EVT::getVectorVT instead of MVT:: [...] adds d0777022c7c fix trivial typos, NFC adds 0345d413aca [X86][AVX] Remove duplicate autogeneration note adds 10364ca45d9 [X86] Removed reference to update_test_checks.py adds 3d0bf3fe281 [X86][RDRAND] Split off i64 intrinsic tests and test i16/i3 [...] adds 8be8514cdd8 [X86][RDSEED] Split off i64 intrinsic tests and test i16/i3 [...] adds 7617a499317 [CodeExtractor] Remove unneded and commented out debugging stmts. adds d2fe411570e [InstCombine] Fold (a | b) ^ (~a | ~b) --> ~(a ^ b) and (a [...] adds 71a28cb4142 fix trivial typos; NFC adds 425091694e8 [GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection. adds 31db5788ec2 [GlobalISel][X86] Support G_GLOBAL_VALUE operation. adds 4f7d404ed16 [X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC. adds ffb8f09571b [X86][CM] update add\sub costs of vectors of 64 in X86\SLM arch adds bc6790d8bad fix trivial typos in documents; NFC adds 496650c94d1 [X86][SSE] Add test showing missed opportunity to combine t [...] adds d948559e483 [X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to [...] adds 42864a7b262 [X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to [...] adds c49c5b222ef llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll: [...] adds d90638a9854 [InstCombine] look through bswap/bitreverse for equality co [...] adds 9f2c723874c [x86] auto-generate complete checks for tests; NFC adds 9fe1f9b0d52 [x86] update test to use FileCheck and auto-generate checks; NFC adds a53a0b11b8c [x86] remove unnecessary RUN for test after auto-generating [...] adds 6d8a69ea006 [x86] auto-generate complete checks for tests; NFC adds 8503b43b936 [InstCombine] fix crash when folding cmp+bswap vector adds c465e8b59fc [InstCombine] Use m_BitReverse pattern match helper. NFCI. adds 0193305dcba [IR] Remove unnecessary operator new from ConstantDataArray [...] adds fa1c0b31980 [X86][AVX512] Cleanup popcnt tests triples and attributes adds 7b3091fec41 [X86][AVX512] Cleanup tzcnt tests triples and attributes adds afebd3ffb54 [X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i [...] adds 0e6595164d3 [X86][AVX512] Test AVX512VPOPCNTDQ CTPOP with/without AVX512BW adds ff0022d12c1 AMDGPU: Add operand target flags serialization adds 946c2f9898b [InstCombine] Remove an if that should have been guaranteed [...] adds 33109d60f6b [InstCombine] Add test cases showing missed opportunity to [...] adds e78ec11a0f9 [InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP( [...] adds d8d495196eb [InstCombine] Remove support for BITWISE_OP(CONSTANT, BSWAP [...] adds b4277c6de70 [InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONS [...] adds 5507b53e8d0 [InstCombine] Support BITWISE_OP( BSWAP(x), CONSTANT ) -> B [...] adds e3765ba1683 [InstCombine] Add a TODO for a probable missing single use [...] adds de3c9021440 fix trivial typos in comments; NFC adds 10866b987e7 [GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection. adds 310192f26f5 Revert "[GVN] Recommit the patch "Add phi-translate support [...] adds 35043e01b3a [InstCombine] move and improve tests for cmp-intrinsic; NFC adds 18a09ae528b [x86] auto-generate complete checks for tests; NFC adds 0f9ec972382 [AMDGPU] Switch scalarize global loads ON by default adds 31cd3858ec4 [X86][SSE4A] Add tests showing missed opportunities to comb [...] adds 7990616d411 [x86] auto-generate complete checks for tests; NFC adds 71eff302c15 Fixed argument parsing in docker scripts. adds 3e805b83e39 [x86] auto-generate complete checks for tests; NFC adds 40f3703b366 [LoopInterchange] Add more debug messages to currentLimitations(). adds 5c26a9c9de3 DAGCombine: Combine BUILD_VECTOR to TRUNCATE adds 842b0e31800 [X86][SSE4A] Test SSE4A shuffle combining on SSE42 capable [...] adds 787d8dd6640 [X86][SSE4A] Add SSE4A shuffle tests on pre-SSSE3 hardware adds 5a8feb78939 MathExtras UnitTest: Assert that isPowerOf2(0) is false. NFC. adds 67b79a41fc6 [X86][SSE4A] Add support for combining from EXTRQI/INSERTQI [...] adds e166970ec35 [legalize-types] Clean up softening machinery. adds 0a256123a48 Revert r307026, "[AMDGPU] Switch scalarize global loads ON [...] adds 32524dd4da5 [DAG] Fixed predicate for determining when two frame indice [...] adds 79bfbea46bb [AVR] Add a missing clobber declaration to LPMW adds 285f30181c4 [AVR] Fix bug which caused assertion errors for some FRMIDX [...] adds 966d9ebd7f8 [Orc] Remove the memory manager argument to addModule, and [...] adds ea28d7645c3 [tablegen] Avoid creating a temporary vector in getInstructionCase adds 10e0018cf56 [X86] Add RDRAND feature to GLM CPU adds f82e25012a9 [llvm] Revert "[tablegen] Avoid creating a temporary vector [...] adds a2a4e2c7e5d [X86] Add comment string for broadcast loads from the const [...] adds d6059bd6713 [tablegen] Avoid creating a temporary vector in getInstructionCase adds d5180fc9b40 [InstCombine] Add test cases demonstrating creation of extr [...] adds 8913e9099ea [InstCombine] Add TODOs for a couple things that should may [...] adds 79da0992d18 NFC commit. Converting the Codegen test "extractelement-le [...] adds 9df17619f40 llvm/ExecutionEngine/Orc/ObjectTransformLayer.h: Add <memor [...] adds 9e886358ff3 Revert r307064, "[InstCombine] Add test cases demonstrating [...] adds 1b5fdf72dac [X86] Add combine tests for vector rotates adds b08063c374d fix trivial typos in comments; NFC adds ae593118ab5 [LoopDeletion] NFC: Add debug statements to the optimization adds 8175dca9957 [globalisel][tablegen] Partially fix compile-time regressio [...] adds 3248821e759 NFC. Removed mention of missing script from build_docker_image.sh. adds 97186bff402 [AMDGPU] Fix latency of MIMG instructions adds fd98b3486a9 [FastISel][SelectionDAG]Teach fastISel about GC intrinsics adds b8246847585 Fix dangling StringRefs found by clang-tidy misc-dangling-h [...] adds b9be004f06f [FastISel] Move gc intrinsic test to X86 directory adds 32b8ab6f1e2 [globalisel][tablegen] Fix release builds after r307079 adds aadafc2d1e7 [DAGCombiner] Intermediate variables in visitRotate promote [...] adds a07988d1852 [globalisel][tablegen] Fix the modules build after r307079 adds cad1431a1e4 fix trivial typos in comments; NFC adds bb23800c9f3 [X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes adds f7fcbf440d4 [LoopDeletion] NFC: Add loop being analyzed debug statement adds f9e9586c800 [AMDGPU] Switch scalarize global loads ON by default Differ [...] adds aa47088124c Fix signed/unsigned comparison warnings adds 4a7d3a3e55a [X86][SSE4A] Add support for combining from non-v16i8 EXTRQ [...] adds d519d29dbba [ARM][test] Added test/CodeGen/ARM/ror.ll test. NFC precomm [...] adds 62eb0faea57 Recommit r307064, "[InstCombine] Add test cases demonstrati [...] adds 2a5f74d29fb NFC. Made some updates to the half.ll test under CodeGen to [...] adds b95f4b6ade6 [AVR] Add the branch selection pass from the GitHub repository adds 3a8bab032e8 Revert "[AVR] Add the branch selection pass from the GitHub [...] adds 3087bcdef29 [SafepointIRVerifier] Add verifier pass for finding GC relo [...] adds e75c6758b9c [profiledata] Avoid creating a temporary vector in getNumValueData adds 3f4f926b6a8 Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset adds 7a41a9b0dc7 [Bash-autocompletion] Show flags which has HelpText or GroupID adds c91f7492989 [PowerPC] Fix for PR33636 adds 66da5670571 Add the missing triple to the test case added as part of r307120. adds f12af4508e9 [GlobalISel][X86] Allow graceful fallback for struct/array [...] adds f9de76f9874 [IndVars] Canonicalize comparisons between non-negative val [...] adds 71e8bec63a1 [globalisel][tablegen] Added instruction emission to the st [...] adds bda4e55bddb Revert "[IndVars] Canonicalize comparisons between non-nega [...] adds 90b8bac67b2 [globalisel][tablegen] Fix an unused variable warning in re [...] adds dd5cf95d9bf [MachineIRBuilder] Add buildBinaryOp helper. NFC adds 179b206a6cb [GlobalIsel] allow x86_fp80 values to be dumped. adds 004d5b661f8 [MachineIRBuilder] Add buildOr helper. NFC. adds 4ecd96466ec [GlobalISel][X86] For now don't handle not trivial function [...] adds 5d663de6b16 [MachineIRBuilder] Fix formatting. NFC. adds 501e5159caf [ARM] GlobalISel: Extract tiny helper. NFC adds c61a5907758 [globalisel][tablegen] Fix the misuse of STATISTICS() on re [...] adds 8b755a3a21e [AsmParser] Mnemonic Spell Corrector adds f1715a330a5 [GlobalISel] Refactor Legalizer helpers for libcalls adds 1f536a1112f CMake: Add LLVM_UTILS_INSTALL_DIR option adds bef33d7af3d [Hexagon] Preclude non-memory test from being optimized away. NFC. adds 55e17e75fdc [SystemZ] Small cleanups to SystemZScheduleZ13.td adds 4c8480dbc5c [SystemZ] Simplify handling of 128-bit multiply/divide instruction adds a33c5722b06 [IndVarSimplify] Add AShr exact flags using induction varia [...] adds 18b9e001a84 [SLPVectorizer] Add an extra parameter to cancelScheduling [...] adds b26b47eeb0d [globalisel][tablegen] Finish fixing compile-time regressio [...] adds 4a35644b43f DebugInfo: Generalize LoadedObjectInfoHelper from RuntimeDyld adds 38fe5d7dca5 [globalisel][tablegen] Fix another unused variable warning [...] adds ee1d801b4fb [Power9] Exploit vector integer extend instructions when in [...] adds d1071cff224 [Power9] Exploit vector extract with variable index. adds 1f90a252c7c [X86][SSE] Dropped -mcpu from bitcast+setcc mask tests adds e54a2b399d1 [DAGCombiner] visitRotate patch to optimize pair of ROTR/RO [...] adds cb358c5493c [PowerPC] Make sure that we remove dead PHI nodes after the [...] adds 4397a01d712 [X86] Test bitfield loadstore tests on i686 as well adds 5a32446d7bc {DAGCombiner] Fold (rot x, 0) -> x adds 4ddfd12ff6a [Power9] Disable removing extra swaps on P9. adds d268a8d71a0 [AMDGPU] Move GISel accessor initialization from TargetMach [...] adds 57f9d8ea2f0 [PDB] Add a test that verifies every known type record. adds 7cacca2b9b8 Revert "Replace trivial use of external rc.exe by writing o [...] adds 9b6f55389eb Revert "Switch external cvtres.exe for llvm's own resource [...] adds 1efceea97ed Revert "Revert "Switch external cvtres.exe for llvm's own r [...] adds 045760e4345 Revert "Revert "Replace trivial use of external rc.exe by w [...] adds e0fb9524559 Add a test for relocation addend on mips. adds a6a29d93c80 [WebAssembly] MC: Don't generate extra types for weak alias adds 18b16185df9 [tablegen] Avoid creating temporary strings adds 640fb6d894d [WebAssembly] Fix types for address taken functions adds 3af013231ec [InstCombine] Use CmpInst::Predicate with m_Cmp instead of [...] adds 0aff1ea91d8 Added more info on silent master to the doc. adds f2a18395661 [DependenceAnalysis] Make sure base objects are the same wh [...] adds 8ba482dc483 [llvm-pdbutil] Add the ability to truncate stream purpose names. adds 8b70926d838 Fix std::min ambiguity between uint32 and size_t. adds a671f7f9d2b Fix libcall expansion creating DAG nodes with invalid type [...] adds 4065b5e3989 [IR] Use CmpInst::isIntPredicate()/isFPPredicate in some as [...] adds 1e0b73ce8bf [GlobalOpt] Remove unreachable blocks before optimizing a f [...] adds 3208bb2d1dd [IR] Use CmpInst::isFPPredicate/isIntPredicate in a few oth [...] adds 4f70e7e8d84 Revert "Revert "Revert "Replace trivial use of external rc. [...] adds b9f4c5114f6 Revert "Revert "Revert "Switch external cvtres.exe for llvm [...] adds e533e91208e Avoid constructing GlobalExtensions only to find out it is empty. adds 7e0b3ee2a66 [lit] Fix unit test discovery for Visual Studio builds. adds e2f7bf8c93c Simplify InstrProfRecord tests, eliminating named temporari [...] adds 8bce69abd52 Fix -Wunused-function by making function declarations in a [...] adds 38c3b330a49 [ARM] GlobalISel: Widen s1, s8, s16 G_CONSTANT adds 2e93b3845f3 [globalisel][tablegen] Import rules containing intrinsic_wo_chain. adds bd98e1b2fd6 [DWARF] - Provide default implementation for getSectionLoad [...] adds e9e0d4fb837 [ARM] GlobalISel: Legalize G_FCMP for s32 adds 731b43312cf Revert "Revert "[IndVars] Canonicalize comparisons between [...] adds b72872894c9 [ARM] GlobalISel: Map s32 G_FCMP in reg bank select adds 168fe35d8a6 [globalisel][tablegen] Rename and re-comment to match the n [...] adds 3b312dd6356 [RegisterCoalescer] Fix for SubRange join unreachable adds 77d17433e65 [globalisel][tablegen] Rename and re-comment render functio [...] adds c539005888b Revert "Revert "Revert "[IndVars] Canonicalize comparisons [...] adds 8b3842edf51 [X86][SSE4A] Split EXTRQ/INSERTQ shuffle matching from lowe [...] adds d222680bdab [X86][SSE4A] Add scheduling tests for SSE4A instructions adds 28b742e108b [X86][SSE4A] Add support for shuffle combining to EXTRQ. adds 479b8b3851d [X86][SSE] combineX86ShuffleChain - merge duplicate 'Zeroab [...] adds 45bbe61cd4d Made a script to build docker images easier to use. adds 25128758007 [X86][SSE] combineX86ShuffleChain - merge duplicate creatio [...] adds d8c53d08c3e Fixes to Dockerfile scripts. adds 0bce6b7bb4d [MachineVerifier] Add check that tied physregs aren't different. adds a06fc738915 [x86] fix over-specified triple and auto-generate checks; NFC adds 24fbea1d3bc Doxygen formatting. NFCI adds 7a538935b46 [X86][SSE4A] Add test showing missed opportunities to combi [...] adds f65d8b91745 [CGP, x86] update test checks; NFC adds 54f05c4a859 [X86][SSE4A] Add support for shuffle combining to INSERTQI. adds 4bbbd1a54ed [LSR] Narrow search space by filtering non-optimal formulae [...] adds eebcffd2810 [InstCombine] Don't create extra ConstantInt objects in fol [...] adds afbb3e0e902 [InstCombine] Add single use checks to SimplifyBSwap to ens [...] adds 5e02f676543 [InstCombine] Clarify comment to mention other transform th [...] adds 8e1b81f0307 [InstCombine] Change helper method to a file local static m [...] adds 559127a46b8 [SimplifyCFG] Move a portion of an if statement that shoul [...] adds 8657a6b1952 [PDB] Fill in "Parent" and "End" fields of scope-like symbo [...] adds a5a5f8ef6fc [opt-viewer] Move under tools, install it adds 67a3f7fd429 Bitcode: Include any strings added to the string table in t [...] adds 1ed1565da6e Fix spelling in comments. NFCI. adds 9c4186602a9 [X86][SSE] Dropped -mcpu from bitcast+setcc tests adds 1de5e7045e9 [InstCombine] Remove Builder argument from InstCombiner::tr [...] adds 9a2b6151ed9 [LoopUnrollRuntime] Bailout when multiple exiting blocks to [...] adds 6dbd34d261f [Constants] If we already have a ConstantInt*, prefer to us [...] adds 099c15e7b43 [Constants] Replace calls to ConstantInt::equalsInt(0)/equa [...] adds 34a6854c594 Modify constraints in `llvm::canReplaceOperandWithVariable` adds 6e90f035015 [InstCombine] Remove include of DIBuilder.h and Dwarf.h as [...] adds 812570f6d4a [llvm] Separate out reverse iteration flag into its own header adds 450ef2ab9dc Prototype: Reduce llvm-profdata merge memory usage further adds b9eae7a2b31 remove an unused empty file. adds 8aa39a1e374 Add @LINE to checks in a test. adds 73886a60d8e [X86][SSE] Tests for bitcasting iX integers to vXi1 boolean [...] adds 3c86b1705ba [GISel]: Enhance the MachineIRBuilder API adds 6411a7949b1 [LTO] Fix the interaction between linker redefined symbols [...] adds 91054ccf0ae [ValueTracking] Support icmps fed by 'and' and 'or'. adds 78be03e3598 [lib/LTO] Add a comment to explain where we set the linkage [...] adds 71b4fe42289 [AMDGPU] Always use rcp + mul with fast math adds f5757f76499 [lit] Factor out some shell input/output redirection logic, NFC adds 0f915c6a85e AMDGPU: Remove unnecessary IR from MIR tests adds 92223c6fe5a AMDGPU: Minor cleanup of shrinking logic adds 8763b3ac42d AMDGPU: Add macro fusion schedule DAG mutation adds cc030dee9fc [COFF, AArch64] Set the private label prefix to .L adds b5e3177787c Use @LINE in two more tests. adds 0125881b409 [ORC] Update GlobalMappingLayer::addModuleSet to addModule. adds 8804b79c2bf Change remaining references to lit.util.capture to use subp [...] adds 513399718a2 [ORC] Add missing <memory> include for shared_ptr. adds 1803a9f2342 [NVPTX] Add lowering of i128 params. adds 8e52a552c39 [ConstHoisting] choose to hoist when frequency is the same. adds 6671b32e566 [InstCombine] Change a couple helper functions to only take [...] adds 05cd772a60a [InstCombine] Remove unused arguments from some helper func [...] adds 239d9c373b7 [InstCombine] No need to pass DataLayout to helper function [...] adds 77b223ff616 Reverting r307326 because it breaks clang tests. adds 0082096cc77 [ConstHoisting] Turn on consthoist-with-block-frequency by [...] adds 80c7e63a6db [lit] Modify LIT to accept environment variable LIT_FILTER [...] adds eb0c2c435b1 [SafepointIRVerifier] NFC: Refactor code for identifying ex [...] adds 3b48753a2f3 Copy arguments passed by value into explicit allocas for ASan. adds 104fd8eec74 Revert r307342, r307343. adds 471398ffea7 Extend memcpy expansion in Transform/Utils to handle wider [...] adds 20bde087167 [WebAssembly] Support weak defined symbols adds d0585d352f3 [InferAddressSpaces] Fix assertion about null pointer adds a81793582b3 [ORC] Errorize the ORC APIs. adds a819fad8653 LiveRegUnits: Rename accumulateBackward()->accumulate() adds 192187283c4 RegisterScavenging: Fix PR33687 adds af26c83f3b2 Correct GFX9 processor names. adds 7df94ee8556 [Orc] Add missing return value (left out in r307350). adds 5974613ee57 [PDB] Teach libpdb to write DBI Stream ECNames. adds 3e595d0a2bc [TableGen] Fix some mismatches in the use of Namespace fiel [...] adds ef8ed10be50 Reduce code duplication. adds 2986f4761d4 [TableGen] Add a proper namespace to an Instruction in an A [...] adds 77eddb74c0f [TableGen] Use StringRef instead of std::string for CodeGen [...] adds dc02fd0b4d2 [TableGen] Cleanup capturing of instruction namespace for t [...] adds a479e53b559 [ARM] GlobalISel: Select hard G_FCMP for s32 adds 4f529ec57cd [ARM] GlobalISel: Fixup r307365 adds 20cee5d6280 [AArch64] Add test case for preferred function alignment (NFC). adds 25b2f9273d8 [Support] sys::getProcessTriple should return a macOS tripl [...] adds 244313d541e [Hexagon] Fix -Wimplicit-fallthrough warnings. NFCI. adds 1289f803e27 [Arm] Fix -Wimplicit-fallthrough warnings. NFCI. adds 03251f283c8 [SystemZ] Fix -Wimplicit-fallthrough warnings. NFCI. adds 9976ad92c3d Update the Windows version of updateTripleOSVersion to acco [...] adds 4a533c58e17 [Sparc] Fix -Wimplicit-fallthrough warning. NFCI. adds d04ee305d85 [AArch64] Use 16 bytes as preferred function alignment on C [...] adds 26aa51226a6 [AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI. adds daa5b43a38b [PowerPC] Fix -Wimplicit-fallthrough warnings. NFCI. adds 9889fe22907 Fix uninitalized memory access introduced in r307350. adds 287aa279ce5 [AArch64] Use 16 bytes as preferred function alignment on C [...] adds 25f28db283b [SafepointIRVerifier] Avoid false positives in GC verifier [...] adds 8cbd9aac540 [AArch64] Fix -Wimplicit-fallthrough warnings. NFCI. adds 3b6486c8f9f [Hexagon] Fix some more -Wimplicit-fallthrough warnings. NFCI. adds 5e45678e17c [Lanai] Fix -Wimplicit-fallthrough warning. NFCI. adds 255ac753d51 NFC: I simply added CHECK-LABEL to prevent false matches in [...] adds 86dfeddc700 [ValueTracking] Fix the identity case (LHS => RHS) when the [...] adds c956bf87e0f [AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_ [...] adds 28bebe46a8a [DemandedBits] fix formatting; NFC adds b1044ac0c1b [x86] add SBB optimization for SETAE (uge) condition code adds 2e124626b48 Fix variable names. NFC. adds f9327929eb5 [AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG) adds 94fdc9b4580 [ARM] Implement interleaved access bug fix from r306334 adds 2541a59ac39 Fix some more -Wimplicit-fallthrough warnings. NFCI. adds 9163803bf0f [PPC CodeGen] Expand the bitreverse.i32 intrinsic. adds 987dd01d1bc [LoopUnrollRuntime] NFC: use the precomputed loop exit in C [...] adds d73686e8412 [cloning] Do not duplicate types when cloning functions adds 41cafc737b7 vim: add 'builtin', 'nobuiltin', 'nonnull', and 'speculatab [...] adds 3324d0bf042 [llvm-pdbutil] Improve diff mode. adds b85b70f834a Fix some differences between lld and MSVC generated PDBs. adds f8cc5477f07 Use windows path syntax when writing PDB module name. adds 44a51454353 FuzzerUtilDarwin.cpp: We need to pass modifiable strings to [...] adds 5c0bc9394d1 [Local] Update the comment for removeUnreachableBlocks. adds 0faf4660148 [llvm-pdbutil] Fix build. adds b8caa0933a1 [RegAllocFast] Add the proper initialize method to use the [...] adds 4e13bac06cf [RegAllocFast] Don't insert kill flags of super-register fo [...] adds 16c930ae14e [DAGCombiner] use local variable to shorten code; NFCI adds 8614bf0c87b [APInt] Add a fastpath for the single word case of isOneVal [...] adds caa219e9a88 [PatternMatch] Implement m_One and m_AllOnes using Constant [...] adds 7383d9c9fdb [PatternMatch] Implement m_AnyZero using Constant::isZeroVa [...] adds 9fec2431ce1 [PatternMatch] Implemenet m_SignMask using Constant::isMinS [...] adds f3a2f4ad164 [LoopUnrollRuntime] Support multiple exit blocks unrolling [...] adds 9657506451e [PDB] More changes to bring lld PDBs to parity with MSVC. adds 59bf0ba3183 Add sample PGO support to ThinLTO new pass manager. adds b1f864a9476 Increase the import-threshold for crtical functions. adds 8c2dc92bd4a ProfData: Fix some unchecked Errors in unit tests adds 36381776b00 [PowerPC] NFC : Common up definitions of isIntS16Immediate [...] adds f552e96e025 [InstCombine] Make InstCombine's IRBuilder be passed by ref [...] adds ec7b3bff58c Add name offset flags, for parity with cvtres.exe. adds 91822545c57 Remove a variable that was only used in asserts and had a d [...] adds b618c820b01 Revert "Revert "Revert "Revert "Switch external cvtres.exe [...] adds 48bde3bb02b [X86] Cleanup some CPUID usage in getAvailableFeatures. adds 502be8232c8 [X86] Use 'unsigned' instead of 'unsigned int' for consiste [...] adds d18691202ba [X86] Minor formatting fix. NFC adds 6fd36d21efd [X86] Correct the BDVER4 model numbers to include 0x70-0x7f. adds 5814cdbb68d [X86] In getHostCPUName, remove some code that changes some [...] adds f65227fd462 [Solaris] get rid of _RESTRICT_KYWD warning during the build adds 5a8a210360f [x86] add SBB optimization for SETBE (ule) condition code adds d9d9b500c6a Fix -Wimplicit-fallthrough warning. NFCI. adds 3b56d63bde0 [LoopVectorize] auto-generate complete checks; NFC adds 9e5be5ac4c3 [LoopVectorize] partly revert r307475 adds 0acdce17938 Re-enable "[IndVars] Canonicalize comparisons between non-n [...] adds fb5cc8884b9 [Bash-autocompletion] Auto complete cc1 options if -cc1 is [...] adds 7ed51111cee [ARM] Fix -Wimplicit-fallthrough warning. NFCI. adds a24a9b84eb5 [AArch64] Fix -Wimplicit-fallthrough warnings. NFCI. adds db24b6e4f77 [AMDGPU] Fix -Wimplicit-fallthrough warning. NFCI. adds 1e0e5aa155d [InstCombine] Speculatively implement a fix for what might [...] adds 143ef32e8f3 [PM] Finish implementing and fix a chain of bugs uncovered [...] adds 5c99c6a26ad fix trivial typos; NFC adds 7e96a89b3cf [FastISel] fix a fallback diagnostic. adds cc60d7b17de [ADT] Add a default constructor and a bool conversion to fu [...] adds 1060082924c [IR] Make use of Type::isPtrOrPtrVectorTy/isIntOrIntVectorT [...] adds eb41f6a3452 [IR] Add Type::isIntOrIntVectorTy(unsigned) similar to the [...] adds 79b7faac961 [PM] Teach PreservedAnalyses to have an `allInSet` static f [...] adds 0ddcb9877cc [GlobalISel][X86] Add legalizer tests for G_LOAD/G_STORE op [...] adds a0e7d65aa69 [X86] Remove check for AVX512 support from skylake-avx512 d [...] adds cf8b560c58f [ADT] Fix a test case to use a correct escape for a null by [...] adds b86a95f1b6a [PM] Add unittesting of the call graph update logic with co [...] adds fe40a5a3de8 [PM] Fix a nasty bug in the new PM where we failed to prope [...] adds 2bd71f2f17d [X86][AVX512] Regenerate AVX512VL comparison tests. adds 3b637f62816 Handle ConstantExpr correctly in SelectionDAGBuilder adds 5cd68f35c89 [AVR] Fix test errors due to tied operands not matching adds 6c560b5efb4 [X86] Allow GHC calling convention to use YMM and ZMM registers adds e7b6244965e [X86] Relax an assertion when legalizing vector types. adds 05c7df73c50 CGSCCPassManagerTest.cpp: Fix warnings. [-Wunused-variable] adds cb16061ea77 llvm-profdata: Reduce memory usage by using Error callback [...] adds 23efab2bbd4 [ADT] Fix another "oops" spotted by eddyb and reported in IRC. adds d76565ff5fa [X86] Remove asserts from getX86CpuIDAndInfo/getX86CpuIDAnd [...] adds 3c7da1cd618 [ArgumentPromotion] Change use of removed argument in llvm. [...] adds 12a230f4b4f [X86] Fix typo in comment. NFC adds 9086ed9db01 fix formatting; NFC adds d6a9e4a5f3b [docs] NFC: Fix links in the tutorial adds 77954ced1a8 [GlobalISel][X86] extend G_ZEXT support. adds 8c3ce14ba82 [GlobalISel][X86] Support G_LOAD/G_STORE i1. adds 505b8a7283b [DWARF] - Remove unused variables. NFC. adds 33dd96a2733 This patch completely replaces the scheduling information f [...] adds 72f54aa84f9 [DWARF] - Rename variable. NFC. adds e9e97c867a1 [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC adds 19045617b35 [PM] Enable registration of out-of-tree passes with PassBuilder adds 58d2b3aa334 fix typos in comments and error messages; NFC adds 45074ea32a5 [PM] Fix r307532: Get rid of a dangling reference. adds 138dd5da1fa [PM] Fix a warning. adds 5be3d3e74b3 [LoopUnrollRuntime] Remove strict assert about VMap requirement adds 9c353a84fb0 Use emplace_back to replace size() and resize(). adds e791f411d3a [DAG] Improve Aliasing of operations to static alloca adds 1b59198f81f [LLVM] Get rid of white spaces in file names in a DebugInfo [...] adds 0fd6ce773dc [X86] Model 256-bit AVX instructions in the AMD Jaguar sche [...] adds b6988767a83 [PowerPC] Reduce register pressure by not materializing a c [...] adds 65eefa7f013 Fix invalid cast in instcombine UMul/ZExt idiom adds 80e0f20bdec Fix pdb-diff test. adds e584c228c64 Build fixes for pdb-diff test. adds 18a8461632e Revert "Build fixes for pdb-diff test." adds bd92bdd24f0 [Docs] Updating CMake docs to include LLVM_REVERSE_ITERATION adds dc4a67cca0a [PPC CodeGen] Expand the bitreverse.i64 intrinsic. adds 374ba004d2a [Hexagon] Handle Hexagon-specific machine operand target fl [...] adds 589c8caef1a [WebAssembly] Use the correct size for MCFillFragment adds 33287d8a695 [Hexagon] Fix check for HMOTF_ConstExtend operand flag adds 41d802b2b5f [docs] Remove obsolete section in CMake documentation. adds f3550754a57 [cmake] Remove obsolete unset in CMake. adds 8f321099a36 Resubmit "Add pdb-diff test." adds 3b8d30db1d0 [CMake] Dependencies for tests in "runtimes" adds f392c1f9224 AMDGPU: Do not test for SI in getIsaVersion adds 72319660891 AMDGPU: Remove unnecessary check for constant operands adds a038a8340c1 AMDGPU: Allow SIShrinkInstructions to work in non-SSA adds d380c14b7a7 AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes adds a569cab4048 Use DenseMap instead std::map for GVSummaryMapTy. adds d07ce5fb3fa [Hexagon] Remove unused ISD opcodes, NFC adds b0d5344402d Avoid doing conservative phi checks in aliasSameBasePointer [...] adds 7a9373cdbb1 [Hexagon] Convert typed ISD opcodes to generic ones, NFC adds c7acbe2ea6a Add DAG argument to canMergeStoresTo NFC. adds 3ba65667418 [WebAssembly] Be consistent in generating trivial test input files adds 063d8f6b0fd [NewGVN] Simplify a lambda a little bit. NFCI. adds 581e763cd48 [ConstantHoisting] Remove dupliate logic in constant hoisting adds f3f79378e0a [WebAssembly] Add more details to llvm-readobj for wasm files adds c364d94de8b Revert "[DAG] Improve Aliasing of operations to static alloca" adds 8a3ff6431f4 [lld/pdb] Add some basic linker module symbols. adds cdcc59f9d06 InstrProf: Fix unit test which accidentally used a duplicate name adds 6ed70a89d6b Doxygen formatting. NFCI adds c1422a59e8c [lld/pdb] Create an empty public symbol record stream. adds 3b0bb78b4e7 Remove circular dependency from runtimes/CMakeLists adds 23926286595 [cmake] Check for Haiku when setting LIB_NAMES for GNU ld adds 1b67e9a22a0 llvm-profdata: Improve memory usage by tuning SmallDenseMap size adds 574c516223c [llvm-cov] Add a cl::opt to control the number of threads adds 8d7d203342f [llvm-cov] Disable threading in a test. NFC. adds 0d72763a25d [WebAssembly] Fix use of cast vs dyn_cast adds e582c6f55ed Revert r307581, "Avoid doing conservative phi checks in ali [...] adds cc230b38ede Whitespace. adds 151ae814edb [AVR] Use the generic branch relaxer adds 29333f5cece [AVR] Rename 'AVRTiny' to 'Tiny' adds 5475b99e469 [AVR] Rename 'ZREGS' to 'ZREG' adds 7e53087f42f [InstCombine] Add test case for PR33721. adds d2c491251a5 [AVR] Remove a few very old TODOs that don't have enough co [...] adds 2ff5ec7b05f [PowerPC] avoid redundant analysis while lowering an immedi [...] adds 9c826708494 [PowerPC] fix latency for simple integer instructions in PO [...] adds 64a9b5d3e6a [PM/ThinLTO] Fix PR33536, a bug where the ThinLTO bitcode w [...] adds 0eb884f61d0 fix typos in comments; NFC adds 0c2ce7e21d0 [CGP] Relax a bit restriction for optimizeMemoryInst to ext [...] adds a66d0850ca5 [GlobalISel][X86] Use correct AND instructions. adds a1602eb3fda Revert Revert [MBP] do not rotate loop if it creates extra branch adds 6845427d1be [ARM] GlobalISel: Legalize s64 G_FCMP adds ec48fd12777 [globalisel][tablegen] Correct matching of intrinsic ID's. adds f4f832c513e [ARM] GlobalISel: Fix oversight in G_FCMP legalization adds 6253ba42762 [ARM] ldr pc,=expression should be allowed in Thumb2 adds a216c3246b5 [globalisel][tablegen] Fix an multi-insn match bug where Co [...] adds 301859ba896 [ARM] GlobalISel: Tighten legalizer tests. NFC adds eb75f906dad [PM] Another post-commit fix in NewPMDriver adds 8ae39dc8474 [ARM] GlobalISel: Add reg mapping for s64 G_FCMP adds c0dfa22e1d4 [X86][AVX512] regenerate avx512-insert-extract.ll adds cd7355508dd [DWARF] - Add testcase for checking message about broken re [...] adds 85d38e084b3 [ARM] GlobalISel: Tighten G_FCMP selection test. NFC adds a589fce0aa1 [SystemZ] Minor fixing in SystemZScheduleZ13.td adds 599e6ee1ebe [globalisel][tablegen] Change method of squashing unused va [...] adds 9733528a875 fix formatting; NFC adds 0495576a59e [IR] Remove unnecessary const_casts from ConstantDataSequen [...] adds fa3d66c27c4 [SLPVectorizer] Revert change in cancelScheduling with refe [...] adds dbeb61f22e6 [lit] Implement non-pipelined echo commands internally adds 05c2cd15d03 [lit] Fix import StringIO errors in Python 3 adds 609a5df2257 [Hexagon] Add support for nontemporal loads and stores on HVX adds f6179755b35 [PPC] Fix two bugs in frame lowering. adds 5cc2236f0f1 [Support] - Add bad alloc error handler for handling alloca [...] adds c3676c8ea95 [Hexagon] Do not rely on callee-saved info in hasFP adds 2d2fec383bb [LoopUnrollRuntime] Avoid multi-exit nested loop with epilo [...] adds 75890a7f285 [X86][LLVM]Expanding Supports lowerInterleavedStore() in X8 [...] adds 2e2081eea24 Revert "AMDGPU: Do not test for SI in getIsaVersion" adds ad68aabcad5 [mips][mt][1/7] Add the MT ASE as a subtarget feature. adds 9c6fbaca353 [msan] Only check shadow memory for operands that are sized. adds 09b7b2c66cd [LibFuzzer] Fix `-Wpedantic` warning reported by Eric Christopher. adds f8b3ea82d03 [LibFuzzer] Fix `-Wcomment` warning emitted by GCC. adds 79b3d6018d2 [PPC] Fix one test case regression for patch https://review [...] adds e57a909956a [NewGVN] Clarify the function invariants formatting them properly. adds 4efbfe05041 [NewGVN] Fix an innocent typo I found while debugging PR33720. adds 8e6b066a75f reverting 307677. adds 17015f9a54d [NewGVN] Check for congruency of memory accesses. adds dcb98bd9b07 [ProfileData] Add new option to dump topn hottest functions adds 849a2b05588 [LoopUnrollRuntime] NFC: Add some debugging trace messages [...] adds 827143c4dfe [AArch64] Remove unused IsDarwin & IsNotDarwin predicates (NFCI). adds 847573ba4ef [ARM, ELF] Don't shift movt relocation offsets adds 0ce5e219d54 [mips][mt][2/7] Implement .module and .set directives for t [...] adds c5da2fdc538 [mips][mt] Correct spelling error in comment. NFCI. adds b6cfd1a79f9 [x86] auto-generate full checks; NFC adds fdda7ea9d5f [CodeGen] Rename DEBUG_TYPE to match passnames adds 8f85685860c Enhance synchscope representation adds c80f62248b7 [codeview] Fix type index discovery for four symbol records adds 3f91c64c16a [Dominators] Use a custom DFS implementation adds dd0b140c37c [IPO] Temporarily rollback r307215. adds 4aebf831108 Fully fix the movw/movt addend. adds 39247cb1d13 [CMake] Support multi-target runtimes build adds 028eab103d7 [codeview] Change readobj symbol dumping format adds 210f5224866 Simplify interface now that we don't need to pass IsPCRel. NFC. adds 4cdc8839345 Fix unused variable warnings adds c9c28d96fab [WebAssembly] Expose the offset of each data segment adds 3b58ca74d38 [Dominators][NFC] Remove extra semicolon... adds 8a1e60719d5 LowerTypeTests: When importing functions skip definitions w [...] adds 831d1262d31 Fix minor typo introduced in r276404 adds 4b013660b85 Specify complete target triple in test adds 97e16560aab [MemoryBuiltins] Allow truncation in visitAllocaInst() adds 292490b104d [X86] Remove 'barcelona' string from getHostCPUName. Use 'a [...] adds 0b0624a2ca4 [X86] Cleanup the switches in getHostCPUName to remove impo [...] adds 5d2f2672b6c [X86] Sync ProcessorTypes and ProcessorSubtypes enums used [...] adds b8cea18959b [X86] Synchronize the ProcessorFeatures enum used by getHos [...] adds 1f56665b90f [X86][LLVM]Expanding Supports lowerInterleavedStore() in X8 [...] adds fbec1c990e8 Have Module::createRNG return a unique_ptr adds 8577619105d [ARM] GlobalISel: Select s64 G_FCMP adds 3870ce243f0 [PM] Fix a silly bug in my recent update to the CG update logic. adds a3db45981cb [ARM] GlobalISel: Simplify inst selector code. NFC adds dba40dd7a11 [Linker] Add directives to support mixing ARM/Thumb module- [...] adds 84aeab51dbf [mips][mt][3/7] Add IAS support for emt, dmt instructions. adds 2b4e72ee27d fix typo in document; NFC adds fea3236f0e8 [mips][mt] Add missing files from last commit adds 1ca52a5bb68 [X86][SSE] Add 512-bit (iX bitcast(vXi1)) test cases adds ec26641b793 [ARM] Adjust ifcvt heuristic for the diamond ifcvt case adds 103b8238dc4 Make shell redirection construct portable adds 9435879900b [X86][SSE] Fix file check prefix warning breaking buildbots adds 36ae313830b [mips][mt][4/7] Add IAS support for dvpe, evpe instructions. adds c96acc5425f Add element atomic memmove intrinsic adds a48c85bbdeb [X86/FastIsel] Fall-back to SelectionDAG when lowering soft [...] adds 0dedcfc77f5 [CodeGen] Add dependency printer adds ef7264b5e91 Add back a CHECK line. adds 634bcaba6fa [mips][mt][5/7] Add support for fork and yield instructions. adds 7c497afb63f Add a test for r307754 adds 356d2bfeba0 GlobalISel: Handle selection of G_IMPLICIT_DEF in AArch64 adds 8751bf94c8f [x86] add tests for improving sbb transforms; NFC adds f4058b98aee [x86] improve SBB optimizations for SETB/SETA with subtract adds 053573f613c [libFuzzer] Do not use LLVM ostream in tests adds 43e65bfc21e [libFuzzer] NFC Declare LIBFUZZER_FLAGS_BASE outside of an [...] adds a4790a341b7 [libFuzzer] Add a dependency on symbolizer from libFuzzer tests adds 4157affe62e Use std::mutex to avoid memory allocation after OOM adds 7c78172bced [LoopRotate] Fix DomTree update logic for unreachable nodes [...] adds fa1648c5010 Fix to web assembly lib call list adds 39bfdfaa942 [PDB] Enable NativeSession to create symbols for built-in t [...] adds de79ef835a3 Fix non-Windows build after PDB native builtin type change adds 1ece62aab5f [mips][mt][6/7] Add support for mftr, mttr instructions. adds 73d05a2a19d [LV] Don't allow outside uses of IVs if the SCEV is predica [...] adds fc19aecdbe1 Remove unneeded use of #undef DEBUG_TYPE. NFC adds 3fbd441b82d [WebAssembly] Mark element atomic memcpy/memmove intrinsics [...] adds 6805a5db4b1 [AArch64] Add AArch64Subtarget::isFusion function. adds c66d417e680 [LoopUnrollRuntime] NFC: Refactored safety checks of unroll [...] adds 41cc19a3ac5 Don't expose a map in the DWARFContext interface. adds 16be511cb4b [AMDGPU] fcanonicalize elimination optimization adds 9d9b7c829a6 Allow clients to specify search order of DynamicLibraries. adds f4634bee7bf Use --color-diagnostics instead of -color-diagnostics. adds 13ba207632a [AArch64] Only run macro fusion for CPUs with any fusion support. adds 86784318a65 [Solaris] Detect Solaris LD, use detection results to pass [...] adds a06b0910758 Add element atomic memset intrinsic adds 8848feb6a97 [libFuzzer] refactoring in preparation for -reduce_inputs; [...] adds 73136ba7e52 [libFuzzer] remove include <sanitizer/coverage_interface.h [...] adds e7149b956e5 [x86] add select-of-constant tests; NFC adds 5dcc05955f9 [SjLj] Replace recursive block marking algorithm with itera [...] adds ffac88a1585 AMDGPU: Fix converting unanalyzable global loads to SMRD adds 30f6cbbbb13 [libFuzzer] relax test/shrink.test a bit (got broken on windows) adds 7bac219fe19 [PGO] Enhance pgo counter promotion adds dd70def46c1 [CodeGenPrepare] Don't create dead instructions in addrmode [...] adds b0e9b49e0d5 [sanstats] Print the correct line information. adds 95621c21655 [DWARF] Fixing a bug with processing of DWARF v5 indexed st [...] adds bb9605f1d60 [libFuzzer] experimental feature -reduce_inputs (off by def [...] adds 3e4436b3164 [sanstats] Remove a flaky test. adds a204f092720 [libFuzzer] make sure that -reduce_inputs=1 deletes redunda [...] adds 9bf66c730c7 [MIR] Add support for printing and parsing target MMO flags adds cc6cfc778f9 [TargetLowering] Add hook for adding target MMO flags when [...] adds 54df34c168c [opt-viewer] Don't except when debug info is not available. adds 8ca723ae601 [llvm-objdump] Correctly distinguish between the MachO uppe [...] adds 719506a866b [X86] Simplify the getHostCPUName for AMD family 6 and 15. adds ff281e5fb66 fix typos in comments and error messges; NFC adds 3e55e45537c Add original reproducer for r307754 / PR33689 adds 90904c693ce [AVR] Fix indirect calls to function pointers adds 68f374b8d3a [ARM] Inline callee if its target-features are a subset of [...] adds 266135fc7a1 [AVR] Add a 'LLVM_FALLTHROUGH' statement to the AsmParser adds 56b430ad15b [AVR] Fix broken indentation adds e66c9a57ab4 [ARM] Fix typo in test added in r307889 adds 09f612a81fc [ARM] GlobalISel: Move local variable. NFC adds 6255d2f0d18 Fix whitespace indentation. NFCI. adds 5e20776d074 Use isNullConstantOrNullSplatConstant helper. NFCI. adds c1f7b54cef6 Fixup r307893: Silence warning adds be09f2a71d8 [ARM] Tidy up and organise better ARM.td. NFC. adds af4437ed7c0 [DAGCombiner] Fix issue with rotate combines asserting if t [...] adds 91acfe51d79 [PM] Use range-based for loops in LegacyPassManager.cpp (NFC). adds d4a91bbb192 [ARM] GlobalISel: Support G_BR adds 892ccd7f071 Reland "[mips] Fix multiprecision arithmetic." adds d9184f5e733 [RuntimeUnrolling] Update DomTree correctly when exit block [...] adds 9a71cb8ce5e [AArch64] Add preliminary support for ARMv8.1 SUB/AND atomics adds 51a4b73703b [AArch64] Add an SVE target feature to the backend and Targ [...] adds 4e536522a01 [AArch64] Enable the mnemonic spell checker adds 32dcdb95700 Reapply [GlobalOpt] Remove unreachable blocks before optimi [...] adds 74479e8cb31 [GlobalOpt] Autogenerate checks for the test in PR33686. adds d6657666e99 Support: Add llvm::center_justify. adds f9cb6211ccb Put std::mutex usage behind #ifdefs to pacify the sanitizer [...] adds d7b55ebbd0b Documentation fix. NFC. adds 5dbda1ece15 [llvm-objdump] Properly print MachO aarch64 addend relocations adds fec0c652bf5 [AArch64] Implement support for windows style vararg functions adds a87a22c9e10 Fix unused variable warning on EXPENSIVE_CHECKS release bui [...] adds 4632cb1499e [InstCombine] add descriptive comments for tests; NFC adds 35b282e0ac3 [PowerPC] Ensure displacements for DQ-Form instructions are [...] adds 47999fef49d [Hexagon] Use VSPLAT instead of COMBINE for vectors of type [...] adds 1745e246f82 [Dominators] Improve reachability verification adds 72018484653 [X86][tests] Added rotate_vec.ll CodeGen test. NFC precommi [...] adds 92aa19c9813 [lit] add a -vv option to echo all executed commands. adds e603cb062fc Revert "[mips][mt][6/7] Add support for mftr, mttr instructions." adds 14382189fa1 [NFC] Move DEBUG_TYPE macro below includes... adds fe30dbf0abb [PDB] Fix type server handling for archives adds dbe558cf371 [NFC] Move DEBUG_TYPE below includes in Hexagon adds b49a90071a6 [Dominators] Split SemiNCA into smaller functions adds 0dea2319507 [InstCombine] put tests for commuted variants of the same f [...] adds 1ff1f35f8bf [Orc] Fix some Error-related fixmes in CompileOnDemandLayer [...] adds 1a2e7d2ddca [Dominators] Simplify templates adds 40d67727c79 [Dominators] Add CFGBuilder testing utility adds a20c1d0cec2 AMDGPU: Annotate call graph with used features adds 5073cf0c9cd [Dominators] Rename Update.Arc to Update.Edge adds 773ac0d3166 [PDB] Fix quadratic behavior when writing a BinaryItemStream adds c3e0164ec92 Fix build due to const-correctness issue after last minute [...] adds 2ead42c6582 [libFuzzer] move code around; NFC adds 486906f96f2 [Dominators] Define Arc less-than operator inline. adds e302dc70dd0 [DWARF] Introduce verification for the unit header chain in [...] adds 9fc15af9b29 [AMDGPU] fcaninicalize optimization for GFX9+ adds 06e0ac200b5 [libFuzzer] simplify the handling of memmem/strstr adds f9915c27c22 AMDGPU: Detect kernarg segment pointer adds 12ab215732b [libFuzzer] remove stale code; NFC adds ac4ebc9acc5 [libFuzzer] update the comments in afl/afl_driver.cpp adds c0e7d7e6da0 [CMake]Use LLVM_LIBRARY_DIR for lib path. adds 1b2c1142279 Remove set but not used variables from the debug info verif [...] adds 4cbfb4282bb [SLPVectorizer] Add an extra parameter to alreadyVectorized [...] adds 66d21bb6ce7 Add a set of comments explaining why getSubtargetImpl() is [...] adds 6173f5825a6 [opt-viewer] Flush stdout after progress update adds a9a5cb971fb [IRCE] Fix corner case with Start = INT_MAX adds 676084e2a9b [ARM] Allow rematerialization of ARM Thumb literal pool loads adds 45a832a04eb [RelTest] Diana is doing both releases now new a623298d4f7 Updating branches/google/stable to r308006

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: CMakeLists.txt | 11 +- CODE_OWNERS.TXT | 3 +- CREDITS.TXT | 9 +- RELEASE_TESTERS.TXT | 7 +- bindings/ocaml/target/target_ocaml.c | 2 +- cmake/modules/AddLLVM.cmake | 26 +- cmake/modules/HandleLLVMOptions.cmake | 4 +- cmake/modules/LLVMExternalProjectUtils.cmake | 10 +- cmake/modules/TableGen.cmake | 29 +- docs/AMDGPUUsage.rst | 24 +- docs/CMake.rst | 12 +- docs/CMakePrimer.rst | 27 - docs/CommandGuide/lit.rst | 14 + docs/CommandGuide/llvm-cov.rst | 6 + docs/CommandGuide/llvm-nm.rst | 3 - docs/CommandGuide/llvm-profdata.rst | 6 + docs/Coroutines.rst | 2 +- docs/Docker.rst | 199 + docs/Dummy.html | 0 docs/GoldPlugin.rst | 20 +- docs/HowToAddABuilder.rst | 3 + docs/LangRef.rst | 264 +- docs/LibFuzzer.rst | 2 +- docs/Proposals/VectorizationPlan.rst | 2 +- docs/ReleaseNotes.rst | 14 +- docs/XRay.rst | 2 +- docs/index.rst | 4 + docs/tutorial/BuildingAJIT1.rst | 8 +- docs/tutorial/BuildingAJIT2.rst | 4 +- docs/tutorial/LangImpl02.rst | 2 +- docs/tutorial/LangImpl03.rst | 6 +- docs/tutorial/LangImpl04.rst | 2 +- docs/tutorial/LangImpl05.rst | 4 +- docs/tutorial/LangImpl06.rst | 4 +- docs/tutorial/OCamlLangImpl5.rst | 2 +- .../BuildingAJIT/Chapter1/KaleidoscopeJIT.h | 18 +- .../Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp | 2 +- .../BuildingAJIT/Chapter2/KaleidoscopeJIT.h | 24 +- .../Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp | 2 +- .../BuildingAJIT/Chapter3/KaleidoscopeJIT.h | 23 +- .../Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp | 2 +- .../BuildingAJIT/Chapter4/KaleidoscopeJIT.h | 26 +- .../Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp | 2 +- .../BuildingAJIT/Chapter5/KaleidoscopeJIT.h | 41 +- .../Kaleidoscope/BuildingAJIT/Chapter5/toy.cpp | 2 +- examples/Kaleidoscope/Chapter4/toy.cpp | 2 +- examples/Kaleidoscope/Chapter5/toy.cpp | 2 +- examples/Kaleidoscope/Chapter6/toy.cpp | 2 +- examples/Kaleidoscope/Chapter7/toy.cpp | 2 +- examples/Kaleidoscope/include/KaleidoscopeJIT.h | 22 +- include/llvm-c/OrcBindings.h | 75 +- include/llvm-c/Transforms/Vectorize.h | 2 +- include/llvm/ADT/APInt.h | 34 +- include/llvm/ADT/STLExtras.h | 4 + include/llvm/ADT/SmallPtrSet.h | 11 +- include/llvm/ADT/StringExtras.h | 28 + include/llvm/ADT/Triple.h | 1 + include/llvm/Analysis/AliasSetTracker.h | 13 +- include/llvm/Analysis/BlockFrequencyInfoImpl.h | 2 +- include/llvm/Analysis/CFLAliasAnalysisUtils.h | 58 + include/llvm/Analysis/CFLAndersAliasAnalysis.h | 27 +- include/llvm/Analysis/CFLSteensAliasAnalysis.h | 24 +- include/llvm/Analysis/CGSCCPassManager.h | 17 +- include/llvm/Analysis/InlineCost.h | 2 +- include/llvm/Analysis/IteratedDominanceFrontier.h | 1 - include/llvm/Analysis/LazyCallGraph.h | 18 +- include/llvm/Analysis/LazyValueInfo.h | 7 + include/llvm/Analysis/Loads.h | 9 + include/llvm/Analysis/LoopInfoImpl.h | 9 +- include/llvm/Analysis/MemoryBuiltins.h | 3 + include/llvm/Analysis/MemorySSA.h | 10 +- include/llvm/Analysis/OptimizationDiagnosticInfo.h | 6 +- include/llvm/Analysis/RegionInfo.h | 211 +- include/llvm/Analysis/RegionInfoImpl.h | 47 +- include/llvm/Analysis/RegionIterator.h | 77 +- include/llvm/Analysis/ScalarEvolution.h | 54 +- include/llvm/Analysis/ScalarEvolutionExpressions.h | 28 +- include/llvm/Analysis/TargetTransformInfo.h | 75 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 25 +- include/llvm/Analysis/ValueTracking.h | 3 +- include/llvm/BinaryFormat/COFF.h | 8 +- include/llvm/BinaryFormat/Dwarf.h | 5 +- include/llvm/BinaryFormat/Wasm.h | 15 +- include/llvm/Bitcode/BitcodeReader.h | 7 +- include/llvm/Bitcode/BitcodeWriter.h | 20 +- include/llvm/Bitcode/LLVMBitCodes.h | 20 +- include/llvm/CodeGen/AsmPrinter.h | 4 +- include/llvm/CodeGen/BasicTTIImpl.h | 5 +- include/llvm/CodeGen/DIE.h | 6 +- include/llvm/CodeGen/GlobalISel/CallLowering.h | 40 +- include/llvm/CodeGen/GlobalISel/IRTranslator.h | 30 +- .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 173 +- .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 337 + include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 8 +- include/llvm/CodeGen/GlobalISel/LegalizerInfo.h | 59 +- include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 86 +- include/llvm/CodeGen/GlobalISel/RegBankSelect.h | 52 +- include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 44 +- include/llvm/CodeGen/GlobalISel/Types.h | 12 +- include/llvm/CodeGen/LexicalScopes.h | 2 +- include/llvm/CodeGen/LiveRegUnits.h | 10 +- include/llvm/CodeGen/MachineBasicBlock.h | 3 + include/llvm/CodeGen/MachineFunction.h | 2 +- include/llvm/CodeGen/MachineMemOperand.h | 20 +- .../CodeGen/MachineOptimizationRemarkEmitter.h | 2 +- include/llvm/CodeGen/MachinePassRegistry.h | 37 +- include/llvm/CodeGen/MachineScheduler.h | 10 +- include/llvm/CodeGen/MachineValueType.h | 24 +- include/llvm/CodeGen/MacroFusion.h | 23 +- include/llvm/CodeGen/PseudoSourceValue.h | 6 +- include/llvm/CodeGen/RuntimeLibcalls.h | 23 + include/llvm/CodeGen/ScheduleDAG.h | 8 +- include/llvm/CodeGen/SelectionDAG.h | 4 +- include/llvm/CodeGen/SelectionDAGAddressAnalysis.h | 64 + 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lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 2 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 + lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 88 +- .../SelectionDAG/SelectionDAGAddressAnalysis.cpp | 115 + lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 136 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 6 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 9 +- lib/CodeGen/SjLjEHPrepare.cpp | 7 +- lib/CodeGen/SplitKit.cpp | 8 +- lib/CodeGen/TargetLoweringBase.cpp | 54 + lib/CodeGen/TargetPassConfig.cpp | 36 +- lib/CodeGen/TwoAddressInstructionPass.cpp | 11 +- lib/DebugInfo/CodeView/CVSymbolVisitor.cpp | 28 +- .../CodeView/DebugChecksumsSubsection.cpp | 16 +- lib/DebugInfo/CodeView/DebugCrossExSubsection.cpp | 6 +- lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp | 14 +- .../CodeView/DebugInlineeLinesSubsection.cpp | 14 +- lib/DebugInfo/CodeView/DebugLinesSubsection.cpp | 13 +- .../CodeView/DebugStringTableSubsection.cpp | 11 +- lib/DebugInfo/CodeView/DebugSubsectionRecord.cpp | 14 +- .../CodeView/DebugSymbolRVASubsection.cpp | 7 +- lib/DebugInfo/CodeView/EnumTables.cpp | 24 +- lib/DebugInfo/CodeView/Formatters.cpp | 8 +- .../CodeView/LazyRandomTypeCollection.cpp | 25 +- lib/DebugInfo/CodeView/StringsAndChecksums.cpp | 8 +- lib/DebugInfo/CodeView/SymbolDumper.cpp | 91 +- lib/DebugInfo/CodeView/SymbolSerializer.cpp | 11 +- lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp | 113 + lib/DebugInfo/CodeView/TypeSerializer.cpp | 36 +- lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 18 +- lib/DebugInfo/DWARF/CMakeLists.txt | 1 + .../DWARF/DWARFAbbreviationDeclaration.cpp | 80 +- lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp | 42 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 224 +- lib/DebugInfo/DWARF/DWARFDataExtractor.cpp | 24 + lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 3 +- lib/DebugInfo/DWARF/DWARFDebugInfoEntry.cpp | 6 +- lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 74 +- lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp | 11 +- lib/DebugInfo/DWARF/DWARFDie.cpp | 4 +- lib/DebugInfo/DWARF/DWARFFormValue.cpp | 133 +- lib/DebugInfo/DWARF/DWARFUnit.cpp | 72 +- lib/DebugInfo/DWARF/DWARFVerifier.cpp | 160 +- lib/DebugInfo/MSF/MSFBuilder.cpp | 27 +- lib/DebugInfo/MSF/MSFCommon.cpp | 6 +- lib/DebugInfo/MSF/MappedBlockStream.cpp | 23 +- lib/DebugInfo/PDB/CMakeLists.txt | 2 + lib/DebugInfo/PDB/DIA/DIASession.cpp | 2 +- lib/DebugInfo/PDB/GenericError.cpp | 2 + .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 6 +- lib/DebugInfo/PDB/Native/DbiModuleList.cpp | 11 +- lib/DebugInfo/PDB/Native/DbiStream.cpp | 59 +- lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 26 +- lib/DebugInfo/PDB/Native/Hash.cpp | 2 +- lib/DebugInfo/PDB/Native/HashTable.cpp | 16 +- lib/DebugInfo/PDB/Native/InfoStream.cpp | 8 + lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 42 +- .../PDB/Native/ModuleDebugStreamBuilder.cpp | 0 lib/DebugInfo/PDB/Native/NamedStreamMap.cpp | 35 +- lib/DebugInfo/PDB/Native/NativeBuiltinSymbol.cpp | 48 + lib/DebugInfo/PDB/Native/NativeCompilandSymbol.cpp | 9 +- lib/DebugInfo/PDB/Native/NativeEnumModules.cpp | 4 +- lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp | 9 +- lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp | 37 +- lib/DebugInfo/PDB/Native/NativeSession.cpp | 82 +- lib/DebugInfo/PDB/Native/PDBFile.cpp | 17 +- lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp | 27 +- lib/DebugInfo/PDB/Native/PDBStringTable.cpp | 2 +- lib/DebugInfo/PDB/Native/PDBTypeServerHandler.cpp | 9 +- lib/DebugInfo/PDB/Native/PublicsStream.cpp | 16 +- lib/DebugInfo/PDB/Native/PublicsStreamBuilder.cpp | 89 + lib/DebugInfo/PDB/Native/TpiStream.cpp | 12 +- lib/DebugInfo/PDB/PDB.cpp | 12 +- lib/DebugInfo/PDB/PDBExtras.cpp | 4 +- lib/DebugInfo/PDB/UDTLayout.cpp | 18 +- lib/ExecutionEngine/MCJIT/MCJIT.cpp | 19 +- lib/ExecutionEngine/Orc/OrcCBindings.cpp | 63 +- lib/ExecutionEngine/Orc/OrcCBindingsStack.h | 130 +- lib/ExecutionEngine/Orc/OrcError.cpp | 21 + lib/ExecutionEngine/Orc/OrcMCJITReplacement.cpp | 5 + lib/ExecutionEngine/Orc/OrcMCJITReplacement.h | 105 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 33 +- .../RuntimeDyld/RuntimeDyldCOFF.cpp | 7 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 2 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 7 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 2 +- .../RuntimeDyld/RuntimeDyldMachO.cpp | 3 +- lib/Fuzzer/CMakeLists.txt | 3 +- lib/Fuzzer/FuzzerCorpus.h | 81 +- lib/Fuzzer/FuzzerDriver.cpp | 6 +- lib/Fuzzer/FuzzerExtFunctionsWeak.cpp | 3 +- lib/Fuzzer/FuzzerFlags.def | 4 +- lib/Fuzzer/FuzzerIOWindows.cpp | 4 +- lib/Fuzzer/FuzzerInternal.h | 18 +- lib/Fuzzer/FuzzerLoop.cpp | 70 +- lib/Fuzzer/FuzzerMutate.cpp | 23 +- lib/Fuzzer/FuzzerMutate.h | 6 - lib/Fuzzer/FuzzerOptions.h | 1 + lib/Fuzzer/FuzzerTracePC.cpp | 83 + lib/Fuzzer/FuzzerTracePC.h | 23 + lib/Fuzzer/FuzzerTraceState.cpp | 181 - lib/Fuzzer/FuzzerUtil.cpp | 7 + lib/Fuzzer/FuzzerUtil.h | 2 + lib/Fuzzer/FuzzerUtilDarwin.cpp | 13 +- lib/Fuzzer/afl/afl_driver.cpp | 4 +- lib/Fuzzer/test/CMakeLists.txt | 3 +- lib/Fuzzer/test/FuzzerUnittest.cpp | 34 +- lib/Fuzzer/test/ShrinkControlFlowSimpleTest.cpp | 19 + lib/Fuzzer/test/fuzzer-traces-hooks.test | 2 +- lib/Fuzzer/test/reduce_inputs.test | 13 + lib/IR/AsmWriter.cpp | 66 +- lib/IR/Attributes.cpp | 33 + lib/IR/AutoUpgrade.cpp | 39 +- lib/IR/BasicBlock.cpp | 13 + lib/IR/CMakeLists.txt | 1 + lib/IR/ConstantFold.cpp | 38 +- lib/IR/Constants.cpp | 75 +- lib/IR/Core.cpp | 22 +- lib/IR/Dominators.cpp | 22 +- lib/IR/Instruction.cpp | 11 +- lib/IR/Instructions.cpp | 99 +- lib/IR/LLVMContext.cpp | 35 +- lib/IR/LLVMContextImpl.cpp | 14 + lib/IR/LLVMContextImpl.h | 17 +- lib/IR/LegacyPassManager.cpp | 51 +- lib/IR/Module.cpp | 4 +- lib/IR/SafepointIRVerifier.cpp | 437 + lib/IR/Type.cpp | 2 +- lib/IR/Verifier.cpp | 96 +- lib/LTO/LTO.cpp | 49 +- lib/LTO/ThinLTOCodeGenerator.cpp | 1 - lib/Linker/IRMover.cpp | 18 +- lib/MC/CMakeLists.txt | 2 +- lib/MC/ELFObjectWriter.cpp | 13 +- lib/MC/MCAssembler.cpp | 50 +- lib/MC/MCFragment.cpp | 18 +- lib/MC/MCSection.cpp | 2 +- lib/MC/MCWinCOFFStreamer.cpp | 298 + lib/MC/MachObjectWriter.cpp | 2 +- lib/MC/WasmObjectWriter.cpp | 331 +- lib/MC/WinCOFFObjectWriter.cpp | 35 +- lib/MC/WinCOFFStreamer.cpp | 296 - lib/Object/CMakeLists.txt | 1 + lib/Object/COFFObjectFile.cpp | 45 +- lib/Object/IRSymtab.cpp | 84 +- lib/Object/MachOObjectFile.cpp | 39 +- lib/Object/WasmObjectFile.cpp | 56 +- lib/Object/WindowsResource.cpp | 30 +- lib/ObjectYAML/COFFYAML.cpp | 62 +- lib/ObjectYAML/CodeViewYAMLDebugSections.cpp | 53 +- lib/ObjectYAML/CodeViewYAMLSymbols.cpp | 42 +- lib/ObjectYAML/CodeViewYAMLTypes.cpp | 75 +- lib/ObjectYAML/DWARFEmitter.cpp | 40 +- lib/ObjectYAML/DWARFYAML.cpp | 4 +- lib/ObjectYAML/ELFYAML.cpp | 18 +- lib/ObjectYAML/MachOYAML.cpp | 50 +- lib/ObjectYAML/ObjectYAML.cpp | 9 +- lib/ObjectYAML/WasmYAML.cpp | 13 +- lib/ObjectYAML/YAML.cpp | 5 +- lib/Option/OptTable.cpp | 8 +- lib/Passes/PassBuilder.cpp | 301 +- lib/ProfileData/Coverage/CoverageMapping.cpp | 61 +- lib/ProfileData/Coverage/CoverageMappingReader.cpp | 16 +- lib/ProfileData/InstrProf.cpp | 64 +- lib/ProfileData/InstrProfReader.cpp | 26 +- lib/ProfileData/InstrProfWriter.cpp | 58 +- lib/Support/AMDGPUCodeObjectMetadata.cpp | 2 - lib/Support/APInt.cpp | 9 +- lib/Support/BinaryStreamReader.cpp | 6 + lib/Support/CachePruning.cpp | 55 +- lib/Support/CommandLine.cpp | 13 +- lib/Support/DataExtractor.cpp | 7 + lib/Support/DynamicLibrary.cpp | 43 +- lib/Support/ErrorHandling.cpp | 84 +- lib/Support/GraphWriter.cpp | 19 +- lib/Support/Host.cpp | 405 +- lib/Support/MemoryBuffer.cpp | 13 +- lib/Support/Mutex.cpp | 5 + lib/Support/TargetParser.cpp | 38 + lib/Support/Triple.cpp | 2 + lib/Support/Unix/DynamicLibrary.inc | 3 + lib/Support/Unix/Host.inc | 25 +- lib/Support/Unix/Path.inc | 12 +- lib/Support/Unix/Process.inc | 12 +- lib/Support/Unix/Program.inc | 3 - lib/Support/Windows/DynamicLibrary.inc | 2 + lib/Support/Windows/Host.inc | 4 + lib/Support/YAMLParser.cpp | 58 +- lib/Support/YAMLTraits.cpp | 50 +- lib/Support/raw_ostream.cpp | 29 +- lib/Target/AArch64/AArch64.h | 2 + lib/Target/AArch64/AArch64.td | 3 + lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 2 +- lib/Target/AArch64/AArch64CallingConvention.td | 7 + .../AArch64/AArch64CleanupLocalDynamicTLSPass.cpp | 2 +- lib/Target/AArch64/AArch64CondBrTuning.cpp | 339 + lib/Target/AArch64/AArch64ConditionalCompares.cpp | 48 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 51 + lib/Target/AArch64/AArch64FastISel.cpp | 3 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 11 +- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 15 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 66 +- lib/Target/AArch64/AArch64ISelLowering.h | 1 + lib/Target/AArch64/AArch64InstrAtomics.td | 56 + lib/Target/AArch64/AArch64InstrInfo.cpp | 38 +- lib/Target/AArch64/AArch64InstrInfo.h | 44 +- lib/Target/AArch64/AArch64InstrInfo.td | 17 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 22 +- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 14 +- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 20 +- lib/Target/AArch64/AArch64MCInstLower.cpp | 15 +- lib/Target/AArch64/AArch64MCInstLower.h | 2 + .../AArch64/AArch64RedundantCopyElimination.cpp | 1 + lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 4 - lib/Target/AArch64/AArch64RegisterInfo.cpp | 2 +- lib/Target/AArch64/AArch64SchedA57.td | 2 +- lib/Target/AArch64/AArch64SchedFalkorDetails.td | 24 +- lib/Target/AArch64/AArch64SchedThunderX2T99.td | 1221 +- lib/Target/AArch64/AArch64Subtarget.cpp | 5 +- lib/Target/AArch64/AArch64Subtarget.h | 9 + lib/Target/AArch64/AArch64TargetMachine.cpp | 17 +- lib/Target/AArch64/AArch64TargetMachine.h | 3 + lib/Target/AArch64/AArch64TargetObjectFile.h | 3 + lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 77 +- lib/Target/AArch64/AArch64TargetTransformInfo.h | 6 +- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 21 +- lib/Target/AArch64/CMakeLists.txt | 1 + .../AArch64/Disassembler/AArch64Disassembler.cpp | 4 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 90 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 123 +- .../AArch64/MCTargetDesc/AArch64ELFStreamer.cpp | 4 + .../AArch64/MCTargetDesc/AArch64FixupKinds.h | 38 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 6 + lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h | 5 + .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 18 +- .../AArch64/MCTargetDesc/AArch64MCTargetDesc.h | 2 + .../MCTargetDesc/AArch64WinCOFFObjectWriter.cpp | 65 + .../MCTargetDesc/AArch64WinCOFFStreamer.cpp | 37 + .../AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h | 43 + lib/Target/AArch64/MCTargetDesc/CMakeLists.txt | 2 + lib/Target/AMDGPU/AMDGPU.h | 3 +- lib/Target/AMDGPU/AMDGPU.td | 41 +- lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 214 +- lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 9 +- lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 9 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 2 + lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 11 +- lib/Target/AMDGPU/AMDGPUInstrInfo.td | 10 + lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 3 + lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 13 +- lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 4 +- lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 64 + lib/Target/AMDGPU/AMDGPUMacroFusion.h | 19 + lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 63 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 29 + lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 48 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 2 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 3 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 290 +- lib/Target/AMDGPU/BUFInstructions.td | 411 +- lib/Target/AMDGPU/CMakeLists.txt | 2 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 102 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 10 +- lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 2 +- lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 2 +- lib/Target/AMDGPU/GCNRegPressure.cpp | 2 +- lib/Target/AMDGPU/GCNSchedStrategy.cpp | 2 +- lib/Target/AMDGPU/GCNSchedStrategy.h | 2 +- .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 19 +- lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | 4 + .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 48 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 12 +- lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 64 +- lib/Target/AMDGPU/MIMGInstructions.td | 1 + lib/Target/AMDGPU/Processors.td | 4 +- lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 2 +- lib/Target/AMDGPU/R600ISelLowering.cpp | 3 +- lib/Target/AMDGPU/R600ISelLowering.h | 3 +- lib/Target/AMDGPU/R600MachineScheduler.cpp | 2 +- lib/Target/AMDGPU/SIDefines.h | 6 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 1 + lib/Target/AMDGPU/SIFrameLowering.cpp | 83 +- lib/Target/AMDGPU/SIFrameLowering.h | 4 + lib/Target/AMDGPU/SIISelLowering.cpp | 439 +- lib/Target/AMDGPU/SIISelLowering.h | 6 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 99 +- lib/Target/AMDGPU/SIInstrInfo.h | 11 + lib/Target/AMDGPU/SIInstrInfo.td | 199 +- lib/Target/AMDGPU/SIInstructions.td | 8 + lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 16 +- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 14 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 2 +- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 124 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 11 +- lib/Target/AMDGPU/SIRegisterInfo.h | 7 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 78 +- lib/Target/AMDGPU/SITypeRewriter.cpp | 156 - lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp | 2 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 21 + lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 3 + lib/Target/AMDGPU/VOP1Instructions.td | 16 +- lib/Target/AMDGPU/VOP2Instructions.td | 68 +- lib/Target/AMDGPU/VOP3PInstructions.td | 28 +- lib/Target/AMDGPU/VOPCInstructions.td | 28 +- lib/Target/AMDGPU/VOPInstructions.td | 106 +- lib/Target/ARM/ARM.td | 448 +- lib/Target/ARM/ARMAsmPrinter.cpp | 1 + lib/Target/ARM/ARMBaseInstrInfo.cpp | 56 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 19 +- lib/Target/ARM/ARMCallLowering.cpp | 2 +- lib/Target/ARM/ARMISelDAGToDAG.cpp | 20 +- lib/Target/ARM/ARMISelLowering.cpp | 35 +- lib/Target/ARM/ARMISelLowering.h | 3 +- lib/Target/ARM/ARMInstrThumb.td | 8 +- lib/Target/ARM/ARMInstrThumb2.td | 12 +- lib/Target/ARM/ARMInstructionSelector.cpp | 324 +- lib/Target/ARM/ARMLegalizerInfo.cpp | 250 +- lib/Target/ARM/ARMLegalizerInfo.h | 33 + lib/Target/ARM/ARMMacroFusion.cpp | 57 + lib/Target/ARM/ARMMacroFusion.h | 24 + lib/Target/ARM/ARMRegisterBankInfo.cpp | 49 +- lib/Target/ARM/ARMRegisterInfo.td | 4 + lib/Target/ARM/ARMSchedule.td | 1 + lib/Target/ARM/ARMScheduleM3.td | 21 + lib/Target/ARM/ARMSubtarget.cpp | 77 +- lib/Target/ARM/ARMSubtarget.h | 14 + lib/Target/ARM/ARMTargetMachine.cpp | 145 +- lib/Target/ARM/ARMTargetMachine.h | 5 +- lib/Target/ARM/ARMTargetObjectFile.cpp | 34 +- lib/Target/ARM/ARMTargetObjectFile.h | 2 - lib/Target/ARM/ARMTargetTransformInfo.cpp | 18 + lib/Target/ARM/ARMTargetTransformInfo.h | 36 + lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 77 +- lib/Target/ARM/CMakeLists.txt | 1 + lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 2 +- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 87 +- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h | 24 +- lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h | 83 +- .../ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp | 7 +- lib/Target/ARM/Thumb1FrameLowering.cpp | 2 +- lib/Target/AVR/AVRAsmPrinter.cpp | 5 +- lib/Target/AVR/AVRDevices.td | 23 +- lib/Target/AVR/AVRInstrInfo.cpp | 72 +- lib/Target/AVR/AVRInstrInfo.h | 4 + lib/Target/AVR/AVRInstrInfo.td | 32 +- lib/Target/AVR/AVRMCInstLower.cpp | 16 +- lib/Target/AVR/AVRRegisterInfo.cpp | 11 +- lib/Target/AVR/AVRRegisterInfo.td | 7 +- lib/Target/AVR/AVRTargetMachine.cpp | 6 + lib/Target/AVR/AsmParser/AVRAsmParser.cpp | 1 + lib/Target/AVR/InstPrinter/AVRInstPrinter.cpp | 2 +- lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp | 47 +- lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h | 15 +- lib/Target/AVR/MCTargetDesc/AVRELFStreamer.cpp | 2 +- lib/Target/BPF/BPFISelDAGToDAG.cpp | 312 +- lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp | 12 +- lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 1 + lib/Target/Hexagon/HexagonBitSimplify.cpp | 6 +- lib/Target/Hexagon/HexagonBitTracker.cpp | 1 + lib/Target/Hexagon/HexagonConstPropagation.cpp | 1 + lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 4 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 19 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 234 +- lib/Target/Hexagon/HexagonFrameLowering.h | 17 +- lib/Target/Hexagon/HexagonGenInsert.cpp | 4 +- lib/Target/Hexagon/HexagonGenMux.cpp | 86 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 5 +- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 46 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 171 +- lib/Target/Hexagon/HexagonISelLowering.h | 27 +- lib/Target/Hexagon/HexagonInstrInfo.cpp | 102 +- lib/Target/Hexagon/HexagonInstrInfo.h | 21 + lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +- lib/Target/Hexagon/HexagonNewValueJump.cpp | 63 +- lib/Target/Hexagon/HexagonOptAddrMode.cpp | 14 +- lib/Target/Hexagon/HexagonPatterns.td | 178 +- lib/Target/Hexagon/HexagonPeephole.cpp | 54 +- lib/Target/Hexagon/HexagonPseudo.td | 10 + lib/Target/Hexagon/HexagonSplitDouble.cpp | 2 + lib/Target/Hexagon/HexagonTargetMachine.cpp | 9 +- lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 9 + lib/Target/Hexagon/HexagonTargetObjectFile.h | 3 + lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 17 +- lib/Target/Hexagon/HexagonTargetTransformInfo.h | 8 +- lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 12 +- .../Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 34 +- lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 13 +- .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 53 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 2 + lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp | 1 + lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp | 12 +- lib/Target/MSP430/MSP430TargetMachine.cpp | 8 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 175 +- lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h | 2 + lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 8 +- lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h | 5 +- .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 17 + lib/Target/Mips/MicroMips64r6InstrInfo.td | 12 + lib/Target/Mips/Mips.td | 2 + lib/Target/Mips/Mips32r6InstrInfo.td | 6 +- lib/Target/Mips/Mips64InstrInfo.td | 12 +- lib/Target/Mips/MipsDelaySlotFiller.cpp | 2 +- lib/Target/Mips/MipsISelLowering.cpp | 20 +- lib/Target/Mips/MipsInstrInfo.td | 11 +- lib/Target/Mips/MipsMTInstrFormats.td | 78 + lib/Target/Mips/MipsMTInstrInfo.td | 98 + lib/Target/Mips/MipsSEISelLowering.cpp | 18 +- lib/Target/Mips/MipsSchedule.td | 14 +- lib/Target/Mips/MipsScheduleGeneric.td | 14 +- lib/Target/Mips/MipsScheduleP5600.td | 2 +- lib/Target/Mips/MipsSubtarget.cpp | 3 +- lib/Target/Mips/MipsSubtarget.h | 4 + lib/Target/Mips/MipsTargetStreamer.h | 6 + lib/Target/NVPTX/NVPTXISelLowering.cpp | 3 +- lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 35 +- lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp | 4 +- lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 3 +- lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 18 +- lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h | 34 +- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 3 +- .../PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp | 4 +- lib/Target/PowerPC/PPC.h | 6 +- lib/Target/PowerPC/PPCCTRLoops.cpp | 113 +- lib/Target/PowerPC/PPCFrameLowering.cpp | 38 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 80 +- lib/Target/PowerPC/PPCISelLowering.cpp | 195 +- lib/Target/PowerPC/PPCISelLowering.h | 9 +- lib/Target/PowerPC/PPCInstr64Bit.td | 6 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 23 + lib/Target/PowerPC/PPCInstrInfo.h | 2 + lib/Target/PowerPC/PPCInstrInfo.td | 213 +- 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lib/Target/SystemZ/SystemZ.td | 1 + lib/Target/SystemZ/SystemZFeatures.td | 22 +- lib/Target/SystemZ/SystemZFrameLowering.cpp | 17 +- lib/Target/SystemZ/SystemZHazardRecognizer.cpp | 2 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 112 +- lib/Target/SystemZ/SystemZISelLowering.h | 21 +- lib/Target/SystemZ/SystemZInstrFormats.td | 106 + lib/Target/SystemZ/SystemZInstrInfo.td | 173 +- lib/Target/SystemZ/SystemZInstrSystem.td | 517 + lib/Target/SystemZ/SystemZLDCleanup.cpp | 2 +- lib/Target/SystemZ/SystemZMachineScheduler.cpp | 4 +- lib/Target/SystemZ/SystemZMachineScheduler.h | 2 +- lib/Target/SystemZ/SystemZOperators.td | 22 +- lib/Target/SystemZ/SystemZRegisterInfo.td | 10 + lib/Target/SystemZ/SystemZScheduleZ13.td | 381 +- lib/Target/SystemZ/SystemZScheduleZ196.td | 194 +- lib/Target/SystemZ/SystemZScheduleZEC12.td | 195 +- lib/Target/SystemZ/SystemZSubtarget.cpp | 5 +- lib/Target/SystemZ/SystemZSubtarget.h | 15 + lib/Target/SystemZ/SystemZTargetMachine.h | 2 - lib/Target/SystemZ/SystemZTargetTransformInfo.cpp | 7 +- lib/Target/SystemZ/SystemZTargetTransformInfo.h | 3 +- .../MCTargetDesc/WebAssemblyAsmBackend.cpp | 30 +- .../MCTargetDesc/WebAssemblyTargetStreamer.cpp | 28 +- .../MCTargetDesc/WebAssemblyTargetStreamer.h | 8 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 7 +- lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 20 +- lib/Target/WebAssembly/WebAssemblyInstrControl.td | 26 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 - .../WebAssemblyRuntimeLibcallSignatures.cpp | 41 +- lib/Target/X86/AsmParser/X86AsmParser.cpp | 119 +- lib/Target/X86/InstPrinter/X86InstComments.cpp | 4 +- lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 8 +- .../X86/MCTargetDesc/X86MachObjectWriter.cpp | 23 +- .../X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp | 17 +- lib/Target/X86/Utils/X86ShuffleDecode.cpp | 56 +- lib/Target/X86/Utils/X86ShuffleDecode.h | 8 +- lib/Target/X86/X86.td | 31 + lib/Target/X86/X86CallLowering.cpp | 47 +- lib/Target/X86/X86CallLowering.h | 2 +- lib/Target/X86/X86CallingConv.td | 10 +- lib/Target/X86/X86FastISel.cpp | 3 + lib/Target/X86/X86FrameLowering.cpp | 36 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 28 +- lib/Target/X86/X86ISelLowering.cpp | 816 +- lib/Target/X86/X86ISelLowering.h | 39 +- lib/Target/X86/X86InstrAVX512.td | 671 +- lib/Target/X86/X86InstrFragmentsSIMD.td | 24 +- lib/Target/X86/X86InstrInfo.cpp | 2 +- lib/Target/X86/X86InstrSSE.td | 2 +- lib/Target/X86/X86InstructionSelector.cpp | 417 +- lib/Target/X86/X86InterleavedAccess.cpp | 125 +- lib/Target/X86/X86IntrinsicsInfo.h | 24 - lib/Target/X86/X86LegalizerInfo.cpp | 56 +- lib/Target/X86/X86MCInstLower.cpp | 195 +- lib/Target/X86/X86SchedSandyBridge.td | 2472 +- lib/Target/X86/X86ScheduleBtVer2.td | 77 + lib/Target/X86/X86Subtarget.cpp | 55 + lib/Target/X86/X86Subtarget.h | 2 +- lib/Target/X86/X86TargetMachine.cpp | 49 +- lib/Target/X86/X86TargetMachine.h | 3 + lib/Target/X86/X86TargetObjectFile.cpp | 6 + lib/Target/X86/X86TargetObjectFile.h | 5 + lib/Target/X86/X86TargetTransformInfo.cpp | 125 +- lib/Target/X86/X86TargetTransformInfo.h | 3 + lib/Transforms/Coroutines/CoroInstr.h | 44 +- lib/Transforms/IPO/ArgumentPromotion.cpp | 4 + lib/Transforms/IPO/FunctionImport.cpp | 25 +- lib/Transforms/IPO/GlobalOpt.cpp | 28 +- lib/Transforms/IPO/Inliner.cpp | 10 +- lib/Transforms/IPO/LowerTypeTests.cpp | 11 +- lib/Transforms/IPO/PassManagerBuilder.cpp | 93 +- lib/Transforms/IPO/SampleProfile.cpp | 6 +- lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp | 5 +- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 105 +- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 468 +- lib/Transforms/InstCombine/InstCombineCalls.cpp | 307 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 184 +- lib/Transforms/InstCombine/InstCombineCompares.cpp | 439 +- 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.../TypeBasedAliasAnalysis/dynamic-indices.ll | 19 +- test/Assembler/2003-11-11-ImplicitRename.ll | 3 +- test/Assembler/2007-11-26-AttributeOverload.ll | 2 +- test/Assembler/atomic.ll | 26 +- test/Bitcode/Inputs/module-hash-strtab1.ll | 10 + test/Bitcode/Inputs/module-hash-strtab2.ll | 10 + test/Bitcode/atomic-no-syncscope.ll | 17 + test/Bitcode/atomic-no-syncscope.ll.bc | Bin 0 -> 1000 bytes test/Bitcode/atomic.ll | 4 +- test/Bitcode/compatibility-3.6.ll | 24 +- test/Bitcode/compatibility-3.7.ll | 24 +- test/Bitcode/compatibility-3.8.ll | 24 +- test/Bitcode/compatibility-3.9.ll | 24 +- test/Bitcode/compatibility-4.0.ll | 24 +- test/Bitcode/compatibility.ll | 24 +- test/Bitcode/memInstructions.3.2.ll | 104 +- test/Bitcode/module-hash-strtab.ll | 15 + test/Bitcode/module_hash.ll | 8 +- test/Bitcode/thinlto-alias.ll | 2 +- .../thinlto-function-summary-callgraph-pgo.ll | 2 +- ...o-function-summary-callgraph-profile-summary.ll | 4 +- ...ion-summary-callgraph-sample-profile-summary.ll | 4 +- test/Bitcode/thinlto-function-summary-callgraph.ll | 2 +- test/Bitcode/thinlto-function-summary-refgraph.ll | 2 +- test/Bitcode/thinlto-function-summary.ll | 2 +- test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 19 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 85 +- test/CodeGen/AArch64/GlobalISel/call-translator.ll | 4 +- .../AArch64/GlobalISel/irtranslator-exceptions.ll | 2 +- .../AArch64/GlobalISel/legalize-combines.mir | 58 +- .../AArch64/GlobalISel/legalize-exceptions.ll | 7 +- .../AArch64/GlobalISel/legalize-extracts.mir | 85 + test/CodeGen/AArch64/GlobalISel/legalize-undef.mir | 15 + test/CodeGen/AArch64/GlobalISel/no-regclass.mir | 4 +- .../AArch64/GlobalISel/select-implicit-def.mir | 30 + .../GlobalISel/select-intrinsic-aarch64-sdiv.mir | 38 + test/CodeGen/AArch64/GlobalISel/select-trunc.mir | 4 +- test/CodeGen/AArch64/arm64-ccmp.ll | 6 +- test/CodeGen/AArch64/arm64-csldst-mmo.ll | 6 +- test/CodeGen/AArch64/arm64-early-ifcvt.ll | 2 +- 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test/CodeGen/AMDGPU/frame-index-elimination.ll | 8 +- test/CodeGen/AMDGPU/frem.ll | 8 +- test/CodeGen/AMDGPU/fsqrt.f64.ll | 4 +- test/CodeGen/AMDGPU/fsqrt.ll | 6 +- test/CodeGen/AMDGPU/fsub.f16.ll | 28 +- test/CodeGen/AMDGPU/fsub.ll | 24 +- test/CodeGen/AMDGPU/fsub64.ll | 4 +- test/CodeGen/AMDGPU/ftrunc.f64.ll | 6 +- test/CodeGen/AMDGPU/global-extload-i16.ll | 4 +- test/CodeGen/AMDGPU/global-smrd-unknown.ll | 20 + test/CodeGen/AMDGPU/half.ll | 10 +- test/CodeGen/AMDGPU/hsa.ll | 10 +- test/CodeGen/AMDGPU/imm.ll | 4 +- test/CodeGen/AMDGPU/immv216.ll | 8 +- test/CodeGen/AMDGPU/indirect-addressing-si.ll | 8 +- test/CodeGen/AMDGPU/inline-asm.ll | 4 +- .../AMDGPU/invariant-load-no-alias-store.ll | 2 +- test/CodeGen/AMDGPU/llvm.SI.load.dword.ll | 22 +- test/CodeGen/AMDGPU/llvm.SI.tbuffer.store.ll | 52 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll | 2 +- .../AMDGPU/llvm.amdgcn.implicit.buffer.ptr.hsa.ll | 24 + .../AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll | 35 + .../AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll | 12 + test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll | 109 + test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll | 110 + test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 4 +- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 12 +- test/CodeGen/AMDGPU/llvm.exp2.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 12 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 24 +- test/CodeGen/AMDGPU/llvm.log2.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 22 +- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 22 +- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.round.ll | 4 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 12 +- test/CodeGen/AMDGPU/llvm.sqrt.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 8 +- test/CodeGen/AMDGPU/load-global-f32.ll | 10 +- test/CodeGen/AMDGPU/load-global-f64.ll | 6 +- test/CodeGen/AMDGPU/load-global-i16.ll | 10 +- test/CodeGen/AMDGPU/load-global-i32.ll | 8 +- test/CodeGen/AMDGPU/load-global-i64.ll | 10 +- test/CodeGen/AMDGPU/load-global-i8.ll | 10 +- test/CodeGen/AMDGPU/load-weird-sizes.ll | 10 +- test/CodeGen/AMDGPU/lower-mem-intrinsics.ll | 12 + .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 227 + test/CodeGen/AMDGPU/mad-combine.ll | 106 +- test/CodeGen/AMDGPU/madak.ll | 6 +- test/CodeGen/AMDGPU/madmk.ll | 4 +- test/CodeGen/AMDGPU/max.ll | 4 +- test/CodeGen/AMDGPU/merge-store-crash.ll | 4 +- test/CodeGen/AMDGPU/merge-store-usedef.ll | 4 +- test/CodeGen/AMDGPU/merge-stores.ll | 4 +- test/CodeGen/AMDGPU/misched-killflags.mir | 45 + test/CodeGen/AMDGPU/mubuf-offset-private.ll | 26 +- test/CodeGen/AMDGPU/mubuf.ll | 28 +- test/CodeGen/AMDGPU/mul.ll | 6 +- test/CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- test/CodeGen/AMDGPU/no-shrink-extloads.ll | 2 +- test/CodeGen/AMDGPU/or.ll | 6 +- test/CodeGen/AMDGPU/private-access-no-objects.ll | 10 +- .../AMDGPU/promote-alloca-invariant-markers.ll | 2 +- test/CodeGen/AMDGPU/reduce-load-width-alignment.ll | 6 +- test/CodeGen/AMDGPU/regcoal-subrange-join.mir | 162 + ...me-independent-subregs-invalid-mac-operands.mir | 69 - .../rename-independent-subregs-mac-operands.mir | 155 + test/CodeGen/AMDGPU/reorder-stores.ll | 4 +- test/CodeGen/AMDGPU/ret_jump.ll | 7 +- test/CodeGen/AMDGPU/rotl.i64.ll | 4 +- test/CodeGen/AMDGPU/rotr.i64.ll | 4 +- test/CodeGen/AMDGPU/rsq.ll | 8 +- test/CodeGen/AMDGPU/s_movk_i32.ll | 4 +- test/CodeGen/AMDGPU/sad.ll | 4 +- test/CodeGen/AMDGPU/saddo.ll | 6 +- test/CodeGen/AMDGPU/salu-to-valu.ll | 6 +- test/CodeGen/AMDGPU/scalar_to_vector.ll | 6 +- test/CodeGen/AMDGPU/schedule-global-loads.ll | 2 +- test/CodeGen/AMDGPU/scheduler-subrange-crash.ll | 30 +- test/CodeGen/AMDGPU/scratch-buffer.ll | 4 +- test/CodeGen/AMDGPU/scratch-simple.ll | 6 +- test/CodeGen/AMDGPU/sdiv.ll | 6 +- test/CodeGen/AMDGPU/sdwa-gfx9.mir | 88 + test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 446 + test/CodeGen/AMDGPU/sdwa-peephole.ll | 182 +- test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 19 +- test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir | 61 + test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 54 +- test/CodeGen/AMDGPU/select-vectors.ll | 8 +- test/CodeGen/AMDGPU/select.f16.ll | 63 +- test/CodeGen/AMDGPU/setcc-fneg-constant.ll | 6 +- test/CodeGen/AMDGPU/setcc-sext.ll | 292 + test/CodeGen/AMDGPU/setcc.ll | 10 +- test/CodeGen/AMDGPU/sext-in-reg.ll | 8 +- test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll | 4 +- test/CodeGen/AMDGPU/sgpr-copy.ll | 98 +- test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll | 4 +- test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll | 24 +- test/CodeGen/AMDGPU/shift-i64-opts.ll | 78 +- test/CodeGen/AMDGPU/shl.ll | 4 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 161 +- test/CodeGen/AMDGPU/si-lod-bias.ll | 17 +- test/CodeGen/AMDGPU/si-sgpr-spill.ll | 398 +- test/CodeGen/AMDGPU/si-spill-cf.ll | 136 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 11 +- test/CodeGen/AMDGPU/sign_extend.ll | 4 +- test/CodeGen/AMDGPU/sitofp.f16.ll | 4 +- test/CodeGen/AMDGPU/sminmax.ll | 26 +- test/CodeGen/AMDGPU/sminmax.v2i16.ll | 6 +- test/CodeGen/AMDGPU/smrd.ll | 48 +- test/CodeGen/AMDGPU/spill-cfg-position.ll | 2 +- test/CodeGen/AMDGPU/spill-to-smem-m0.ll | 22 + test/CodeGen/AMDGPU/split-smrd.ll | 4 +- test/CodeGen/AMDGPU/sra.ll | 6 +- test/CodeGen/AMDGPU/srem.ll | 6 +- test/CodeGen/AMDGPU/srl.ll | 4 +- test/CodeGen/AMDGPU/ssubo.ll | 6 +- test/CodeGen/AMDGPU/sub.i16.ll | 10 +- test/CodeGen/AMDGPU/sub.ll | 4 +- test/CodeGen/AMDGPU/sub.v2i16.ll | 16 +- test/CodeGen/AMDGPU/syncscopes.ll | 19 + test/CodeGen/AMDGPU/trap.ll | 8 +- test/CodeGen/AMDGPU/trunc-bitcast-vector.ll | 4 +- test/CodeGen/AMDGPU/trunc.ll | 6 +- test/CodeGen/AMDGPU/uaddo.ll | 10 +- test/CodeGen/AMDGPU/udiv.ll | 8 +- test/CodeGen/AMDGPU/uitofp.f16.ll | 4 +- test/CodeGen/AMDGPU/urem.ll | 6 +- test/CodeGen/AMDGPU/usubo.ll | 12 +- test/CodeGen/AMDGPU/v_cndmask.ll | 12 +- test/CodeGen/AMDGPU/v_mac.ll | 10 +- test/CodeGen/AMDGPU/v_mac_f16.ll | 38 +- test/CodeGen/AMDGPU/vectorize-global-local.ll | 2 +- .../AMDGPU/vgpr-spill-emergency-stack-slot.ll | 20 +- test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 161 + test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 40 + test/CodeGen/AMDGPU/vselect.ll | 25 +- test/CodeGen/AMDGPU/waitcnt-permute.mir | 12 - test/CodeGen/AMDGPU/xor.ll | 8 +- test/CodeGen/AMDGPU/zext-i64-bit-operand.ll | 4 +- test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll | 24 +- test/CodeGen/ARM/2012-08-30-select.ll | 7 +- .../ARM/2012-10-18-PR14099-ByvalFrameAddress.ll | 2 +- .../ARM/GlobalISel/arm-instruction-select-cmp.mir | 1252 +- .../ARM/GlobalISel/arm-instruction-select.mir | 94 + test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 15 +- test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll | 30 + test/CodeGen/ARM/GlobalISel/arm-isel.ll | 31 + .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 20 + test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 1612 + test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 88 + test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 109 + test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll | 2 +- test/CodeGen/ARM/Windows/no-arm-mode.ll | 10 - test/CodeGen/ARM/Windows/tls.ll | 14 +- test/CodeGen/ARM/alloca.ll | 4 +- test/CodeGen/ARM/arg-copy-elide.ll | 4 +- test/CodeGen/ARM/arguments-nosplit-double.ll | 1 + test/CodeGen/ARM/arguments-nosplit-i64.ll | 1 + test/CodeGen/ARM/arm-abi-attr.ll | 2 +- test/CodeGen/ARM/arm-and-tst-peephole.ll | 2 +- .../ARM/arm-position-independence-jump-table.ll | 2 +- test/CodeGen/ARM/arm-shrink-wrapping-linux.ll | 10 +- test/CodeGen/ARM/atomic-cmpxchg.ll | 4 +- test/CodeGen/ARM/bool-ext-inc.ll | 28 +- test/CodeGen/ARM/cmpxchg-O0-be.ll | 26 + test/CodeGen/ARM/cmpxchg-weak.ll | 4 +- test/CodeGen/ARM/code-placement.ll | 5 +- test/CodeGen/ARM/constantfp.ll | 12 +- test/CodeGen/ARM/cortex-a57-misched-basic.ll | 6 +- test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll | 8 +- test/CodeGen/ARM/cortex-a57-misched-ldm.ll | 4 +- test/CodeGen/ARM/cortex-a57-misched-stm-wrback.ll | 2 +- test/CodeGen/ARM/cortex-a57-misched-vfma.ll | 28 +- test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll | 10 +- test/CodeGen/ARM/cortex-a57-misched-vldm.ll | 6 +- test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll | 2 +- test/CodeGen/ARM/cortexr52-misched-basic.ll | 4 +- test/CodeGen/ARM/ctor_order.ll | 2 +- test/CodeGen/ARM/ctors_dtors.ll | 2 +- test/CodeGen/ARM/cttz.ll | 4 +- test/CodeGen/ARM/cttz_vector.ll | 64 +- test/CodeGen/ARM/cxx-tlscc.ll | 2 +- test/CodeGen/ARM/execute-only-big-stack-frame.ll | 6 +- test/CodeGen/ARM/execute-only-section.ll | 6 +- test/CodeGen/ARM/execute-only.ll | 6 +- test/CodeGen/ARM/fence-singlethread.ll | 2 +- test/CodeGen/ARM/fp16-promote.ll | 29 +- test/CodeGen/ARM/fp16-v3.ll | 4 +- test/CodeGen/ARM/ifcvt7.ll | 2 - test/CodeGen/ARM/illegal-bitfield-loadstore.ll | 6 +- test/CodeGen/ARM/indirectbr.ll | 4 +- test/CodeGen/ARM/jump-table-islands.ll | 2 +- test/CodeGen/ARM/jump-table-tbh.ll | 6 +- test/CodeGen/ARM/ldm-stm-i256.ll | 20 +- test/CodeGen/ARM/legalize-unaligned-load.ll | 2 +- test/CodeGen/ARM/long-setcc.ll | 2 +- test/CodeGen/ARM/long_shift.ll | 16 +- test/CodeGen/ARM/misched-fusion-aes.ll | 205 + test/CodeGen/ARM/ror.ll | 33 + test/CodeGen/ARM/scavenging.mir | 66 + test/CodeGen/ARM/select_const.ll | 8 +- test/CodeGen/ARM/shift-i64.ll | 2 +- test/CodeGen/ARM/ssp-data-layout.ll | 2 +- test/CodeGen/ARM/str_pre-2.ll | 2 +- test/CodeGen/ARM/swifterror.ll | 52 +- test/CodeGen/ARM/thumb2-it-block.ll | 4 +- test/CodeGen/ARM/vcgt.ll | 4 +- test/CodeGen/ARM/vector-DAGCombine.ll | 10 +- test/CodeGen/ARM/vector-promotion.ll | 4 +- test/CodeGen/ARM/vext.ll | 58 +- test/CodeGen/ARM/vfp.ll | 4 +- test/CodeGen/ARM/vld1.ll | 2 +- test/CodeGen/ARM/vld2.ll | 16 +- test/CodeGen/ARM/vld3.ll | 16 +- test/CodeGen/ARM/vld4.ll | 24 +- test/CodeGen/ARM/vlddup.ll | 54 +- test/CodeGen/ARM/vldlane.ll | 2 +- test/CodeGen/ARM/vpadd.ll | 22 +- test/CodeGen/ARM/vst1.ll | 2 +- test/CodeGen/ARM/vst4.ll | 8 +- test/CodeGen/ARM/vstlane.ll | 6 +- test/CodeGen/ARM/vuzp.ll | 269 +- .../ARM/xray-armv6-attribute-instrumentation.ll | 9 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 9 +- test/CodeGen/AVR/branch-relaxation.ll | 96 + test/CodeGen/AVR/ctlz.ll | 5 +- test/CodeGen/AVR/cttz.ll | 4 +- test/CodeGen/AVR/frmidx-iterator-bug.ll | 33 + .../AVR/icall-func-pointer-correct-addr-space.ll | 15 + test/CodeGen/AVR/pseudo/ANDIWRdK.mir | 6 +- test/CodeGen/AVR/pseudo/COMWRd.mir | 2 +- test/CodeGen/AVR/pseudo/ORIWRdK.mir | 2 +- test/CodeGen/AVR/pseudo/SBCIWRdK.mir | 2 +- test/CodeGen/AVR/pseudo/SUBIWRdK.mir | 2 +- test/CodeGen/AVR/select-mbb-placement-bug.ll | 6 +- test/CodeGen/BPF/remove_truncate_1.ll | 87 + test/CodeGen/BPF/remove_truncate_2.ll | 65 + test/CodeGen/BPF/undef.ll | 58 +- test/CodeGen/Generic/llc-start-stop.ll | 5 +- test/CodeGen/Generic/pr33094.ll | 18 + test/CodeGen/Generic/print-machineinstrs.ll | 27 +- test/CodeGen/Hexagon/addrmode-keepdeadphis.mir | 30 + test/CodeGen/Hexagon/convertdptoint.ll | 8 +- test/CodeGen/Hexagon/convertdptoll.ll | 4 +- test/CodeGen/Hexagon/convertsptoint.ll | 4 +- test/CodeGen/Hexagon/convertsptoll.ll | 4 +- test/CodeGen/Hexagon/dadd.ll | 8 +- test/CodeGen/Hexagon/dmul.ll | 8 +- .../CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll | 8 +- test/CodeGen/Hexagon/dsub.ll | 8 +- test/CodeGen/Hexagon/duplex-addi-global-imm.mir | 22 + test/CodeGen/Hexagon/expand-condsets-imm.mir | 22 + test/CodeGen/Hexagon/expand-condsets-undefvni.ll | 49 + test/CodeGen/Hexagon/expand-vselect-kill.ll | 53 + test/CodeGen/Hexagon/fadd.ll | 8 +- test/CodeGen/Hexagon/fmul.ll | 8 +- test/CodeGen/Hexagon/fpelim-basic.ll | 91 + test/CodeGen/Hexagon/frame.ll | 23 - test/CodeGen/Hexagon/fsub.ll | 8 +- test/CodeGen/Hexagon/hasfp-crash1.ll | 82 + test/CodeGen/Hexagon/hasfp-crash2.ll | 83 + test/CodeGen/Hexagon/hvx-nontemporal.ll | 28 + test/CodeGen/Hexagon/jt-in-text.ll | 57 + test/CodeGen/Hexagon/mux-kill.mir | 15 - test/CodeGen/Hexagon/mux-kill1.mir | 15 + test/CodeGen/Hexagon/mux-kill2.mir | 2 +- test/CodeGen/Hexagon/mux-kill3.mir | 31 + test/CodeGen/Hexagon/newvaluejump-kill.ll | 53 + test/CodeGen/Hexagon/newvaluejump-kill2.mir | 18 + test/CodeGen/Hexagon/newvaluejump2.ll | 2 +- test/CodeGen/Hexagon/regalloc-liveout-undef.mir | 35 + test/CodeGen/Hexagon/stack-align-reset.ll | 51 + test/CodeGen/Hexagon/store-imm-large-stack.ll | 151 + test/CodeGen/Hexagon/target-flag-ext.mir | 24 + test/CodeGen/Hexagon/vec-vararg-align.ll | 30 + test/CodeGen/MIR/AArch64/atomic-memoperands.mir | 4 +- .../MIR/AArch64/invalid-target-memoperands.mir | 19 + test/CodeGen/MIR/AArch64/target-memoperands.mir | 22 + test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir | 20 +- test/CodeGen/MIR/AMDGPU/syncscopes.mir | 98 + test/CodeGen/MIR/AMDGPU/target-flags.mir | 29 + test/CodeGen/MIR/Generic/multiRunPass.mir | 3 +- test/CodeGen/MIR/Generic/runPass.mir | 2 + test/CodeGen/MIR/Hexagon/target-flags.mir | 36 + test/CodeGen/MIR/X86/tied-physical-regs-match.mir | 22 + test/CodeGen/MSP430/Inst16mm.ll | 4 +- test/CodeGen/MSP430/struct_layout.ll | 57 + test/CodeGen/Mips/dins.ll | 39 +- test/CodeGen/Mips/msa/3r_splat.ll | 21 + test/CodeGen/NVPTX/lower-aggr-copies.ll | 65 + test/CodeGen/PowerPC/PR33636.ll | 702 + test/CodeGen/PowerPC/PR33671.ll | 32 + test/CodeGen/PowerPC/anon_aggr.ll | 64 +- test/CodeGen/PowerPC/atomics-regression.ll | 528 +- test/CodeGen/PowerPC/bitreverse.ll | 23 - test/CodeGen/PowerPC/build-vector-tests.ll | 44 +- test/CodeGen/PowerPC/complex-return.ll | 2 +- test/CodeGen/PowerPC/floatPSA.ll | 2 +- test/CodeGen/PowerPC/licm-remat.ll | 179 + .../PowerPC/memCmpUsedInZeroEqualityComparison.ll | 32 +- test/CodeGen/PowerPC/memcmp.ll | 131 +- test/CodeGen/PowerPC/memcmpIR.ll | 90 +- test/CodeGen/PowerPC/memcpy_dereferenceable.ll | 74 + .../PowerPC/merge_stores_dereferenceable.ll | 24 + test/CodeGen/PowerPC/ppc-ctr-dead-code.ll | 38 + test/CodeGen/PowerPC/ppc-redzone-alignment-bug.ll | 32 + test/CodeGen/PowerPC/ppc64-align-long-double.ll | 24 +- test/CodeGen/PowerPC/ppc64-i128-abi.ll | 6 +- test/CodeGen/PowerPC/ppc64le-smallarg.ll | 4 +- test/CodeGen/PowerPC/pr33093.ll | 165 + test/CodeGen/PowerPC/select-addrRegRegOnly.ll | 37 + test/CodeGen/PowerPC/svr4-redzone.ll | 6 +- test/CodeGen/PowerPC/swaps-le-6.ll | 8 +- test/CodeGen/PowerPC/tailcall1-64.ll | 7 +- test/CodeGen/PowerPC/testBitReverse.ll | 105 + test/CodeGen/PowerPC/tls.ll | 2 +- test/CodeGen/PowerPC/tls_get_addr_fence1.mir | 66 + test/CodeGen/PowerPC/tls_get_addr_fence2.mir | 65 + test/CodeGen/PowerPC/vec_extract_p9.ll | 167 + test/CodeGen/PowerPC/vec_int_ext.ll | 253 +- test/CodeGen/PowerPC/vsx-p9.ll | 48 +- .../PowerPC/vsx-partword-int-loads-and-stores.ll | 16 +- test/CodeGen/SPARC/constructor.ll | 29 + test/CodeGen/SystemZ/frame-21.ll | 76 + test/CodeGen/SystemZ/int-cmp-54.ll | 20 + .../SystemZ/regalloc-fast-invalid-kill-flag.mir | 34 + test/CodeGen/SystemZ/serialize-01.ll | 21 - test/CodeGen/SystemZ/trap-02.ll | 4 +- test/CodeGen/Thumb/litpoolremat.ll | 28 + test/CodeGen/Thumb/long-setcc.ll | 2 +- test/CodeGen/Thumb/select.ll | 4 +- test/CodeGen/Thumb2/constant-islands-new-island.ll | 6 +- test/CodeGen/Thumb2/ifcvt-neon-deprecated.mir | 54 + test/CodeGen/Thumb2/ifcvt-neon.ll | 29 - test/CodeGen/Thumb2/ifcvt-no-branch-predictor.ll | 158 + test/CodeGen/Thumb2/thumb2-ifcvt2.ll | 3 - test/CodeGen/WebAssembly/exception.ll | 22 + test/CodeGen/WebAssembly/offset-fastisel.ll | 100 + test/CodeGen/WebAssembly/umulo-i64.ll | 21 + test/CodeGen/X86/2012-08-16-setcc.ll | 42 +- test/CodeGen/X86/2012-12-06-python27-miscompile.ll | 23 - test/CodeGen/X86/GC/badreadproto.ll | 2 +- test/CodeGen/X86/GC/badrootproto.ll | 2 +- test/CodeGen/X86/GC/badwriteproto.ll | 2 +- test/CodeGen/X86/GC/fat.ll | 2 +- test/CodeGen/X86/GC/outside.ll | 2 +- test/CodeGen/X86/GlobalISel/GV.ll | 63 + test/CodeGen/X86/GlobalISel/add-vec.ll | 173 +- test/CodeGen/X86/GlobalISel/and-scalar.ll | 43 + test/CodeGen/X86/GlobalISel/constant.ll | 9 + test/CodeGen/X86/GlobalISel/ext-x86-64.ll | 2 +- test/CodeGen/X86/GlobalISel/ext.ll | 36 + test/CodeGen/X86/GlobalISel/fadd-scalar.ll | 20 + test/CodeGen/X86/GlobalISel/fdiv-scalar.ll | 20 + test/CodeGen/X86/GlobalISel/fmul-scalar.ll | 20 + test/CodeGen/X86/GlobalISel/fsub-scalar.ll | 20 + test/CodeGen/X86/GlobalISel/legalize-GV.mir | 31 + .../CodeGen/X86/GlobalISel/legalize-and-scalar.mir | 124 + test/CodeGen/X86/GlobalISel/legalize-ext.mir | 171 +- .../X86/GlobalISel/legalize-fadd-scalar.mir | 74 + .../X86/GlobalISel/legalize-fdiv-scalar.mir | 74 + .../X86/GlobalISel/legalize-fmul-scalar.mir | 74 + .../X86/GlobalISel/legalize-fsub-scalar.mir | 74 + .../X86/GlobalISel/legalize-insert-vec256.mir | 33 + .../X86/GlobalISel/legalize-insert-vec512.mir | 63 + .../X86/GlobalISel/legalize-memop-scalar.mir | 110 + test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir | 124 + .../CodeGen/X86/GlobalISel/legalize-xor-scalar.mir | 124 + test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll | 22 + test/CodeGen/X86/GlobalISel/memop-scalar.ll | 20 + test/CodeGen/X86/GlobalISel/or-scalar.ll | 43 + .../X86/GlobalISel/regbankselect-X86_64.mir | 262 + test/CodeGen/X86/GlobalISel/select-GV.mir | 99 + test/CodeGen/X86/GlobalISel/select-add.mir | 80 - test/CodeGen/X86/GlobalISel/select-and-scalar.mir | 160 + test/CodeGen/X86/GlobalISel/select-constant.mir | 52 + test/CodeGen/X86/GlobalISel/select-ext.mir | 64 + .../X86/GlobalISel/select-extract-vec256.mir | 80 + .../X86/GlobalISel/select-extract-vec512.mir | 127 + test/CodeGen/X86/GlobalISel/select-fadd-scalar.mir | 119 + test/CodeGen/X86/GlobalISel/select-fdiv-scalar.mir | 119 + test/CodeGen/X86/GlobalISel/select-fmul-scalar.mir | 119 + test/CodeGen/X86/GlobalISel/select-fsub-scalar.mir | 119 + .../X86/GlobalISel/select-insert-vec256.mir | 176 + .../X86/GlobalISel/select-insert-vec512.mir | 271 + .../CodeGen/X86/GlobalISel/select-merge-vec256.mir | 52 + .../CodeGen/X86/GlobalISel/select-merge-vec512.mir | 74 + test/CodeGen/X86/GlobalISel/select-or-scalar.mir | 160 + test/CodeGen/X86/GlobalISel/select-sub.mir | 77 - .../X86/GlobalISel/select-unmerge-vec256.mir | 53 + .../X86/GlobalISel/select-unmerge-vec512.mir | 74 + test/CodeGen/X86/GlobalISel/select-xor-scalar.mir | 160 + test/CodeGen/X86/GlobalISel/x86_64-fallback.ll | 18 + test/CodeGen/X86/GlobalISel/xor-scalar.ll | 43 + test/CodeGen/X86/MergeConsecutiveStores.ll | 31 +- test/CodeGen/X86/atom-call-reg-indirect.ll | 2 + test/CodeGen/X86/atom-fixup-lea2.ll | 2 + test/CodeGen/X86/atom-sched.ll | 1 + test/CodeGen/X86/avg.ll | 1612 +- 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test/CodeGen/AMDGPU/sdwa-peephole-instr.mir create mode 100644 test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir create mode 100644 test/CodeGen/AMDGPU/setcc-sext.ll create mode 100644 test/CodeGen/AMDGPU/spill-to-smem-m0.ll create mode 100644 test/CodeGen/AMDGPU/syncscopes.ll create mode 100644 test/CodeGen/AMDGPU/vop-shrink-frame-index.mir create mode 100644 test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir delete mode 100644 test/CodeGen/ARM/Windows/no-arm-mode.ll create mode 100644 test/CodeGen/ARM/cmpxchg-O0-be.ll create mode 100644 test/CodeGen/ARM/misched-fusion-aes.ll create mode 100644 test/CodeGen/ARM/ror.ll create mode 100644 test/CodeGen/ARM/scavenging.mir create mode 100644 test/CodeGen/AVR/branch-relaxation.ll create mode 100644 test/CodeGen/AVR/frmidx-iterator-bug.ll create mode 100644 test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll create mode 100644 test/CodeGen/BPF/remove_truncate_1.ll create mode 100644 test/CodeGen/BPF/remove_truncate_2.ll create mode 100644 test/CodeGen/Generic/pr33094.ll create mode 100644 test/CodeGen/Hexagon/addrmode-keepdeadphis.mir create mode 100644 test/CodeGen/Hexagon/duplex-addi-global-imm.mir create mode 100644 test/CodeGen/Hexagon/expand-condsets-imm.mir create mode 100644 test/CodeGen/Hexagon/expand-condsets-undefvni.ll create mode 100644 test/CodeGen/Hexagon/expand-vselect-kill.ll create mode 100644 test/CodeGen/Hexagon/fpelim-basic.ll delete mode 100644 test/CodeGen/Hexagon/frame.ll create mode 100644 test/CodeGen/Hexagon/hasfp-crash1.ll create mode 100644 test/CodeGen/Hexagon/hasfp-crash2.ll create mode 100644 test/CodeGen/Hexagon/hvx-nontemporal.ll create mode 100644 test/CodeGen/Hexagon/jt-in-text.ll delete mode 100644 test/CodeGen/Hexagon/mux-kill.mir create mode 100644 test/CodeGen/Hexagon/mux-kill1.mir create mode 100644 test/CodeGen/Hexagon/mux-kill3.mir create mode 100644 test/CodeGen/Hexagon/newvaluejump-kill.ll create mode 100644 test/CodeGen/Hexagon/newvaluejump-kill2.mir create mode 100644 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