This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O3 in repository toolchain/ci/glibc.
from 5df6ebcf44 string: test strncasecmp and strncpy near page boundaries adds cd41ffeb0b hurd: define BSD 4.3 ioctls only under __USE_MISC adds 9bd8e3f99d elf/tst-libc_dlvsym: Add a TEST_COMPAT around some symbol tests adds fda4d81801 io/lockf: Include bits/types.h before __OFF_T_MATCHES_OFF64_T check adds 2b09ebeee7 RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 adds 4875afe552 RISC-V: Cleanup some of the sysdep.h code adds 7ed05adc82 RISC-V: Use 64-bit-time syscall numbers with the 32-bit port adds 68efae739a RISC-V: Add support for 32-bit vDSO calls adds 8041759aef RISC-V: Support dynamic loader for the 32-bit adds 708b92e878 RISC-V: Add path of library directories for the 32-bit adds 07598d7600 RISC-V: Add arch-syscall.h for RV32 adds 5b6113d62e RISC-V: Support the 32-bit ABI implementation adds 941a55cf59 RISC-V: Add hard float support for 32-bit CPUs adds 5820c3731e RISC-V: Add 32-bit ABI lists adds b2d175cdb7 RISC-V: Add the RV32 libm-test-ulps adds 2ed993ada6 RISC-V: Fix llrint and llround missing exceptions on RV32 adds 7a55dd3fb6 riscv32: Specify the arch_minimum_kernel as 5.4 adds 30b963c143 RISC-V: Add rv32 path to RTLDLIST in ldd adds 72dfddeffc RISC-V: Build infrastructure for 32-bit port adds 389f6854eb Documentation for the RISC-V 32-bit port adds 567b170501 Add RISC-V 32-bit target to build-many-glibcs.py adds bd394d131c AArch64: Improve backwards memmove performance adds 85f1848937 Remove obsolete default/nss code new e3960d1c57 Add mallinfo2 function that support sizes >= 4GB. new 306bdd9983 x32: Add <fixup-asm-unistd.h> and regenerate arch-syscall.h new 30e5069c7d malloc: Fix mallinfo deprecation declaration
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: NEWS | 11 +- README | 1 + elf/tst-libc_dlvsym.h | 5 + io/lockf.c | 2 + malloc/malloc.c | 35 +- malloc/malloc.h | 22 +- malloc/tst-malloc-tcache-leak.c | 7 + malloc/tst-mxfast.c | 7 + manual/memory.texi | 36 +- nis/libnsl.h | 6 - nis/nss | 37 - scripts/build-many-glibcs.py | 15 + sysdeps/aarch64/multiarch/memcpy_advsimd.S | 7 +- sysdeps/mach/hurd/bits/ioctls.h | 2 + sysdeps/riscv/bits/wordsize.h | 9 +- sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 26 +- sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 +- sysdeps/riscv/nptl/pthread-offsets.h | 17 +- sysdeps/riscv/preconfigure | 6 +- sysdeps/{x86_64/x32 => riscv/rv32}/Implies-after | 0 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h | 38 + sysdeps/riscv/rv32/rvd/Implies | 3 + sysdeps/riscv/{rv64 => rv32}/rvd/libm-test-ulps | 0 .../riscv/{rv64 => rv32}/rvd/libm-test-ulps-name | 0 .../riscv/{bits/wordsize.h => rv32/rvd/s_lrint.c} | 26 +- .../riscv/{bits/wordsize.h => rv32/rvd/s_lround.c} | 26 +- sysdeps/riscv/{rv64 => rv32}/rvf/Implies | 0 .../riscv/{bits/wordsize.h => rv32/rvf/s_lrintf.c} | 26 +- .../{bits/wordsize.h => rv32/rvf/s_lroundf.c} | 26 +- sysdeps/riscv/sfp-machine.h | 27 +- sysdeps/riscv/sys/asm.h | 7 +- sysdeps/unix/sysv/linux/riscv/Makefile | 8 +- sysdeps/unix/sysv/linux/riscv/bits/environments.h | 81 + .../sysv/linux/riscv/bits/time64.h} | 27 +- .../sysv/linux/riscv/bits/timesize.h} | 19 +- sysdeps/unix/sysv/linux/riscv/configure | 43 + sysdeps/unix/sysv/linux/riscv/configure.ac | 12 + sysdeps/unix/sysv/linux/riscv/dl-cache.h | 54 +- sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h | 55 + .../sysv/linux/riscv/kernel_stat.h} | 18 +- sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +- sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed | 2 +- sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 + sysdeps/unix/sysv/linux/riscv/rv32/arch-syscall.h | 284 +++ .../sysv/linux/{arc => riscv/rv32}/c++-types.data | 0 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist | 5 + .../sysv/linux/riscv/rv32/libBrokenLocale.abilist | 1 + sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist | 4 + sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist | 1935 ++++++++++++++++++++ .../unix/sysv/linux/riscv/rv32/libcrypt.abilist | 2 + sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist | 9 + sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist | 940 ++++++++++ .../unix/sysv/linux/riscv/rv32/libpthread.abilist | 213 +++ .../unix/sysv/linux/riscv/rv32/libresolv.abilist | 79 + sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist | 35 + .../sysv/linux/riscv/rv32/libthread_db.abilist | 40 + sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist | 6 + sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 +- sysdeps/unix/sysv/linux/riscv/sysdep.h | 59 +- sysdeps/unix/sysv/linux/x86_64/x32/arch-syscall.h | 1 + .../sysv/linux/x86_64/x32/fixup-asm-unistd.h} | 22 +- 61 files changed, 4190 insertions(+), 236 deletions(-) delete mode 100644 nis/nss copy sysdeps/{x86_64/x32 => riscv/rv32}/Implies-after (100%) create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h create mode 100644 sysdeps/riscv/rv32/rvd/Implies copy sysdeps/riscv/{rv64 => rv32}/rvd/libm-test-ulps (100%) copy sysdeps/riscv/{rv64 => rv32}/rvd/libm-test-ulps-name (100%) copy sysdeps/riscv/{bits/wordsize.h => rv32/rvd/s_lrint.c} (66%) copy sysdeps/riscv/{bits/wordsize.h => rv32/rvd/s_lround.c} (66%) copy sysdeps/riscv/{rv64 => rv32}/rvf/Implies (100%) copy sysdeps/riscv/{bits/wordsize.h => rv32/rvf/s_lrintf.c} (66%) copy sysdeps/riscv/{bits/wordsize.h => rv32/rvf/s_lroundf.c} (66%) create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/environments.h copy sysdeps/{riscv/bits/wordsize.h => unix/sysv/linux/riscv/bits/time64.h} (52%) copy sysdeps/{riscv/bits/wordsize.h => unix/sysv/linux/riscv/bits/timesize.h} (61%) create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h copy sysdeps/{riscv/bits/wordsize.h => unix/sysv/linux/riscv/kernel_stat.h} (66%) create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/arch-syscall.h copy sysdeps/unix/sysv/linux/{arc => riscv/rv32}/c++-types.data (100%) create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist copy sysdeps/{riscv/bits/wordsize.h => unix/sysv/linux/x86_64/x32/fixup-asm-unistd [...]