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from e7732100b88 [AArch64] Return address signing B key support new 5aeb36fdcb2 [Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics new fef0a760bec [X86] Enable the MachineVerifier by default
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Summary of changes: include/llvm/CodeGen/ISDOpcodes.h | 8 ++ include/llvm/CodeGen/TargetLowering.h | 7 +- include/llvm/IR/Intrinsics.td | 6 ++ include/llvm/Target/TargetSelectionDAG.td | 2 + lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 10 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 35 +++++-- lib/CodeGen/SelectionDAG/LegalizeTypes.h | 4 +- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 2 + lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 + lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 12 +++ lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 2 + lib/CodeGen/SelectionDAG/TargetLowering.cpp | 52 +++++++--- lib/CodeGen/TargetLoweringBase.cpp | 2 + lib/IR/Verifier.cpp | 16 +-- lib/Target/X86/X86TargetMachine.h | 4 - test/CodeGen/X86/avx512-regcall-NoMask.ll | 7 +- test/CodeGen/X86/icall-branch-funnel.ll | 3 +- test/CodeGen/X86/indirect-branch-tracking.ll | 3 +- test/CodeGen/X86/pr38795.ll | 3 +- test/CodeGen/X86/scheduler-backtracking.ll | 3 +- test/CodeGen/X86/sjlj-eh.ll | 7 +- .../X86/speculative-load-hardening-indirect.ll | 5 +- test/CodeGen/X86/{sadd_sat.ll => ssub_sat.ll} | 74 +++++++------- test/CodeGen/X86/{uadd_sat.ll => usub_sat.ll} | 107 +++++++++++---------- test/CodeGen/X86/win_coreclr_chkstk.ll | 3 +- .../X86/live-debug-vars-discard-invalid.mir | 3 +- 26 files changed, 235 insertions(+), 149 deletions(-) copy test/CodeGen/X86/{sadd_sat.ll => ssub_sat.ll} (85%) copy test/CodeGen/X86/{uadd_sat.ll => usub_sat.ll} (63%)