This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project.
from b94c215592bd [Utils] collectBitParts - add truncate() handling adds 27830bc2b1b8 [asan] Avoid putting globals in a comdat section when targ [...] adds d65ddca83ff8 [ValueTracking] ComputeKnownBits - minimum leading/trailin [...] adds 2105912ee0b8 [lldb] Add asserts that prevent construction of cycles in [...] adds abbdb5639c70 [OpenCL] Allow taking address of functions as an extension. adds 4631afdeb3c4 [lldb][NFC] Rename the second ValueObjectManager to ValueO [...] adds 0512b01ebede [lldb][NFC] Move trivial ValueObject getters/setters to th [...] adds 67f0620831b4 [AMDGPU] Update s_sendmsg messages adds eb8d6af5e406 [mlir] Specify cuda-runner pass pipeline as command line options. adds aab709f090f5 [AMDGPU] Add more PAL metadata register names adds 6201017d541f [lldb] Prevent double new lines behind errors/warning/mess [...] adds 7377ef935719 [mlir] Add a builder to `linalg.tiled_loop`. adds d37400168ce2 [ValueTracking] computeKnownBitsFromShiftOperator - remove [...] adds 3d837ad7041f Revert "[ValueTracking] computeKnownBitsFromShiftOperator [...] adds 5e19208d96dd [InstructionCost] NFC: Fix up missing cases in LoopVectori [...] adds 9ced8b3b614c [lld-macho] Add REQUIRES to incompatible-arch-tapi test adds ff6dc053b7ba [Coverage][Unittest] Fix stringref issue adds b90fdb7c117f [clang-tidy][test] Allow specifying potentially unused suffixes adds 5f0800cc187a [libc][NFC] Remove headergen for the cacheline size macro. adds ce976d2db39f [mlir] Add polynomial approximation for math::LogOp (using [...] adds a34532c330f6 [clang-tidy] Fix readability-avoid-const-params-in-decls r [...] adds 330406143230 [flang][fir] Add zero_bits operation. adds 4814985dec57 [libc++] NFC: Fix a few tests in pair that would succeed t [...] adds 5f5416e1c4b4 [libc++] NFC: Fix a few tests in tuple that would succeed [...] adds 6628387c9a0e [libc][NFC] Exclude few targets from the `all` target. adds 35ab6d6390ec [OpenMP][Tests][NFC] rename macro to avoid naming clash adds 449e36ce726a [AMDGPU] Add a bit more gfx90a test coverage adds e0f3acc5d34a [OpenMP][Tests][NFC] rename macro to avoid naming clash adds 43a569faeb33 [tests] Mark an autogened test as such adds 542d9c21541d [libomptarget] Load images in order of registration adds ca0bb0e88750 Make sure some types are indeed trivially_copyable per llv [...] adds 532d4814ac8e Revert "[tests] Mark an autogened test as such" adds f3a72509a743 [OpenMP][Tests][NFC] lit might also be known as llvm-lit.py adds e5da63d5a9ed [OpenMP] Fixed a crash when offloading to x86_64 with targ [...] adds 2fbce374c8fb [OpenMP][Tests][NFC] rename macro to avoid naming clash adds c1706f2269ac [tests] precommit tests for an upcoming AA improvement adds b146dfe527ba [flang] add attribute to trim runtime implementation estab [...] adds 0146d206317e [AArch64] Do not fold SP adjustments into pre-increment ad [...] adds 404843a94dbf [MC][ARM] add .w suffixes for BL (T1) and DBG adds 6baeeb9efa8e [libomptarget] Fixed MSVC build fail caused by __attribute [...] adds 96a3dfeb9303 Revert rGd65ddca83ff85c7345fe9a0f5a15750f01e38420 - "[Valu [...] adds 5f8a80882b72 [mlir] Add constBuilderCall to TypeAttr to simplify builders adds fe50be12c8b8 [LegalizeIntegerTypes] Further improve ExpandIntRes_SADDSU [...] adds ce2ad938ff1f [mlir][spirv] Define spv.GLSL.Ldexp adds 2a5aa81739d3 [lit] Add --ignore-fail adds 086670d36786 [RISCV] Support fixed vector extract element. Use VL=1 for [...] adds e339bba637b9 [AArch64][GlobalISel] Fix manual selection for v4s16 and v [...] adds c2487bf7dfdd Remove a workaround for MSVC 2013, now that MSVC 2017 is t [...] adds 17b4e695ce0e [llvm-objcopy] If input=output, preserve umask bits, other [...] adds 38dfb235db19 [lldb] Support debugging utility functions adds 705068cb8c4d [mlir][linalg] Support for using output values in TC definitions. adds 21895a2beff7 [mlir][linalg] Reuse the symbol if attribute uses are identical. adds e79cd47e1620 [mlir][docs] Small fix to local Pass Manager reproduction [...] adds 78b6d73a93fc AMDGPU: Add even aligned VGPR/AGPR register classes adds 589223e044db AMDGPU: Remove special case in shouldCoalesce adds 3475159122b6 [InstCombine] add tests for fdiv+powi; NFC adds c218c80c730a [libcxx] [test] Quote the path to the python interpreter adds 0d4e12e3c110 [amdgpu] Atomic should be source of divergence. adds 52745e4d9078 [tests] precommit tests for D97219 adds 1e1b92f76de7 IR: Rename Metadata::ImplicitCode to SubclassData1, NFC adds 01701646d555 Transforms: Clone distinct nodes in metadata mapper unless [...] adds 80f329bcd028 [Profile] Include a few asserts in coverage mapping test adds 868d43fbd657 [InstCombine] add helper for x/pow(); NFC adds a7cee55762c6 [InstCombine] fold fdiv with powi divisor (PR49147) adds ae7528a34e27 Revert "[Profile] Include a few asserts in coverage mapping test" adds a921aaf78991 [MC][ARM] make Thumb function also if type attribute is set adds 341889ee9e03 [builtins] Define fmax and scalbn inline adds 9f1b832331e3 Reland "[Driver][Windows] Support per-target runtimes dir [...] adds 680f836c2fa7 Revert "[builtins] Define fmax and scalbn inline" adds a7d4826101ab [profile] Fix buffer overrun when parsing %c in filename string adds c519460745ec Allow !shape.size type operands in "shape.from_extents" op. adds 47acdec1dd5d [CUDA][HIP] Support accessing static device variable in ho [...] adds 9bde29629dfe [RISCV] Use a ComplexPattern for zexti32 to match sexti32. adds efcdd598b766 [RISCV] Teach VSETVLI inserter to use VSETIVLI when possible. adds 7c926fee9300 Improve attribute documentation for nodebug on typedefs adds b03bb054e19c [llvm] Check availability for os_signpost adds 392fd3f1bf9f update AMDGPU _Float16 support in clang doc adds e9445765a570 [test] Improve SanitizerCoverage tests on !associated and comdat adds 151990dd94e5 [lld-macho] add code signature for native arm64 macOS adds 4bc7c8631ad6 [X86] Support amx-bf16 intrinsic. adds a9b33ffb8f84 [ThinLTO][NewPM] Clean up dead code under -O0 adds 841f6995cd33 [flang][fir][NFC] Move remaining types to TableGen type de [...] adds 082ec3ab0776 [flang][fir][NFC] Remove dead code. adds b950de5c13ef [docs] Add a release note for the removing of -Wreturn-std [...] adds c38000a9fb2c [Coroutine] Check indirect uses of alloca when checking li [...] adds 1c051b7b7042 [NFC][AIX] Rename aix-csr-vector.ll to aix-csr-vector-extabi.ll adds 6d31ee1cea75 [NARY][NFC] New tests for upcoming changes. adds 93c8246952d0 [docs][JITLink] Reintroduce JITLink design/API doc with fi [...] adds 159f78fc2f50 [RISCV] Reuse existing SDLoc and XLenVT in the switch in R [...] adds 99951aa68da3 OpenMP: Fix object clobbering issue when using save-temps adds 011a8e218ea3 [debugserver] Fix logic to extract app bundle from file path adds 77a8589e5d2f [clang][RecoveryAST] Add design doc to clang internal manual. adds 699041123eba [mlir] Fix emitting attribute documentation adds 2d870a2f557b [mlir][nfc] Fix typo in documentation comment adds 88e45f00c156 [clang][cli] Add MarshallingInfoEnum multiclass adds d8a8e5d6240a [clang][cli] Remove marshalling from Opt{In,Out}FFlag adds b218f7c4baad [clangd] NFC, remove an extra "class" keyword. adds 30cb9c03b53e [AArch64] Add abs intrinsic costs adds a25e4a6da3fe [clang][cli] Store additional optimization remarks info adds d748908fa02b [clang][cli] Round-trip the whole CompilerInvocation adds 201ada80ee15 AArch64: relax address-space assertion in FastISel. adds 87dbcd88651a [CodeGen] Canonicalise adds/subs of i1 vectors using XOR adds a54f160b3a98 Prefer /usr/bin/env xxx over /usr/bin/xxx where xxx = perl [...] adds 7cfa6e1cc64b [lldb] Let ClangASTImporter assert that the target AST has [...] adds 2d6b767c1d15 [lldb][NFC] Remove some obsolete comments in ClangASTImporter.cpp adds f0e461057221 Support standalone build of clang-tidy unittest adds 8b82669d5693 [X86][SSE] Move unaryshuffle(xor(x,-1)) -> xor(unaryshuffl [...] adds 83d134c3c422 [NARY-REASSOCIATE] Support reassociation of min/max adds 0d835ba48dfb [X86] Regenerate sdiv_fix.ll tests. NFCI. adds d0a6f8bb6568 [NFC] Fix build failure after 83d134c3c4222e8b8d3d90c099f7 [...] adds 821f8bb29a89 [RISCV] Unify scalable- and fixed-vector EXTRACT_SUBVECTOR [...] adds 3bc5ed38750c [RISCV] Support fixed-length vector sign/zero extension adds 84413e194742 [RISCV] Support fixed-length vector truncates adds f03826f896be Pass GPU events instead of streams across async regions. adds 9620ce90d723 [RISCV] Support fixed-length vector FP_ROUND & FP_EXTEND adds 86c267233f51 [lldb][NFC] Document ClangASTImporter adds fa7eb3e4a60c [clang][cli] NFC: Remove intermediate command line parsing [...] adds 43cac1d27d7d [clang][cli] NFC: Remove ArgList infrastructure for record [...] adds 0c8b26bf530b [clang] Remove a superfluous semicolon, silencing GCC warn [...] adds baebc1162f81 [clang][driver] Set the input type to Fortran when reading [...] adds ad14ccc8c22e [clang][flang] Improve the consistency of the code-base adds 02f435db0b5f [RISCV] Support fixed-length vector i2fp/fp2i conversions adds 0ad86f879f3a [RISCV] Update RVV ISA section-header comments. NFC. adds f4d78a5e3aee [mlir][NFC] Add missing namespace qualifier to ODS generated code adds 2cc58463caf4 [clang][sema] Ignore xor-used-as-pow if both sides are macros adds 3b7104a2f203 Fix a test case that should check whether or not it is pas [...] adds 25c6b7ddd2b4 [RISCV] Add isel pattern to match X > -1 to bgez. adds b4f8daa5ec6c [arm builtin crosscompile docs] alphabetize flags, no beha [...] adds 03b7bc0ba1ce [arm builtin crosscompile docs] add COMPILER_RT_BUILD_MEMPROF=OFF adds 95c682499528 [RISCV] Teach CleanupVSETVLI to remove 'vsetvli zero, zero [...] adds 261f219ffc2a [IndVars] Add test cases inspired by PR48965. adds b368fc735d5a [CodeGen] Format code comment to 80 columns. NFC. adds 203d5eeec55b [MLIR][affine-loop-fusion] Handle defining ops between the [...] adds ebca222b65cb [mlir] Check 'iter_args' in 'isLoopParallel' utility adds 6103b6ad69fe [SampleFDO][NFC] Refactor: make SampleProfileLoaderBaseImp [...] adds 502b3bfc6a71 [AMDGPU] require s-memtime-inst for __builtin_amdgcn_s_memtime adds ceaedfb5fc3a [X86] Remove custom lowering of vXi1 ADD/SUB now that they [...]
No new revisions were added by this update.
Summary of changes: .../readability/AvoidConstParamsInDecls.cpp | 38 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +- .../test/clang-tidy/check_clang_tidy.py | 9 +- .../checkers/modernize-loop-convert-reverse.cpp | 7 - .../readability-avoid-const-params-in-decls.cpp | 19 + .../unittests/clang-tidy/CMakeLists.txt | 9 + clang/docs/InternalsManual.rst | 149 +- clang/docs/LanguageExtensions.rst | 1 + clang/docs/ReleaseNotes.rst | 4 + clang/include/clang/AST/ASTContext.h | 6 + clang/include/clang/Basic/AttrDocs.td | 4 +- clang/include/clang/Basic/BuiltinsAMDGPU.def | 3 +- clang/include/clang/Basic/BuiltinsX86_64.def | 1 + clang/include/clang/Basic/CodeGenOptions.h | 65 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 12 +- clang/include/clang/Driver/Options.td | 185 +-- clang/include/clang/Driver/ToolChain.h | 12 +- clang/include/clang/Frontend/CompilerInvocation.h | 44 +- clang/lib/AST/ASTContext.cpp | 19 +- clang/lib/CodeGen/CGCUDANV.cpp | 11 + clang/lib/CodeGen/CodeGenAction.cpp | 30 +- clang/lib/CodeGen/CodeGenModule.cpp | 23 +- clang/lib/CodeGen/CodeGenModule.h | 4 + clang/lib/Driver/Driver.cpp | 26 +- clang/lib/Driver/ToolChain.cpp | 21 +- clang/lib/Driver/ToolChains/BareMetal.cpp | 5 +- clang/lib/Driver/ToolChains/BareMetal.h | 9 +- clang/lib/Frontend/CompilerInvocation.cpp | 726 ++++------ clang/lib/Headers/amxintrin.h | 26 +- clang/lib/Parse/ParseExpr.cpp | 3 +- clang/lib/Sema/SemaExpr.cpp | 5 + clang/test/CodeGen/X86/amx_api.c | 9 +- clang/test/CodeGenCUDA/device-var-linkage.cu | 11 +- clang/test/CodeGenCUDA/managed-var.cu | 28 +- clang/test/CodeGenCUDA/static-device-var-rdc.cu | 97 ++ clang/test/CodeGenOpenCL/builtins-amdgcn-ci.cl | 8 + clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl | 8 + clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl | 8 + clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl | 7 + clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 7 - clang/test/Driver/cl-options.c | 4 +- clang/test/Driver/fsanitize.c | 10 +- clang/test/Driver/hip-sanitize-options.hip | 6 +- clang/test/Driver/instrprof-ld.c | 6 +- clang/test/Driver/openmp-offload-gpu.c | 6 + clang/test/Driver/sanitizer-ld.c | 8 +- clang/test/Frontend/round-trip-cc1-args.c | 2 +- clang/test/SemaCUDA/static-device-var.cu | 50 + clang/test/SemaCXX/warn-xor-as-pow.cpp | 1 + .../SemaOpenCL/builtins-amdgcn-error-gfx1030.cl | 7 + clang/test/SemaOpenCL/func.cl | 26 +- clang/test/make_test_dirs.pl | 3 +- clang/tools/driver/driver.cpp | 54 +- clang/tools/scan-build/bin/set-xcode-analyzer | 2 +- clang/utils/TestUtils/pch-test.pl | 3 +- clang/utils/analyzer/reducer.pl | 6 +- clang/utils/analyzer/update_plist_test.pl | 3 +- clang/www/demo/index.cgi | 3 +- compiler-rt/lib/profile/InstrProfilingFile.c | 18 +- .../test/profile/ContinuousSyncMode/get-filename.c | 32 + debuginfo-tests/llgdb-tests/test_debuginfo.pl | 2 +- flang/include/flang/Optimizer/Dialect/FIRAttr.h | 22 - flang/include/flang/Optimizer/Dialect/FIROps.td | 244 ++-- flang/include/flang/Optimizer/Dialect/FIRType.h | 246 +--- flang/include/flang/Optimizer/Dialect/FIRTypes.td | 416 +++++- flang/lib/Optimizer/Dialect/FIRAttr.cpp | 43 - flang/lib/Optimizer/Dialect/FIRDialect.cpp | 2 +- flang/lib/Optimizer/Dialect/FIRType.cpp | 1433 +++++++------------- flang/runtime/character.cpp | 3 +- flang/test/Fir/fir-ops.fir | 22 +- flang/test/Flang-Driver/input-from-stdin.f90 | 15 +- flang/tools/flang-driver/driver.cpp | 26 +- libc/cmake/modules/LLVMLibCLibraryRules.cmake | 1 + libc/cmake/modules/LLVMLibCObjectRules.cmake | 4 + libc/src/string/memory_utils/CMakeLists.txt | 14 - libc/src/string/memory_utils/cacheline_size.h.def | 27 - .../memory_utils/cacheline_size_aarch64.h.inc | 3 - .../string/memory_utils/cacheline_size_arm.h.inc | 9 - .../string/memory_utils/cacheline_size_ppc64.h.inc | 1 - .../string/memory_utils/cacheline_size_x86.h.inc | 1 - .../memory_utils/cacheline_size_x86_64.h.inc | 1 - libc/src/string/memory_utils/utils.h | 24 +- libcxx/test/CMakeLists.txt | 2 +- .../tuple.tuple/tuple.assign/const_pair.pass.cpp | 2 +- .../tuple.tuple/tuple.assign/convert_copy.pass.cpp | 8 +- .../tuple.tuple/tuple.assign/convert_move.pass.cpp | 8 +- .../tuple/tuple.tuple/tuple.assign/copy.pass.cpp | 21 +- .../pairs/pairs.pair/assign_rv_pair.pass.cpp | 2 +- .../pairs/pairs.pair/assign_rv_pair_U_V.pass.cpp | 4 +- lld/MachO/OutputSegment.h | 1 + lld/MachO/SyntheticSections.cpp | 95 ++ lld/MachO/SyntheticSections.h | 30 +- lld/MachO/Writer.cpp | 33 + lld/test/MachO/invalid/incompatible-arch-tapi.s | 1 + lldb/docs/use/python-reference.rst | 4 +- lldb/include/lldb/Core/ValueObject.h | 120 +- lldb/include/lldb/Core/ValueObjectUpdater.h | 43 + lldb/include/lldb/Expression/UtilityFunction.h | 5 +- .../include/lldb/Interpreter/CommandReturnObject.h | 2 - lldb/include/lldb/Target/Target.h | 4 + lldb/scripts/disasm-gdb-remote.pl | 2 +- lldb/source/Commands/CommandObjectMemory.cpp | 4 +- lldb/source/Core/CMakeLists.txt | 1 + lldb/source/Core/IOHandlerCursesGUI.cpp | 5 +- lldb/source/Core/ValueObject.cpp | 177 +-- lldb/source/Core/ValueObjectUpdater.cpp | 56 + lldb/source/Expression/FunctionCaller.cpp | 14 +- lldb/source/Expression/UtilityFunction.cpp | 3 +- lldb/source/Interpreter/CommandReturnObject.cpp | 15 +- .../ExpressionParser/Clang/ClangASTImporter.cpp | 44 +- .../ExpressionParser/Clang/ClangASTImporter.h | 93 +- .../Clang/ClangExpressionSourceCode.cpp | 6 +- .../Clang/ClangExpressionSourceCode.h | 1 + .../Clang/ClangUtilityFunction.cpp | 37 +- .../ExpressionParser/Clang/ClangUtilityFunction.h | 5 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 3 +- lldb/source/Target/Target.cpp | 11 + lldb/source/Target/TargetProperties.td | 3 + lldb/test/Shell/Commands/command-disassemble.s | 4 - .../tools/debugserver/source/MacOSX/MachProcess.mm | 71 +- llvm/docs/CommandGuide/lit.rst | 4 + llvm/docs/HowToCrossCompileBuiltinsOnArm.rst | 23 +- llvm/docs/JITLink.rst | 1128 +++++++++++++++ llvm/docs/ORCv2.rst | 4 - llvm/docs/UserGuides.rst | 5 + llvm/include/llvm/BinaryFormat/MachO.h | 197 +++ llvm/include/llvm/CodeGen/ISDOpcodes.h | 3 +- llvm/include/llvm/IR/DebugInfo.h | 4 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 4 +- llvm/include/llvm/IR/IntrinsicsX86.td | 6 + llvm/include/llvm/IR/Metadata.h | 6 +- llvm/include/llvm/IR/PatternMatch.h | 1 + llvm/include/llvm/Option/ArgList.h | 23 - llvm/include/llvm/Option/OptParser.td | 12 +- llvm/include/llvm/Support/TrailingObjects.h | 25 +- .../llvm/Transforms/Scalar/NaryReassociate.h | 13 + .../Transforms/Utils/SampleProfileLoaderBaseImpl.h | 251 ++-- llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 45 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 + llvm/lib/Option/ArgList.cpp | 11 - llvm/lib/Passes/PassBuilder.cpp | 11 +- llvm/lib/Support/Signposts.cpp | 33 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 5 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 19 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 9 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 16 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 2 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 4 +- llvm/lib/Target/AMDGPU/GCNSubtarget.h | 3 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 4 +- llvm/lib/Target/AMDGPU/SIDefines.h | 26 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 121 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 56 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 4 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 125 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 28 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 59 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 18 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 8 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 49 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 35 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 3 + .../lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp | 22 + llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp | 110 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 110 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 1 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 425 ++++-- llvm/lib/Target/RISCV/RISCVISelLowering.h | 27 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 8 +- llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 8 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 36 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 203 ++- llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td | 2 +- llvm/lib/Target/X86/X86ExpandPseudo.cpp | 12 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 61 +- llvm/lib/Target/X86/X86InstrAMX.td | 10 + llvm/lib/Target/X86/X86LowerAMXType.cpp | 3 +- llvm/lib/Target/X86/X86PreTileConfig.cpp | 2 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 73 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 3 +- .../InstCombine/InstCombineMulDivRem.cpp | 68 +- .../Instrumentation/AddressSanitizer.cpp | 9 +- llvm/lib/Transforms/Scalar/NaryReassociate.cpp | 100 +- llvm/lib/Transforms/Utils/CloneFunction.cpp | 16 +- llvm/lib/Transforms/Utils/ValueMapper.cpp | 18 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 4 +- llvm/test/Analysis/BasicAA/recphi.ll | 81 ++ llvm/test/Analysis/CostModel/AArch64/abs.ll | 87 ++ .../test/CodeGen/AArch64/GlobalISel/select-dup.mir | 44 + .../CodeGen/AArch64/ldst-nopreidx-sp-redzone.mir | 407 ++++++ llvm/test/CodeGen/AArch64/sadd_sat_vec.ll | 54 +- llvm/test/CodeGen/AArch64/ssub_sat_vec.ll | 54 +- llvm/test/CodeGen/AArch64/sve-pred-arith.ll | 164 +++ .../llvm.amdgcn.raw.buffer.atomic.fadd.ll | 12 +- .../llvm.amdgcn.struct.buffer.atomic.fadd.ll | 22 +- .../AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll | 29 +- ...-tuples.mir => alloc-aligned-tuples-gfx908.mir} | 12 - ...-tuples.mir => alloc-aligned-tuples-gfx90a.mir} | 68 +- .../test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll | 6 +- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 828 +++++++++++ llvm/test/CodeGen/AMDGPU/dpp64_combine.mir | 36 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 20 +- llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 20 +- llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll | 57 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll | 2 +- llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir | 4 +- .../test/CodeGen/AMDGPU/reserved-reg-in-clause.mir | 35 +- llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir | 76 +- .../CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir | 121 ++ llvm/test/CodeGen/ARM/sadd_sat.ll | 134 +- llvm/test/CodeGen/ARM/sadd_sat_plus.ll | 150 +- llvm/test/CodeGen/ARM/ssub_sat.ll | 134 +- llvm/test/CodeGen/ARM/ssub_sat_plus.ll | 152 +-- ...{aix-csr-vector.ll => aix-csr-vector-extabi.ll} | 0 llvm/test/CodeGen/RISCV/branch.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 88 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 159 +++ .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 243 +++- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 3 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 267 ++++ .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 318 ++--- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 54 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 21 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 330 ++--- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 445 ++++++ llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 391 ++++++ .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 135 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 15 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 244 ++++ .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 66 +- .../RISCV/rvv/fixed-vectors-int-splat-rv32.ll | 112 +- .../RISCV/rvv/fixed-vectors-int-splat-rv64.ll | 99 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 1360 +++++++------------ .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 15 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 18 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 27 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 63 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 50 +- llvm/test/CodeGen/RISCV/sadd_sat.ll | 21 +- llvm/test/CodeGen/RISCV/sadd_sat_plus.ll | 21 +- llvm/test/CodeGen/RISCV/ssub_sat.ll | 46 +- llvm/test/CodeGen/RISCV/ssub_sat_plus.ll | 46 +- llvm/test/CodeGen/RISCV/xaluo.ll | 117 +- llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll | 170 ++- llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll | 7 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 342 +---- llvm/test/CodeGen/X86/avx512bw-mask-op.ll | 24 +- llvm/test/CodeGen/X86/sdiv_fix.ll | 4 +- .../AddressSanitizer/global_metadata.ll | 4 +- .../{global_metadata.ll => global_with_comdat.ll} | 47 +- .../instrument-section-invalid-c-ident.ll | 4 +- .../SanitizerCoverage/inline-bool-flag.ll | 10 +- .../interposable-symbol-nocomdat.ll | 6 + .../SanitizerCoverage/trace-pc-guard-comdat.ll | 3 + .../SanitizerCoverage/trace-pc-guard-nocomdat.ll | 3 + llvm/test/MC/AMDGPU/pal-registers.s | 68 + llvm/test/MC/AMDGPU/sopp-err.s | 28 + llvm/test/MC/AMDGPU/sopp-gfx10.s | 6 + llvm/test/MC/AMDGPU/sopp-gfx9.s | 24 + llvm/test/MC/AMDGPU/sopp.s | 17 +- llvm/test/MC/ARM/basic-thumb2-instructions.s | 6 + llvm/test/MC/ARM/thumb-function-address.s | 42 + llvm/test/MC/ARM/thumb2-branches.s | 6 + llvm/test/MC/Disassembler/AMDGPU/sopp_vi.txt | 6 + llvm/test/Other/new-pm-O0-defaults.ll | 3 + llvm/test/Transforms/Coroutines/coro-alloca-07.ll | 104 ++ llvm/test/Transforms/Coroutines/coro-alloca-08.ll | 83 ++ .../IndVarSimplify/simplify-pointer-arithmetic.ll | 377 +++++ llvm/test/Transforms/InstCombine/fdiv.ll | 68 + .../LoopStrengthReduce/post-increment-insertion.ll | 125 ++ llvm/test/Transforms/NaryReassociate/nary-smax.ll | 151 +++ llvm/test/Transforms/NaryReassociate/nary-smin.ll | 151 +++ llvm/test/Transforms/NaryReassociate/nary-umax.ll | 151 +++ llvm/test/Transforms/NaryReassociate/nary-umin.ll | 151 +++ ...bug-info-cloned-type-references-global-value.ll | 42 + .../llvm-objcopy/ELF/mirror-permissions-unix.test | 12 + llvm/tools/llvm-objcopy/llvm-objcopy.cpp | 24 +- llvm/unittests/ProfileData/CoverageMappingTest.cpp | 3 + llvm/unittests/Support/TypeTraitsTest.cpp | 26 + llvm/utils/GenLibDeps.pl | 2 +- llvm/utils/codegen-diff | 2 +- llvm/utils/findsym.pl | 4 +- llvm/utils/lit/lit/cl_arguments.py | 4 + llvm/utils/lit/lit/main.py | 7 +- .../{show-result-codes => ignore-fail}/fail.txt | 0 llvm/utils/lit/tests/Inputs/ignore-fail/lit.cfg | 6 + .../lit/tests/Inputs/ignore-fail/unresolved.txt | 0 .../{shtest-format => ignore-fail}/xfail.txt | 0 llvm/utils/lit/tests/Inputs/ignore-fail/xpass.txt | 2 + llvm/utils/lit/tests/ignore-fail.py | 19 + llvm/utils/llvm-compilers-check | 2 +- llvm/utils/llvm-native-gxx | 2 +- mlir/docs/PassManagement.md | 3 +- .../Linalg/IR/LinalgNamedStructuredOpsSpec.tc | 120 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 16 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td | 55 + mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 4 +- mlir/include/mlir/IR/OpBase.td | 4 +- mlir/lib/Analysis/Utils.cpp | 6 + .../GPUCommon/ConvertKernelFuncToBlob.cpp | 6 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 120 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.cpp | 5 +- .../Dialect/GPU/Transforms/AsyncRegionRewriter.cpp | 136 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 34 + mlir/lib/Dialect/Math/Transforms/CMakeLists.txt | 1 + .../Math/Transforms/PolynomialApproximation.cpp | 365 +++-- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 24 + .../Transforms/TensorConstantBufferize.cpp | 6 +- .../Tosa/Transforms/TosaMakeBroadcastable.cpp | 2 +- mlir/lib/Transforms/LoopFusion.cpp | 42 +- .../GPUCommon/lower-wait-to-gpu-runtime-calls.mlir | 2 +- mlir/test/Dialect/Affine/parallelize.mlir | 25 + mlir/test/Dialect/GPU/async-region.mlir | 44 + .../Dialect/Math/polynomial-approximation.mlir | 19 +- mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir | 43 + mlir/test/Dialect/Shape/canonicalize.mlir | 16 +- mlir/test/Target/SPIRV/glsl-ops.mlir | 4 +- mlir/test/Transforms/loop-fusion.mlir | 150 ++ .../lib/Transforms/TestPolynomialApproximation.cpp | 4 +- .../mlir-cpu-runner/math_polynomial_approx.mlir | 58 +- mlir/test/mlir-cuda-runner/all-reduce-and.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-max.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-min.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-op.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-or.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-region.mlir | 2 + mlir/test/mlir-cuda-runner/all-reduce-xor.mlir | 2 + mlir/test/mlir-cuda-runner/async.mlir | 7 +- mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir | 2 + .../test/mlir-cuda-runner/multiple-all-reduce.mlir | 2 + mlir/test/mlir-cuda-runner/shuffle.mlir | 2 + mlir/test/mlir-cuda-runner/two-modules.mlir | 2 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 38 +- mlir/test/mlir-tblgen/op-decl.td | 2 +- mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp | 114 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 38 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 4 +- mlir/tools/mlir-tblgen/OpDocGen.cpp | 6 +- openmp/cmake/OpenMPTesting.cmake | 2 +- openmp/libomptarget/include/Debug.h | 16 +- openmp/libomptarget/include/omptargetplugin.h | 5 + openmp/libomptarget/plugins/exports | 1 + openmp/libomptarget/plugins/ve/src/rtl.cpp | 2 + openmp/libomptarget/src/device.h | 2 + openmp/libomptarget/src/omptarget.cpp | 13 +- openmp/libomptarget/src/rtl.cpp | 3 + openmp/libomptarget/src/rtl.h | 2 + openmp/libomptarget/test/offloading/bug49334.cpp | 148 ++ openmp/runtime/src/kmp_tasking.cpp | 3 +- openmp/runtime/test/ompt/callback.h | 50 +- openmp/runtime/test/ompt/parallel/repeated_calls.c | 4 +- .../synchronization/barrier/implicit_task_data.c | 10 +- openmp/runtime/test/ompt/synchronization/master.c | 2 +- openmp/runtime/test/ompt/tasks/task_memory.c | 6 +- openmp/runtime/tools/check-execstack.pl | 2 +- openmp/runtime/tools/check-instruction-set.pl | 2 +- openmp/runtime/tools/message-converter.pl | 2 +- .../tests/custom_data_storage/first-tool.h | 48 +- polly/lib/External/isl/doc/mypod2latex | 2 +- 373 files changed, 14194 insertions(+), 7099 deletions(-) create mode 100644 clang/test/CodeGenCUDA/static-device-var-rdc.cu create mode 100644 clang/test/SemaCUDA/static-device-var.cu create mode 100644 clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1030.cl create mode 100644 compiler-rt/test/profile/ContinuousSyncMode/get-filename.c delete mode 100644 libc/src/string/memory_utils/cacheline_size.h.def delete mode 100644 libc/src/string/memory_utils/cacheline_size_aarch64.h.inc delete mode 100644 libc/src/string/memory_utils/cacheline_size_arm.h.inc delete mode 100644 libc/src/string/memory_utils/cacheline_size_ppc64.h.inc delete mode 100644 libc/src/string/memory_utils/cacheline_size_x86.h.inc delete mode 100644 libc/src/string/memory_utils/cacheline_size_x86_64.h.inc create mode 100644 lldb/include/lldb/Core/ValueObjectUpdater.h create mode 100644 lldb/source/Core/ValueObjectUpdater.cpp create mode 100644 llvm/docs/JITLink.rst create mode 100644 llvm/test/Analysis/CostModel/AArch64/abs.ll create mode 100644 llvm/test/CodeGen/AArch64/ldst-nopreidx-sp-redzone.mir create mode 100644 llvm/test/CodeGen/AArch64/sve-pred-arith.ll copy llvm/test/CodeGen/AMDGPU/{reserved-vgpr-tuples.mir => alloc-aligned-tuples-gf [...] rename llvm/test/CodeGen/AMDGPU/{reserved-vgpr-tuples.mir => alloc-aligned-tuples- [...] create mode 100644 llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll create mode 100644 llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir rename llvm/test/CodeGen/PowerPC/{aix-csr-vector.ll => aix-csr-vector-extabi.ll} (100%) create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll copy llvm/test/Instrumentation/AddressSanitizer/{global_metadata.ll => global_with [...] create mode 100644 llvm/test/MC/ARM/thumb-function-address.s create mode 100644 llvm/test/Transforms/Coroutines/coro-alloca-07.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-alloca-08.ll create mode 100644 llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll create mode 100644 llvm/test/Transforms/NaryReassociate/nary-smax.ll create mode 100644 llvm/test/Transforms/NaryReassociate/nary-smin.ll create mode 100644 llvm/test/Transforms/NaryReassociate/nary-umax.ll create mode 100644 llvm/test/Transforms/NaryReassociate/nary-umin.ll create mode 100644 llvm/test/Transforms/ThinLTOBitcodeWriter/cfi-debug-info-cloned [...] copy llvm/utils/lit/tests/Inputs/{show-result-codes => ignore-fail}/fail.txt (100%) create mode 100644 llvm/utils/lit/tests/Inputs/ignore-fail/lit.cfg copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy llvm/utils/lit/tests/Inputs/{shtest-format => ignore-fail}/xfail.txt (100%) create mode 100644 llvm/utils/lit/tests/Inputs/ignore-fail/xpass.txt create mode 100644 llvm/utils/lit/tests/ignore-fail.py create mode 100644 openmp/libomptarget/test/offloading/bug49334.cpp