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from 3a1e9f3ed7a diagnostics: support multithreaded diagnostic paths new 05cb873005a Daily bump. new 68cb873fd36 RISC-V: Support combine extend and reduce sum to widen reduce sum new 227b18f5d76 LoongArch: Reimplement multilib build option handling.
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Summary of changes: config-ml.in | 10 - config/mt-loongarch-elf | 1 + config/mt-loongarch-gnu | 2 + config/mt-loongarch-mlib | 1 + configure | 6 + configure.ac | 6 + gcc/ChangeLog | 205 +++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 42 ++ gcc/analyzer/ChangeLog | 33 ++ gcc/config.gcc | 6 +- gcc/config/loongarch/loongarch-driver.h | 42 ++ gcc/config/loongarch/loongarch.h | 50 -- gcc/config/loongarch/t-linux | 66 +-- gcc/config/loongarch/t-loongarch | 2 +- gcc/config/loongarch/t-multilib | 68 +++ gcc/config/riscv/autovec-opt.md | 82 +++ gcc/config/riscv/autovec.md | 74 ++- gcc/config/riscv/riscv-v.cc | 7 +- gcc/config/riscv/vector-iterators.md | 51 ++ gcc/m2/ChangeLog | 44 ++ gcc/testsuite/ChangeLog | 627 +++++++++++++++++++++ .../riscv/rvv/autovec/widen/widen_reduc-1.c | 27 + .../riscv/rvv/autovec/widen/widen_reduc_order-1.c | 20 + .../riscv/rvv/autovec/widen/widen_reduc_order-2.c | 19 + .../rvv/autovec/widen/widen_reduc_order_run-1.c | 24 + .../rvv/autovec/widen/widen_reduc_order_run-2.c | 22 + .../riscv/rvv/autovec/widen/widen_reduc_run-1.c | 22 + libstdc++-v3/ChangeLog | 48 ++ 29 files changed, 1458 insertions(+), 151 deletions(-) create mode 100644 config/mt-loongarch-elf create mode 100644 config/mt-loongarch-gnu create mode 100644 config/mt-loongarch-mlib create mode 100644 gcc/config/loongarch/t-multilib create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_order-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_or [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_or [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/widen/widen_reduc_run-1.c