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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project.
from b72664fd21c Partial revert of "[llvm-ar] Document response file support [...] adds 2d756c4feb6 [LFTR] Fix post-inc pointer IV with truncated exit count (PR41998) adds 9e9eb62f9fd [APInt] Fix getBitsNeeded for INT_MIN values adds fe107fcde4d [IR][Patternmatch] Add m_SpecificInt_ULT() predicate adds e3a94ba4a92 [InstCombine] Shift amount reassociation (PR42391) adds 61a8b62b4c9 [LFTR] Remove unnecessary latch check; NFCI adds 77dc1e85683 [InstCombine] canonicalize fmin/fmax to LLVM intrinsics min [...] adds 8023c844338 [LFTR] Rephrase getLoopTest into "based-on" check; NFCI adds 6293cd05045 Replace tabs with spaces. new 4d0feb28ecb [SelectionDAG] Use the memory VT instead of result VT for F [...] new 725a8a5dc43 [X86] Custom lower AVX masked loads to masked load and vsel [...]
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Summary of changes: .../gdb_remote_client/TestRecognizeBreakpoint.py | 4 +- llvm/include/llvm/IR/PatternMatch.h | 14 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +- llvm/lib/Support/APInt.cpp | 5 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 40 +++++-- llvm/lib/Target/X86/X86InstrSSE.td | 5 - .../Transforms/InstCombine/InstCombineShifts.cpp | 48 ++++++++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 132 ++++++++++----------- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 38 +++--- .../IndVarSimplify/2011-11-01-lftrptr.ll | 7 +- .../test/Transforms/IndVarSimplify/lftr-pr41998.ll | 5 +- .../InstCombine/double-float-shrink-1.ll | 11 +- llvm/test/Transforms/InstCombine/fast-math.ll | 53 ++++----- .../Transforms/InstCombine/float-shrink-compare.ll | 37 +++--- .../InstCombine/shift-amount-reassociation.ll | 60 ++-------- llvm/unittests/ADT/APIntTest.cpp | 17 ++- llvm/unittests/IR/PatternMatch.cpp | 21 ++++ 17 files changed, 277 insertions(+), 225 deletions(-)