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from 70a047dc8d1 [Hexagon] Remove unused scheduling classes new ec8cdb046d7 [X86][BtVer2] Add missing ReadAfterLd to RM variants of AVX [...] new 849eeab8996 [Hexagon] Fix flags for store-related intrinsics
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Summary of changes: include/llvm/IR/IntrinsicsHexagon.td | 8 ++++---- lib/Target/X86/X86ScheduleBtVer2.td | 23 +++++++++++++--------- .../llvm-mca/X86/BtVer2/hadd-read-after-ld-2.s | 8 ++++---- .../X86/BtVer2/vec-logic-read-after-ld-1.s | 7 +++---- .../X86/BtVer2/vec-logic-read-after-ld-2.s | 7 +++---- 5 files changed, 28 insertions(+), 25 deletions(-)