This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository glibc.
from f896fc0f2b Correct timespec implementation [BZ #26232] new 34f0d01d5e AArch64: Align ENTRY to a cacheline new 4a733bf375 AArch64: Add optimized Q-register memcpy new 0f6278a879 AArch64: Rename IS_ARES to IS_NEOVERSE_N1
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: sysdeps/aarch64/multiarch/Makefile | 2 +- sysdeps/aarch64/multiarch/ifunc-impl-list.c | 2 + sysdeps/aarch64/multiarch/memcpy.c | 7 +- .../{memcpy.S => multiarch/memcpy_advsimd.S} | 205 +++++++++------------ sysdeps/aarch64/multiarch/memmove.c | 5 +- sysdeps/aarch64/sysdep.h | 2 +- sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 4 +- 7 files changed, 99 insertions(+), 128 deletions(-) copy sysdeps/aarch64/{memcpy.S => multiarch/memcpy_advsimd.S} (54%)