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from b088165d461 [IndVars] Remove a bit of manual constant folding [NFC] new f5bebba1225 AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics new 255a34f4a6d AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas new 6443be3e79f AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics new 2c47ef08580 AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics
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Summary of changes: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 72 +++++++++++++- .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 106 +++++++++++++++++++++ .../GlobalISel/regbankselect-amdgcn.fcmp.mir | 67 +++++++++++++ .../regbankselect-amdgcn.groupstaticsize.mir | 14 +++ .../GlobalISel/regbankselect-amdgcn.icmp.mir | 67 +++++++++++++ ...bankselect-amdgcn.s.get.waveid.in.workgroup.mir | 14 +++ .../GlobalISel/regbankselect-amdgcn.s.getpc.mir | 14 +++ .../GlobalISel/regbankselect-amdgcn.s.getreg.mir | 14 +++ .../regbankselect-amdgcn.s.memrealtime.mir | 14 +++ .../GlobalISel/regbankselect-amdgcn.s.memtime.mir | 14 +++ 10 files changed, 395 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstatic [...] create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.wavei [...] create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir