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from f5757f76499 [lit] Factor out some shell input/output redirection logic, NFC new 0f915c6a85e AMDGPU: Remove unnecessary IR from MIR tests new 92223c6fe5a AMDGPU: Minor cleanup of shrinking logic new 8763b3ac42d AMDGPU: Add macro fusion schedule DAG mutation
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Summary of changes: .../AMDGPUMacroFusion.cpp} | 63 +++-- lib/Target/AMDGPU/AMDGPUMacroFusion.h | 19 ++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + lib/Target/AMDGPU/CMakeLists.txt | 1 + lib/Target/AMDGPU/SIShrinkInstructions.cpp | 12 +- test/CodeGen/AMDGPU/addrspacecast.ll | 33 ++- test/CodeGen/AMDGPU/clamp-omod-special-case.mir | 46 +-- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 187 ++++-------- test/CodeGen/AMDGPU/ctlz.ll | 25 +- test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 4 +- test/CodeGen/AMDGPU/detect-dead-lanes.mir | 10 - test/CodeGen/AMDGPU/fcmp.f16.ll | 312 ++++++--------------- test/CodeGen/AMDGPU/fold-immediate-output-mods.mir | 53 ++-- test/CodeGen/AMDGPU/fold-operands-order.mir | 6 - test/CodeGen/AMDGPU/inline-asm.ll | 4 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 227 +++++++++++++++ test/CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- test/CodeGen/AMDGPU/sad.ll | 4 +- test/CodeGen/AMDGPU/select.f16.ll | 59 ++-- test/CodeGen/AMDGPU/setcc.ll | 10 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 157 +++-------- test/CodeGen/AMDGPU/uaddo.ll | 4 +- test/CodeGen/AMDGPU/usubo.ll | 4 +- test/CodeGen/AMDGPU/v_cndmask.ll | 12 +- test/CodeGen/AMDGPU/vselect.ll | 25 +- test/CodeGen/AMDGPU/waitcnt-permute.mir | 12 - 26 files changed, 596 insertions(+), 699 deletions(-) copy lib/Target/{ARM/ARMMacroFusion.cpp => AMDGPU/AMDGPUMacroFusion.cpp} (50%) create mode 100644 lib/Target/AMDGPU/AMDGPUMacroFusion.h create mode 100644 test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir