[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (317fdcd09ae -> 757fe53994c)

21 Jan 2020


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig
in repository toolchain/ci/llvm-project.
from  317fdcd09ae AMDGPU: Cleanup and generate 64-bit div tests
      adds  c81fe34718d [lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatab [...]
      adds  d232c215669 [AsmPrinter] Don't emit __patchable_function_entries entry  [...]
      adds  edd4398f4cd Revert "PR17164: Change clang's default behavior from -flax [...]
      adds  e5823bf806c AMDGPU: Don't create weird sized integers
      adds  385fb337de9 AMDGPU: Generate test checks
      adds  fa40b41168f Revert "[libc++] Optimize / partially inline basic_string c [...]
      adds  d1da63664f4 [lld][RISCV] Print error when encountering R_RISCV_ALIGN
      adds  e446322f73f [llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF  [...]
      adds  c72aa27f917 AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live
      adds  38bdb94120b [clangd] Fix rename for explicit destructor calls
      adds  b16f82ad3b0 Revert "[MachO] Add a test for detecting reserved unit length."
      adds  5721483b642 [AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583 [...]
      adds  02c1321139d [MC] Improve a report_fatal_error
      adds  e15fb06e2d0 [RISCV] Pass target-abi via module flag metadata
      adds  a80291ce10b Revert "[AMDGPU] Invert the handling of skip insertion."
      adds  65f6ee618e7 [gn build] Port a80291ce10b
      adds  fffea2842d2 [MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atom [...]
      adds  ff9877ce34b [ARM][MVE] Enable masked scatter
      adds  6b4f86f65f1 Reapply: [MachO] Add a test for detecting reserved unit length.
      adds  dbd0ad33668 [LLD][ELF] Add support for INPUT_SECTION_FLAGS
      adds  a672f579a2f Regenerate rotated uxt tests
      adds  8d2e6bdbe14 [TargetLowering] SimplifyDemandedBits - Pull out InDemanded [...]
      adds  d6f4cfdbd79 [llvm-exegesis] Add support for AVX512 explicit rounding operands.
      adds  5f5f4785648 [DAG] Fold extract_vector_elt (scalar_to_vector), K to unde [...]
      adds  89e6601fb15 [llvm-readelf][llvm-readobj] - Fix the indentation when pri [...]
      adds  bc29069dc40 [analyzer] Enable PlacementNewChecker by default
      adds  4e8116f4692 [ELF] Refactor uses of getInputSections to improve efficiency NFC
      adds  1f7b95d038e [lldb][NFC] Convert LLDB_LOGF to LLDB_LOG in ClangASTSource.cpp
      adds  87632b9e061 [llvm-exegesis] Fix support for LEA64_32r.
      adds  9a52ea5cf9c Create a gpu.module operation for the GPU Dialect.
      adds  3f9b6b270f8 [lldb] Use llvm::stable_sort in Line
      adds  bc8a1ab26fb [Alignment][NFC] Use Align with CreateMaskedLoad
      adds  295aea80789 [llvm-readobj] - Remove rpath.test.
      adds  139771f8b02 [Alignment][NFC] Use Align with CreateElementUnorderedAtomi [...]
      adds  5181c67febc AMDGPU/GlobalISel: Add some baseline tests for unmerge lega [...]
      adds  fccd0da5ee6 [clang-tidy] New check: bugprone-misplaced-pointer-arithmet [...]
      adds  65a31a97b45 [gn build] Port fccd0da5ee6
      adds  18a96fd573b [lldb/DWARF] Fix a leak in line table construction
      adds  5e70f4bdc15 [lldb/breakpad] Use new line table constructor
      adds  651fa669a23 [TargetLowering] SimplifyDemandedBits ANY_EXTEND/ANY_EXTEND [...]
      adds  f651c402a22 [clangd] Capture the missing injected class names in findEx [...]
      adds  b065902ed45 [X86] combineBT - use SimplifyDemandedBits instead of GetDe [...]
      adds  47f99d2ca8a [SelectionDAG] GetDemandedBits - remove ANY_EXTEND handling
      adds  d7032bc3c00 [PowerPC][NFC] Reclaim TSFlags bit 6
      adds  81f385b0c6e Make dropTriviallyDeadConstantArrays not quadratic
      adds  f04284cf1d4 [TargetLowering] SimplifyDemandedBits ISD::SRA multi-use handling
      adds  6a24339a452 [ARM] Follow AACPS standard for volatile bit-fields access width
      adds  2147703bde1 Revert "[ARM] Follow AACPS standard for volatile bit-fields [...]
      adds  1256d68093a [RISCV] Check the target-abi module flag matches the option
      adds  1fbb1d6df01 [clangd] Drop returntype/type when hovering over type-ish names
      adds  020041d99b5 Update spelling of {analyze,insert,remove}Branch in strings [...]
      adds  a6883017ea9 [Clang] Un-break scan-build after integrated-cc1 change
      adds  3023352a7d0 [mlir][spirv] Simplify scalar type size calculation.
      adds  7b8dc8c5769 [libcxx] Support Python 3.8 in the test suite
      adds  305bf5b21db [Hexagon] Add support for Hexagon v67t microarchitecture (t [...]
      adds  a731c6ba94d [lldb/Initializers] Move all macOS initializers into Platfo [...]
      adds  24d7a0935be [HIP] use GetProgramPath for executable discovery
      adds  2e667d07c77 [FPEnv][SystemZ] Platform-specific builtin constrained FP e [...]
      adds  7a8b0b1595e [StackColoring] Remap PseudoSourceValue frame indices via M [...]
      adds  72b8bad1505 [lldb/Hexagon] Include <mutex>
      adds  8e1f0974c28 [PowerPC] Delete PPCSubtarget::isDarwin and isDarwinABI
      adds  cf263807a6c [lldb/tools] Update lldb-test's system initializer
      adds  372cb38f451 [Codegen] Emit both AssumeAlignedAttr and AllocAlignAttr as [...]
      adds  6b2f820221c [NFC][Codegen] Use MaybeAlign + APInt::getLimitedValue() wh [...]
      adds  68122b5826b [APFloat] Extend conversion from special strings
      adds  9148b8b734e [OpenMP][Offloading] Fix the issue that omp_get_num_devices [...]
      adds  a95965d467c [APFloat][unittest] Fix -Wunused-variable after D69773
      adds  dd18729b2a7 [Attr][Doc][NFC] Fix code snippet formatting for attribute  [...]
      adds  9aba2ced34b [debugserver] Delete macOS/PPC debug server implementation
      adds  0b336b6048a [APFloat] Add support for operations on Signaling NaN
      adds  441aebc5235 [debugserver] Delete stale code referencing ppc
      adds  f63d7637387 [TableGen] Use a table to lookup MVE intrinsic names
      adds  7c9bcba644c [lldb] Add a setting to not install the main executable
      adds  f2dc179d686 [mlir][ods] Fix StringRef initialization in builders
      adds  3ef169e586f [WebAssembly][InstrEmitter] Foundation for multivalue call  [...]
      adds  561fa844777 [scudo][standalone] Allow sched_getaffinity to fail
      adds  6cf95ac2234 [Hexagon] Add REQUIRES: asserts to a testcase using -debug-only
      adds  9bb11785dca Revert "[lldb] Add a setting to not install the main executable"
      adds  95116c591fa [lldb] Add a setting to not install the main executable
      adds  28857d14a86 [WebAssembly] Split and recombine multivalue calls for ISel
      adds  ff1f3cc1a12 [GISelKnownBits] Make the max depth a parameter of the analysis
      adds  2d77e0b9f22 Fix tests of constant folding of fp operations on NaN values
      adds  cbf08d0f575 [mlir] Fix LLVM intrinsic convesion generator for overloada [...]
      adds  6b9a5e6f05f [lld][Hexagon] Add General Dynamic relocations (GD)
      adds  41fcd17250f [Sema] Avoid Wrange-loop-analysis false positives
      adds  020ed6713d8 [clang-tidy] Fix check for Abseil internal namespace access
      adds  2a879e6884b [APFloat][unittest] Fix -Wsign-compare after D69773
      adds  b6c62ef0871 [lldb/Platform] Re-add ifdef's to guard macOS-only code.
      adds  5260bc2497b Allow arbitrary capability name in Thread Safety Analysis
      adds  a8c2f76cd25 Removing an accidentally duplicated line of test code to fix bots.
      adds  b0b2b7e0992 Revert "[Clang] Un-break scan-build after integrated-cc1 change"
      adds  89e43f04ba8 Revert "List implicit operator== after implicit destructors [...]
      adds  aa91ce3e1dd [lldb/CMake] Add check-lldb-shell and check-lldb-api target [...]
      adds  fd109308a7b AMDGPU/GlobalISel: Legalize G_PTR_ADD for arbitrary pointers
      adds  0478eadf73c [lldb/DataFormatters] Fix the `$$deference$$` synthetic child
      adds  7b771ed4484 [APInt] Fix tests that had wrong assumption about sdivs wit [...]
      adds  9a5a6e94651 AMDGPU/GlobalISel: Merge G_PTR_ADD/G_PTR_MASK rules
      adds  133a7e631ce [PATCH] Reland [Clang] Un-break scan-build after integrated [...]
      adds  757fe53994c [SLP] Add a test showing miscompilation in AltOpcode support
No new revisions were added by this update.
Summary of changes:
 .../abseil/NoInternalDependenciesCheck.cpp         |    8 +-
 .../clang-tidy/bugprone/BugproneTidyModule.cpp     |    3 +
 .../clang-tidy/bugprone/CMakeLists.txt             |    1 +
 .../MisplacedPointerArithmeticInAllocCheck.cpp     |  105 +
 .../MisplacedPointerArithmeticInAllocCheck.h       |   36 +
 clang-tools-extra/clangd/FindTarget.cpp            |   11 +
 clang-tools-extra/clangd/Hover.cpp                 |   25 +-
 .../clangd/unittests/FindTargetTests.cpp           |   92 +-
 clang-tools-extra/clangd/unittests/HoverTests.cpp  |   11 +-
 clang-tools-extra/clangd/unittests/RenameTests.cpp |   37 +
 .../clangd/unittests/SemanticHighlightingTests.cpp |    2 +-
 clang-tools-extra/docs/ReleaseNotes.rst            |    7 +
 ...prone-misplaced-pointer-arithmetic-in-alloc.rst |   25 +
 clang-tools-extra/docs/clang-tidy/checks/list.rst  |    1 +
 .../checkers/Inputs/absl/strings/internal-file.h   |    2 +
 .../checkers/abseil-no-internal-dependencies.cpp   |   15 +-
 ...ugprone-misplaced-pointer-arithmetic-in-alloc.c |   56 +
 ...prone-misplaced-pointer-arithmetic-in-alloc.cpp |   53 +
 clang/docs/CommandGuide/clang.rst                  |   11 +-
 clang/include/clang/Basic/Attr.td                  |    4 -
 clang/include/clang/Basic/AttrDocs.td              |   41 +-
 clang/include/clang/Basic/DiagnosticSemaKinds.td   |    3 -
 clang/include/clang/Basic/LangOptions.def          |    2 +-
 clang/include/clang/Driver/Options.td              |    2 +
 .../clang/StaticAnalyzer/Checkers/Checkers.td      |   12 +-
 clang/lib/AST/VTableBuilder.cpp                    |   46 +-
 clang/lib/Basic/Targets/Hexagon.cpp                |   12 +-
 clang/lib/Basic/Targets/Hexagon.h                  |    5 +
 clang/lib/CodeGen/CGBuiltin.cpp                    |  123 +-
 clang/lib/CodeGen/CGCall.cpp                       |    8 +-
 clang/lib/CodeGen/CodeGenModule.cpp                |    7 +
 clang/lib/Driver/Compilation.cpp                   |    2 +-
 clang/lib/Driver/Job.cpp                           |    2 +-
 clang/lib/Driver/ToolChains/HIP.cpp                |   23 +-
 clang/lib/Driver/ToolChains/Hexagon.cpp            |   13 +-
 clang/lib/Sema/SemaDeclAttr.cpp                    |    9 -
 clang/lib/Sema/SemaStmt.cpp                        |    6 +
 clang/test/Analysis/placement-new-user-defined.cpp |    2 +-
 clang/test/Analysis/placement-new.cpp              |   18 +-
 .../assume-aligned-and-alloc-align-attributes.c    |   77 +
 clang/test/CodeGen/builtins-hexagon-v67-audio.c    |    1 +
 .../CodeGen/builtins-systemz-vector-constrained.c  |   55 +
 .../CodeGen/builtins-systemz-vector2-constrained.c |   69 +
 .../CodeGen/builtins-systemz-zvector-constrained.c |  317 ++
 .../builtins-systemz-zvector2-constrained.c        |  543 ++++
 .../builtins-systemz-zvector3-constrained.c        |  109 +
 clang/test/CodeGen/riscv-metadata.c                |   14 +
 clang/test/CodeGenCXX/virtual-compare.cpp          |   53 -
 clang/test/Driver/cc-print-options.c               |    3 +-
 clang/test/Driver/cuda-simple.cu                   |    4 +-
 clang/test/Driver/hexagon-toolchain-elf.c          |    8 +
 clang/test/Driver/offloading-interoperability.c    |    4 +-
 clang/test/Driver/option-aliases.c                 |    4 +-
 clang/test/Headers/altivec-header.c                |    2 +-
 clang/test/Headers/arm-neon-header.c               |    2 +-
 clang/test/Headers/x86-intrinsics-headers.c        |    2 +-
 clang/test/Headers/x86intrin-2.c                   |    4 +-
 clang/test/Headers/x86intrin.c                     |    2 +-
 clang/test/Sema/attr-capabilities.c                |    4 +-
 clang/test/Sema/vector-assign.c                    |   12 +-
 clang/test/Sema/vector-cast.c                      |   23 +-
 clang/test/Sema/vector-ops.c                       |    3 +-
 clang/test/SemaCXX/warn-range-loop-analysis.cpp    |   72 +
 clang/utils/TableGen/MveEmitter.cpp                |   45 +-
 compiler-rt/lib/scudo/standalone/common.h          |    1 +
 compiler-rt/lib/scudo/standalone/linux.cpp         |    5 +-
 compiler-rt/lib/scudo/standalone/tsd_shared.h      |    4 +-
 libcxx/include/string                              |   21 +-
 libcxx/utils/libcxx/test/target_info.py            |   14 +-
 libcxxabi/test/test_demangle.pass.cpp              |   18 +-
 lld/ELF/Arch/Hexagon.cpp                           |   11 +
 lld/ELF/Arch/RISCV.cpp                             |    9 +-
 lld/ELF/Driver.cpp                                 |    3 +-
 lld/ELF/LinkerScript.cpp                           |   11 +-
 lld/ELF/LinkerScript.h                             |   10 +-
 lld/ELF/OutputSections.cpp                         |   13 +-
 lld/ELF/OutputSections.h                           |    3 +-
 lld/ELF/ScriptParser.cpp                           |   97 +-
 lld/test/ELF/aarch64-cortex-a53-843419-recognize.s |    8 +
 lld/test/ELF/hexagon-tls-gd.s                      |   51 +
 lld/test/ELF/input-section-flags-diag1.test        |   13 +
 lld/test/ELF/input-section-flags-diag2.test        |   13 +
 lld/test/ELF/input-section-flags-diag3.test        |   13 +
 lld/test/ELF/input-section-flags-keep.s            |   27 +
 lld/test/ELF/input-section-flags.s                 |  115 +
 lld/test/ELF/riscv-reloc-align.s                   |   12 +
 .../MachOTests/MachONormalizedFileToAtomsTests.cpp |    7 +-
 lldb/docs/use/variable.rst                         |   25 +-
 lldb/include/lldb/Symbol/LineTable.h               |    8 +-
 lldb/include/lldb/Target/Target.h                  |    2 +
 .../target/auto-install-main-executable/Makefile   |    9 +
 .../TestAutoInstallMainExecutable.py               |  137 +
 .../target/auto-install-main-executable/main.cpp   |    8 +
 .../TestDataFormatterPythonSynth.py                |   42 +-
 .../fooSynthProvider.py                            |   26 +
 .../data-formatter-python-synth/main.cpp           |    8 +-
 lldb/source/API/SystemInitializerFull.cpp          |   26 -
 lldb/source/Core/ValueObject.cpp                   |    3 +
 .../ExpressionParser/Clang/ClangASTSource.cpp      |  330 +-
 .../Plugins/Platform/MacOSX/PlatformMacOSX.cpp     |   35 +-
 .../SymbolFile/Breakpad/SymbolFileBreakpad.cpp     |   15 +-
 .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp   |   11 +-
 .../Plugins/SymbolFile/PDB/SymbolFilePDB.cpp       |    4 +-
 lldb/source/Symbol/LineTable.cpp                   |   22 +-
 lldb/source/Target/Target.cpp                      |   18 +-
 lldb/source/Target/TargetProperties.td             |    3 +
 lldb/test/API/CMakeLists.txt                       |    8 +
 lldb/test/Shell/CMakeLists.txt                     |    8 +
 lldb/tools/debugserver/source/DNBArch.h            |    1 -
 lldb/tools/debugserver/source/DNBDefs.h            |    6 +-
 .../tools/debugserver/source/MacOSX/CMakeLists.txt |    5 -
 .../debugserver/source/MacOSX/ppc/DNBArchImpl.cpp  |  487 ---
 .../debugserver/source/MacOSX/ppc/DNBArchImpl.h    |  159 -
 lldb/tools/debugserver/source/RNBDefs.h            |    8 -
 lldb/tools/debugserver/source/RNBServices.cpp      |    5 +-
 lldb/tools/lldb-test/SystemInitializerTest.cpp     |   27 -
 llvm/docs/CommandGuide/llvm-objcopy.rst            |    1 +
 llvm/docs/WritingAnLLVMBackend.rst                 |   34 +-
 llvm/include/llvm/Analysis/VectorUtils.h           |    1 +
 llvm/include/llvm/BinaryFormat/ELF.h               |    1 +
 .../llvm/CodeGen/GlobalISel/GISelKnownBits.h       |    5 +-
 llvm/include/llvm/CodeGen/MachineInstr.h           |    6 +-
 llvm/include/llvm/CodeGen/PseudoSourceValue.h      |    3 +-
 llvm/include/llvm/CodeGen/TargetInstrInfo.h        |   14 +-
 llvm/include/llvm/IR/IRBuilder.h                   |   49 +-
 llvm/include/llvm/MC/MCInstrDesc.h                 |    6 +-
 llvm/include/llvm/Target/TargetMachine.h           |   12 +-
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp         |    6 +-
 llvm/lib/CodeGen/BranchFolding.cpp                 |    2 +-
 llvm/lib/CodeGen/EarlyIfConversion.cpp             |   12 +-
 llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp     |   10 +-
 llvm/lib/CodeGen/MachineBasicBlock.cpp             |    4 +-
 llvm/lib/CodeGen/MachineBlockPlacement.cpp         |   14 +-
 llvm/lib/CodeGen/MachineVerifier.cpp               |    6 +-
 llvm/lib/CodeGen/PrologEpilogInserter.cpp          |    2 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |    4 +
 llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp     |   12 +-
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp     |   13 -
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp   |   20 +-
 llvm/lib/CodeGen/StackColoring.cpp                 |   14 +-
 llvm/lib/IR/AutoUpgrade.cpp                        |    9 +-
 llvm/lib/IR/IRBuilder.cpp                          |   26 +-
 llvm/lib/IR/LLVMContextImpl.cpp                    |   22 +-
 llvm/lib/MC/ELFObjectWriter.cpp                    |    2 +-
 llvm/lib/ObjectYAML/ELFYAML.cpp                    |    1 +
 llvm/lib/Support/APFloat.cpp                       |  139 +-
 .../Target/AArch64/AArch64ConditionOptimizer.cpp   |    2 +-
 .../Target/AArch64/AArch64ConditionalCompares.cpp  |    8 +-
 llvm/lib/Target/AMDGPU/AMDGPU.h                    |    3 -
 llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp    |    7 +-
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |    7 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |    4 +
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp     |    2 -
 llvm/lib/Target/AMDGPU/CMakeLists.txt              |    1 -
 llvm/lib/Target/AMDGPU/R600InstrInfo.cpp           |    2 +-
 llvm/lib/Target/AMDGPU/SIInsertSkips.cpp           |    5 +-
 llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp      |   10 +-
 .../Target/AMDGPU/SIRemoveShortExecBranches.cpp    |  158 -
 llvm/lib/Target/ARC/ARCInstrInfo.cpp               |    4 +-
 llvm/lib/Target/ARM/ARMTargetTransformInfo.h       |    4 +-
 llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp   |  198 +-
 .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp  |   26 +-
 .../Hexagon/Disassembler/HexagonDisassembler.cpp   |    5 +-
 llvm/lib/Target/Hexagon/Hexagon.td                 |   16 +
 llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp     |   12 +-
 .../lib/Target/Hexagon/HexagonConstPropagation.cpp |    9 +-
 llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp   |   12 +-
 llvm/lib/Target/Hexagon/HexagonDepArch.h           |    5 +-
 llvm/lib/Target/Hexagon/HexagonDepIICScalar.td     |  828 +++++
 llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp   |    6 +-
 llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp       |  155 +-
 llvm/lib/Target/Hexagon/HexagonInstrInfo.h         |   24 +-
 llvm/lib/Target/Hexagon/HexagonPatterns.td         |   15 +-
 llvm/lib/Target/Hexagon/HexagonSchedule.td         |    1 +
 llvm/lib/Target/Hexagon/HexagonScheduleV67T.td     |   61 +
 llvm/lib/Target/Hexagon/HexagonSubtarget.cpp       |    8 +
 llvm/lib/Target/Hexagon/HexagonSubtarget.h         |    9 +
 llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp  |   69 +-
 llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h    |    8 +
 .../Hexagon/MCTargetDesc/HexagonAsmBackend.cpp     |   15 +-
 .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp   |    6 +-
 .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp    |  103 +-
 .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.h      |   28 +-
 .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp   |   52 +-
 .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.h     |    3 +
 .../Hexagon/MCTargetDesc/HexagonShuffler.cpp       |   45 +-
 .../Target/Hexagon/MCTargetDesc/HexagonShuffler.h  |   20 +-
 llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp          |    2 +-
 llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp           |    2 +-
 llvm/lib/Target/PowerPC/PPC.h                      |    9 -
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp          |   36 +-
 llvm/lib/Target/PowerPC/PPCFrameLowering.cpp       |   47 +-
 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp        |    6 -
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |   73 +-
 llvm/lib/Target/PowerPC/PPCInstrFormats.td         |    2 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp           |    5 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.h             |    2 +-
 llvm/lib/Target/PowerPC/PPCMCInstLower.cpp         |   28 -
 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp        |   17 +-
 llvm/lib/Target/PowerPC/PPCSubtarget.cpp           |   21 -
 llvm/lib/Target/PowerPC/PPCSubtarget.h             |   18 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp           |    2 +-
 llvm/lib/Target/RISCV/RISCVTargetMachine.cpp       |   14 +-
 llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp      |   24 +-
 llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h        |    2 +
 .../MCTargetDesc/WebAssemblyMCTargetDesc.h         |   11 +-
 llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp |    2 +-
 llvm/lib/Target/WebAssembly/WebAssemblyISD.def     |    1 +
 .../Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp |   21 +
 .../Target/WebAssembly/WebAssemblyISelLowering.cpp |   58 +-
 .../lib/Target/WebAssembly/WebAssemblyInstrCall.td |   25 +
 .../Target/WebAssembly/WebAssemblyRegStackify.cpp  |    9 +-
 .../Target/WebAssembly/WebAssemblyTargetMachine.h  |    2 +-
 .../Target/WebAssembly/WebAssemblyUtilities.cpp    |   66 +-
 llvm/lib/Target/WebAssembly/WebAssemblyUtilities.h |    4 +
 llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h     |    2 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |    5 +-
 llvm/lib/Target/XCore/XCoreInstrInfo.cpp           |    2 +-
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    2 +-
 .../Transforms/Instrumentation/MemorySanitizer.cpp |    5 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |    6 +-
 .../AArch64/patchable-function-entry-bti.ll        |   13 +-
 .../CodeGen/AArch64/patchable-function-entry.ll    |   27 +-
 .../AMDGPU/GlobalISel/divergent-control-flow.ll    |   11 +-
 .../AMDGPU/GlobalISel/inst-select-ptr-add.mir      |  146 +
 .../CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir |   45 +-
 .../AMDGPU/GlobalISel/legalize-unmerge-values.mir  |  734 +++++
 .../GlobalISel/regbankselect-amdgcn.ps.live.mir    |   17 +
 .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll     | 3227 ++++++++++++--------
 .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll   |  104 +-
 .../AMDGPU/atomic_optimizations_local_pointer.ll   |  312 +-
 .../AMDGPU/atomic_optimizations_pixelshader.ll     |    2 +-
 llvm/test/CodeGen/AMDGPU/branch-condition-and.ll   |    5 +-
 llvm/test/CodeGen/AMDGPU/branch-relaxation.ll      |    9 +-
 llvm/test/CodeGen/AMDGPU/call-skip.ll              |    9 +-
 llvm/test/CodeGen/AMDGPU/collapse-endcf.ll         |   49 +-
 .../CodeGen/AMDGPU/control-flow-fastregalloc.ll    |   15 +-
 llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll   |    8 +-
 llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll   |    2 +-
 llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll          |   21 +-
 .../AMDGPU/divergent-branch-uniform-condition.ll   |   11 +-
 llvm/test/CodeGen/AMDGPU/else.ll                   |    3 +-
 llvm/test/CodeGen/AMDGPU/hoist-cond.ll             |    2 +-
 .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir |    2 +-
 llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir      |    2 +-
 .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir  |    2 +-
 .../CodeGen/AMDGPU/insert-skips-kill-uncond.mir    |    2 +-
 llvm/test/CodeGen/AMDGPU/max.i16.ll                |   29 +-
 .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll |    6 +-
 llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll    |    3 +-
 llvm/test/CodeGen/AMDGPU/ret_jump.ll               |   23 +-
 llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll  |    2 +
 .../si-lower-control-flow-unreachable-block.ll     |   10 +-
 llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir |    2 +-
 .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir     |    2 +-
 llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll       |    7 +-
 llvm/test/CodeGen/AMDGPU/skip-if-dead.ll           |   13 +-
 llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll          |    2 +-
 .../stack-pointer-offset-relative-frameindex.ll    |    3 +-
 .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll   |    5 +-
 llvm/test/CodeGen/AMDGPU/uniform-cfg.ll            |    2 +-
 .../AMDGPU/uniform-loop-inside-nonuniform.ll       |    2 +
 llvm/test/CodeGen/AMDGPU/valu-i1.ll                |   42 +-
 llvm/test/CodeGen/AMDGPU/wave32.ll                 |   16 +-
 llvm/test/CodeGen/AMDGPU/wqm.ll                    |    5 +-
 llvm/test/CodeGen/ARM/uxt_rot.ll                   |  129 +-
 .../CodeGen/Hexagon/disable-const64-tinycore.ll    |   91 +
 llvm/test/CodeGen/Hexagon/disable-const64.ll       |   33 +
 llvm/test/CodeGen/Hexagon/tc_duplex.ll             |   27 +
 llvm/test/CodeGen/Hexagon/tc_duplex_asm.ll         |   22 +
 llvm/test/CodeGen/Hexagon/tc_sched.ll              |   82 +
 llvm/test/CodeGen/Hexagon/tc_sched1.ll             |   32 +
 llvm/test/CodeGen/Hexagon/tiny_bkfir_artdeps.ll    |  131 +
 llvm/test/CodeGen/Hexagon/tiny_bkfir_loop_align.ll |  134 +
 llvm/test/CodeGen/Hexagon/tinycore.ll              |   51 +
 .../CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll  |   44 -
 .../test/CodeGen/PowerPC/stack-coloring-vararg.mir |   14 +-
 llvm/test/CodeGen/RISCV/module-target-abi.ll       |   24 +
 llvm/test/CodeGen/RISCV/module-target-abi2.ll      |   27 +
 llvm/test/CodeGen/SystemZ/branch-08.ll             |    2 +-
 llvm/test/CodeGen/SystemZ/int-cmp-02.ll            |    2 +-
 llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll |   55 +-
 .../CodeGen/Thumb2/mve-scatter-ind16-scaled.ll     |  181 ++
 .../CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll   |  460 +++
 .../CodeGen/Thumb2/mve-scatter-ind32-scaled.ll     |  240 ++
 .../CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll   |  419 +++
 .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll    |  540 ++++
 llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll       |  633 ++++
 llvm/test/CodeGen/WebAssembly/multivalue.ll        |  130 +-
 .../test/CodeGen/X86/const-shift-of-constmasked.ll |    4 +-
 llvm/test/CodeGen/X86/patchable-function-entry.ll  |   33 +-
 llvm/test/CodeGen/X86/vector-sext.ll               |    4 +-
 llvm/test/MC/Hexagon/audio.s                       |   27 +
 llvm/test/MC/Hexagon/cmpyrw.s                      |    3 +
 llvm/test/MC/Hexagon/extensions/v67t_audio.s       |  108 +
 llvm/test/MC/Hexagon/smallcore_dis.s               |   12 +
 llvm/test/MC/Hexagon/v67t_align.s                  |   15 +
 llvm/test/MC/Hexagon/v67t_arch.s                   |   10 +
 llvm/test/MC/Hexagon/v67t_option.s                 |   15 +
 llvm/test/Transforms/ConstProp/fma.ll              |    4 +-
 llvm/test/Transforms/InstSimplify/fp-nan.ll        |    4 +-
 .../SLPVectorizer/X86/no_alternate_divrem.ll       |  131 +
 .../tools/llvm-exegesis/X86/latency-LEA64_32r.s    |   16 +
 .../ELF/rename-section-flag-osproc-mask.test       |    2 -
 .../ELF/rename-section-flag-preserved.test         |    6 +-
 .../llvm-objcopy/ELF/rename-section-flag.test      |    7 +-
 .../tools/llvm-objcopy/ELF/set-section-flags.test  |    8 +-
 .../llvm-readobj/ELF/Inputs/rpath.exe.elf-x86_64   |  Bin 5632 -> 0 bytes
 .../ELF/dynamic-tags-machine-specific.test         |  192 +-
 llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test |  293 +-
 llvm/test/tools/llvm-readobj/ELF/rpath.test        |    4 -
 llvm/tools/llvm-exegesis/lib/X86/Target.cpp        |   50 +-
 llvm/tools/llvm-objcopy/CopyConfig.cpp             |    5 +-
 llvm/tools/llvm-objcopy/CopyConfig.h               |    3 +-
 llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp         |   11 +-
 llvm/tools/llvm-readobj/ELFDumper.cpp              |   46 +-
 llvm/unittests/ADT/APFloatTest.cpp                 |  567 ++--
 llvm/unittests/ADT/APIntTest.cpp                   |   31 +-
 .../llvm-exegesis/X86/SnippetGeneratorTest.cpp     |   18 +
 .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn |    1 +
 .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn   |    1 -
 .../mlir/Conversion/GPUToCUDA/GPUToCUDAPass.h      |   10 +-
 .../mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h      |    7 +-
 .../mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h    |    6 +-
 mlir/include/mlir/Dialect/GPU/GPUOps.td            |   52 +
 mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h     |    1 +
 mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td        |   15 +
 mlir/include/mlir/TableGen/Attribute.h             |    4 +-
 .../GPUToCUDA/ConvertKernelFuncToCubin.cpp         |   21 +-
 .../GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp     |   13 +-
 .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp  |   21 +-
 .../GPUToROCDL/LowerGpuOpsToROCDLOps.cpp           |   12 +-
 mlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt      |    7 +
 .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp    |   55 +-
 .../GPUToSPIRV/ConvertGPUToSPIRVPass.cpp           |   15 +-
 mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td       |   22 +
 .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp |    3 +
 mlir/lib/Dialect/GPU/IR/GPUDialect.cpp             |   55 +-
 .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp |   22 +-
 mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp         |  194 +-
 mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp           |   16 +-
 .../GPUToCUDA/lower-launch-func-to-cuda.mlir       |    2 +-
 .../GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir      |    6 +-
 mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir    |   20 +-
 .../Conversion/GPUToNVVM/memory-attrbution.mlir    |    8 +-
 mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir  |   12 +-
 mlir/test/Conversion/GPUToSPIRV/builtins.mlir      |   12 +-
 mlir/test/Conversion/GPUToSPIRV/if.mlir            |    2 +-
 mlir/test/Conversion/GPUToSPIRV/load-store.mlir    |    2 +-
 mlir/test/Conversion/GPUToSPIRV/loop.mlir          |    2 +-
 mlir/test/Conversion/GPUToSPIRV/simple.mlir        |    2 +-
 .../Conversion/StandardToSPIRV/std-to-spirv.mlir   |    9 +
 mlir/test/Dialect/GPU/invalid.mlir                 |   11 +-
 mlir/test/Dialect/GPU/ops.mlir                     |    2 +-
 mlir/test/Dialect/GPU/outlining.mlir               |    2 +-
 mlir/test/Dialect/LLVMIR/invalid.mlir              |   82 +-
 mlir/test/Dialect/LLVMIR/roundtrip.mlir            |   15 +-
 mlir/test/Target/llvmir.mlir                       |   45 +-
 mlir/test/mlir-tblgen/llvm-intrinsics.td           |    9 +-
 mlir/test/mlir-tblgen/op-attribute.td              |    5 +
 mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp   |    2 +-
 mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp      |   57 +-
 mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp        |   25 +-
 openmp/libomptarget/src/omptarget.cpp              |    5 +
 openmp/libomptarget/src/rtl.cpp                    |    4 -
 .../api/omp_get_num_devices_with_empty_target.c    |   30 +
 366 files changed, 13532 insertions(+), 4613 deletions(-)
 create mode 100644 clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeti [...]
 create mode 100644 clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeti [...]
 create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-misplaced-poi [...]
 create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-p [...]
 create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-p [...]
 create mode 100644 clang/test/CodeGen/assume-aligned-and-alloc-align-attributes.c
 create mode 100644 clang/test/CodeGen/builtins-systemz-vector-constrained.c
 create mode 100644 clang/test/CodeGen/builtins-systemz-vector2-constrained.c
 create mode 100644 clang/test/CodeGen/builtins-systemz-zvector-constrained.c
 create mode 100644 clang/test/CodeGen/builtins-systemz-zvector2-constrained.c
 create mode 100644 clang/test/CodeGen/builtins-systemz-zvector3-constrained.c
 create mode 100644 clang/test/CodeGen/riscv-metadata.c
 delete mode 100644 clang/test/CodeGenCXX/virtual-compare.cpp
 create mode 100644 lld/test/ELF/hexagon-tls-gd.s
 create mode 100644 lld/test/ELF/input-section-flags-diag1.test
 create mode 100644 lld/test/ELF/input-section-flags-diag2.test
 create mode 100644 lld/test/ELF/input-section-flags-diag3.test
 create mode 100644 lld/test/ELF/input-section-flags-keep.s
 create mode 100644 lld/test/ELF/input-section-flags.s
 create mode 100644 lld/test/ELF/riscv-reloc-align.s
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/target/auto-instal [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/target/auto-instal [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/target/auto-instal [...]
 delete mode 100644 lldb/tools/debugserver/source/MacOSX/ppc/DNBArchImpl.cpp
 delete mode 100644 lldb/tools/debugserver/source/MacOSX/ppc/DNBArchImpl.h
 delete mode 100644 llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
 create mode 100644 llvm/lib/Target/Hexagon/HexagonScheduleV67T.td
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
 create mode 100644 llvm/test/CodeGen/Hexagon/disable-const64-tinycore.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/disable-const64.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tc_duplex.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tc_duplex_asm.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tc_sched.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tc_sched1.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tiny_bkfir_artdeps.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tiny_bkfir_loop_align.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/tinycore.ll
 delete mode 100644 llvm/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll
 create mode 100644 llvm/test/CodeGen/RISCV/module-target-abi.ll
 create mode 100644 llvm/test/CodeGen/RISCV/module-target-abi2.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-scaled.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-scaled.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll
 create mode 100644 llvm/test/MC/Hexagon/audio.s
 create mode 100644 llvm/test/MC/Hexagon/cmpyrw.s
 create mode 100644 llvm/test/MC/Hexagon/extensions/v67t_audio.s
 create mode 100644 llvm/test/MC/Hexagon/smallcore_dis.s
 create mode 100644 llvm/test/MC/Hexagon/v67t_align.s
 create mode 100644 llvm/test/MC/Hexagon/v67t_arch.s
 create mode 100644 llvm/test/MC/Hexagon/v67t_option.s
 create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
 create mode 100644 llvm/test/tools/llvm-exegesis/X86/latency-LEA64_32r.s
 delete mode 100644 llvm/test/tools/llvm-readobj/ELF/Inputs/rpath.exe.elf-x86_64
 delete mode 100644 llvm/test/tools/llvm-readobj/ELF/rpath.test
 create mode 100644 mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td
 create mode 100644 openmp/libomptarget/test/api/omp_get_num_devices_with_empty_target.c
-- 
To stop receiving notification emails like this one, please contact
the administrator of this repository.

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (317fdcd09ae -> 757fe53994c)