This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 7d4736f09a0 [SelectionDAG] Remove ISD::FP_ROUND_INREG new 0bfe27be4cb AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: lib/Target/AMDGPU/AMDGPUInstrInfo.td | 49 ++++++-- .../AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir | 43 +++++++ .../GlobalISel/inst-select-amdgcn.cos.s16.mir | 47 ++++++++ .../AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir | 83 +++++++++++++ .../GlobalISel/inst-select-amdgcn.fract.s16.mir | 47 ++++++++ .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 128 +++++++++++++++++++++ .../GlobalISel/inst-select-amdgcn.ldexp.s16.mir | 73 ++++++++++++ .../GlobalISel/inst-select-amdgcn.rcp.legacy.mir | 48 ++++++++ .../AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir | 83 +++++++++++++ .../GlobalISel/inst-select-amdgcn.rcp.s16.mir | 47 ++++++++ .../GlobalISel/inst-select-amdgcn.rsq.clamp.mir | 48 ++++++++ .../GlobalISel/inst-select-amdgcn.rsq.legacy.mir | 48 ++++++++ .../AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir | 83 +++++++++++++ .../GlobalISel/inst-select-amdgcn.rsq.s16.mir | 47 ++++++++ .../AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir | 43 +++++++ .../GlobalISel/inst-select-amdgcn.sin.s16.mir | 47 ++++++++ 16 files changed, 954 insertions(+), 10 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir