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from 737191dd296 ConstantFold: Don't fold global address vs. null for addrsp [...] new a2ba13d7317 AMDGPU: Add pass to lower kernel arguments to loads
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Summary of changes: lib/Target/AMDGPU/AMDGPU.h | 4 + lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 267 ++++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 11 + lib/Target/AMDGPU/CMakeLists.txt | 1 + test/CodeGen/AMDGPU/GlobalISel/smrd.ll | 24 +- test/CodeGen/AMDGPU/add_i64.ll | 2 +- test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll | 2 +- test/CodeGen/AMDGPU/and.ll | 6 +- test/CodeGen/AMDGPU/ashr.v2i16.ll | 30 +- test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll | 16 +- .../AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll | 33 + test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 38 +- test/CodeGen/AMDGPU/basic-branch.ll | 3 +- test/CodeGen/AMDGPU/bfe-patterns.ll | 36 +- test/CodeGen/AMDGPU/bfi_int.ll | 22 +- test/CodeGen/AMDGPU/br_cc.f16.ll | 30 +- test/CodeGen/AMDGPU/branch-relaxation.ll | 2 +- test/CodeGen/AMDGPU/code-object-v3.ll | 4 +- test/CodeGen/AMDGPU/ctlz.ll | 4 +- test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 4 +- test/CodeGen/AMDGPU/ctpop.ll | 6 +- test/CodeGen/AMDGPU/ctpop16.ll | 4 +- test/CodeGen/AMDGPU/ctpop64.ll | 6 +- test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 15 +- test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 31 +- test/CodeGen/AMDGPU/extract_vector_elt-i8.ll | 99 +- test/CodeGen/AMDGPU/fabs.f16.ll | 7 +- test/CodeGen/AMDGPU/fabs.f64.ll | 8 +- test/CodeGen/AMDGPU/fabs.ll | 14 +- test/CodeGen/AMDGPU/fadd.f16.ll | 38 +- test/CodeGen/AMDGPU/fcmp.f16.ll | 60 +- test/CodeGen/AMDGPU/fcopysign.f16.ll | 4 +- test/CodeGen/AMDGPU/fcopysign.f32.ll | 11 +- test/CodeGen/AMDGPU/fcopysign.f64.ll | 16 +- test/CodeGen/AMDGPU/fma.ll | 2 +- test/CodeGen/AMDGPU/fmin_legacy.ll | 10 +- test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 8 +- test/CodeGen/AMDGPU/fmul.f16.ll | 66 +- test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 5 +- test/CodeGen/AMDGPU/fneg-fabs.f64.ll | 7 +- test/CodeGen/AMDGPU/fneg-fabs.ll | 4 +- test/CodeGen/AMDGPU/fneg.f64.ll | 6 +- test/CodeGen/AMDGPU/frame-index-amdgiz.ll | 21 +- test/CodeGen/AMDGPU/fsub.f16.ll | 60 +- test/CodeGen/AMDGPU/global_smrd.ll | 27 +- test/CodeGen/AMDGPU/half.ll | 109 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 32 +- test/CodeGen/AMDGPU/imm.ll | 98 +- test/CodeGen/AMDGPU/immv216.ll | 4 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 142 +-- test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 95 +- test/CodeGen/AMDGPU/kernel-args.ll | 130 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 10 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.ll | 54 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll | 20 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll | 16 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll | 77 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 24 +- .../AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll | 3 +- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 16 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 29 +- test/CodeGen/AMDGPU/llvm.dbg.value.ll | 8 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 64 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 70 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 55 +- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 74 +- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 33 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 14 +- test/CodeGen/AMDGPU/load-select-ptr.ll | 4 +- test/CodeGen/AMDGPU/lower-kernargs.ll | 1286 ++++++++++++++++++++ test/CodeGen/AMDGPU/lshr.v2i16.ll | 30 +- test/CodeGen/AMDGPU/madak.ll | 4 +- test/CodeGen/AMDGPU/madmk.ll | 2 +- test/CodeGen/AMDGPU/max.ll | 14 +- test/CodeGen/AMDGPU/min.ll | 41 +- test/CodeGen/AMDGPU/missing-store.ll | 2 +- .../AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll | 2 +- test/CodeGen/AMDGPU/mul.i16.ll | 3 +- test/CodeGen/AMDGPU/mul.ll | 19 +- test/CodeGen/AMDGPU/mul_int24.ll | 2 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 18 +- test/CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- test/CodeGen/AMDGPU/no-shrink-extloads.ll | 8 +- test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll | 2 +- test/CodeGen/AMDGPU/operand-spacing.ll | 18 +- test/CodeGen/AMDGPU/or.ll | 18 +- test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 261 ++-- .../CodeGen/AMDGPU/reduce-store-width-alignment.ll | 3 +- test/CodeGen/AMDGPU/sad.ll | 36 +- test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll | 15 +- test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll | 15 +- test/CodeGen/AMDGPU/select-i1.ll | 10 +- test/CodeGen/AMDGPU/select-opt.ll | 5 +- test/CodeGen/AMDGPU/select.f16.ll | 46 +- test/CodeGen/AMDGPU/setcc-opt.ll | 14 +- test/CodeGen/AMDGPU/sgpr-control-flow.ll | 24 +- test/CodeGen/AMDGPU/shl.ll | 4 +- test/CodeGen/AMDGPU/shl.v2i16.ll | 4 +- test/CodeGen/AMDGPU/shl_add_constant.ll | 18 +- test/CodeGen/AMDGPU/sign_extend.ll | 1 + test/CodeGen/AMDGPU/smed3.ll | 4 +- test/CodeGen/AMDGPU/sminmax.ll | 2 +- test/CodeGen/AMDGPU/sminmax.v2i16.ll | 50 +- test/CodeGen/AMDGPU/smrd.ll | 4 +- test/CodeGen/AMDGPU/sra.ll | 8 +- test/CodeGen/AMDGPU/srl.ll | 4 +- test/CodeGen/AMDGPU/store-weird-sizes.ll | 6 +- test/CodeGen/AMDGPU/sub.ll | 6 +- test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 25 +- test/CodeGen/AMDGPU/trunc-store-i1.ll | 31 +- test/CodeGen/AMDGPU/trunc.ll | 16 +- test/CodeGen/AMDGPU/udivrem.ll | 2 +- test/CodeGen/AMDGPU/umed3.ll | 4 +- test/CodeGen/AMDGPU/unaligned-load-store.ll | 2 +- test/CodeGen/AMDGPU/uniform-cfg.ll | 17 +- test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 79 +- test/CodeGen/AMDGPU/v_cndmask.ll | 25 +- test/CodeGen/AMDGPU/v_mac_f16.ll | 14 +- test/CodeGen/AMDGPU/v_madak_f16.ll | 6 +- test/CodeGen/AMDGPU/valu-i1.ll | 2 +- test/CodeGen/AMDGPU/xor.ll | 40 +- test/CodeGen/AMDGPU/zero_extend.ll | 44 +- 130 files changed, 3111 insertions(+), 1539 deletions(-) create mode 100644 lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp create mode 100644 test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll create mode 100644 test/CodeGen/AMDGPU/lower-kernargs.ll