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from 8e74cbc3a83 arm: [MVE intrinsics] use long_type_suffix / half_type_suff [...] new fc350792776 AArch64: update testsuite to account for new zero moves new 87dc6b1992e AArch64: support encoding integer immediates using floating [...] new 453d3d90c37 AArch64: use movi d0, #0 to clear SVE registers instead of [...]
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Summary of changes: gcc/config/aarch64/aarch64.cc | 289 ++++++++++++--------- .../gcc.target/aarch64/const_create_using_fmov.c | 87 +++++++ gcc/testsuite/gcc.target/aarch64/ldp_stp_18.c | 2 +- .../gcc.target/aarch64/memset-corner-cases.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_bf16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s8.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/acge_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acge_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acge_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/bic_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dup_f16.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_f32.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_f64.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_s16.c | 98 +++---- .../gcc.target/aarch64/sve/acle/asm/dup_s32.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_s64.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/dup_u16.c | 98 +++---- .../gcc.target/aarch64/sve/acle/asm/dup_u32.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_u64.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_u8.c | 2 +- .../gcc.target/aarch64/sve/const_fold_div_1.c | 18 +- .../gcc.target/aarch64/sve/const_fold_mul_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/dup_imm_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/fdup_1.c | 4 +- .../gcc.target/aarch64/sve/fold_div_zero.c | 80 +++--- .../gcc.target/aarch64/sve/fold_mul_zero.c | 64 ++--- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c | 2 +- 54 files changed, 656 insertions(+), 542 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/const_create_using_fmov.c