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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.
from 3b38b92541d [PoisonChecking] Add validation rules for "exact" on sdiv/udiv adds 294f37561ab [X86] LowerToHorizontalOp - use count_if to count non-UNDEF [...] adds f09d54ed2a7 Boilerplate for producing XCOFF object files from the Power [...] adds 3dbd7e98d86 [PoisonCheker] Support for out of bounds operands on shifts [...] adds 2d739940466 [libFuzzer] Include FuzzedDataProvider.h in the test withou [...] adds 3fbd8fda9a0 [OpenMP] Simplify getFloatTypeSemantics adds 9e77d0c6df1 [AMDGPU] gfx908 register file changes adds 51c2b99eff1 [lld][WebAssembly] Fix name of data section in PIC mode adds c236eeaf7d8 Fix build error for VC STL, use llvm::make_unique adds 84a1f073634 [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess [...] adds a6548d04375 [PoisonChecking] Flesh out complete todo list for full coverage adds 1366262b74d hwasan: Improve precision of checks using short granule tags. adds 5ca39e828c8 [SLP] Optimize getSpillCost(); NFCI adds 9abe8c48052 [lld][WebAssembly] Report undefined symbols during scanRelocations adds c11c43b64f3 [TSan] Refine longjmp key management on Darwin adds 9e04b532dfe [CXX] Exercise all paths through these tests. adds 8777df5270a De-templatize non-dependent VS macro logic, NFC adds 9b28d9c3318 Use the Itanium C++ ABI for the pipe_builtin.cl test adds fa9b96aeab8 XFAIL clang/test/Headers/max_align.c on i686 adds 90148db02a5 [Docs] Replace SVN revisions with lldb versions adds ba9eb483184 Reland "[TSan] Improve handling of stack pointer mangling i [...] adds 695f7821e2d [lldb_test_suite] Fix lldb test suite targeting remote Android adds 97d6fcce4ec build: use multiple `install` rather than building up a list adds 50d7f46460e [AMDGPU] gfx908 mAI instructions, MC part adds c5f8aa8bea6 [llvm-objdump] Keep warning for --disassemble-functions in [...] adds d6c15b661ab [Profile] Support raw/indexed profiles larger than 4GB adds 14a4495155c GlobalISel: Combine unmerge of merge with intermediate cast adds 269b9f940ff [lldb] Quick Fix: IRExecutionUnit check pointer before access it adds 9eb4b96be02 Add lldb type unit support to the release notes adds fa7eea9e4ec gn build: Merge r365531. adds d9f7162d4bf gn build: Merge r365541. adds 3ea053ad505 gn build: Merge r365532. adds 67a06d94954 gn build: Merge r365536. adds 1e9eae95afa [AMDGPU] gfx908 v_pk_fmac_f16 support adds 31babea94a3 [clang] DirectoryWatcher adds 3f1a34546cf AMDGPU/GlobalISel: Fix legality for G_BUILD_VECTOR adds 9145f265b0e [clangd] fix assert in test after r365531. adds 1ae60797cd9 [X86] Don't form extloads in combineExtInVec unless the loa [...] adds daf801bb115 [docs][Remarks] Add documentation for remarks in LLVM adds 4586a19da86 [MS] Treat ignored explicit calling conventions as an expli [...] adds 1a697aa6072 [Bitcode] Explicitly include Bitstream/BitCodes.h and Bitst [...] adds abce8c457dd Revert [clang] DirectoryWatcher adds 27cf6664437 [analyzer] CastValueChecker: Model casts adds b1843e130ad GlobalISel: Implement lower for G_FCOPYSIGN adds 6a29680efb0 Revert "[analyzer] CastValueChecker: Model casts" adds 693936ab8fe [analyzer] CastValueChecker: Model casts adds d0ba79fe7bf AMDGPU/GlobalISel: Add support for wide loads >= 256-bits adds 9c147bd40bc [Driver] Add float-divide-by-zero back to supported sanitiz [...] adds cc418a3af45 [Support] Move llvm::MemoryBuffer to sys::fs::file_t adds 50f70de5577 [X86] Limit getTargetConstantFromNode to only work on Norma [...] adds e856c0465d1 [analyzer] CastValueChecker: Remove a dump() adds 7f9a94e1f88 [ubsan][test] Restore float-divide-by-zero test adds 053eb356519 Try again to move common functionality from ProcessWindows [...] adds 6858f337a83 Revert accidental change to file adds 21b28fb8c5f Fix modular build issues caused by BitCodes.h adds 3837f4273fc [Coding style change] Rename variables so that they start w [...] adds 77392c3f5e7 Silence gcc warning by adding parentheses to condition [NFC] adds 3490aab63af [NFC][AArch64] Fix vector vqtb[lx][1-4]_s8 operand adds 625a0f70a98 [Syntax] Add assertion to catch invalid tokens early. NFC adds 97f19f3a497 [SimpleLoopUnswitch] Add a test case exposing a bug adds 4e09ef030e0 [test/Object/nm-trivial-object.test] - Remove 4 precompiled [...] adds eff868fdef2 [clangd] Added highlighting for class and enum types. adds 666414254a2 [docs][llvm-dwarfdump] Normalise some wording adds ed143c5d59b [ARM] Enable VPUSH/VPOP aliases when either MVE or VFP is present adds 7e296adec7a Make functions and member variables distinguishable even af [...] adds 18cb8e401c4 [clangd] Consume error to avoid assertion failures adds 57852878c0f [clangd] Stop recording tokens before running clang-tidy adds a8ce1610108 [NFC][AArch64] Fix vector vsqadd intrinsics operands adds 71cac61d018 [AArch64] Fix vector vuqadd intrinsics operands adds d000f8b69f7 [SimpleLoopUnswitch] Don't consider unswitching `switch` in [...] adds 988925c127f Fix "result of 32-bit shift implicitly converted to 64 bits [...] adds bb1167a3a18 Fix const/non-const lambda return type warning. NFCI. adds 6a58583951b [X86][SSE] EltsFromConsecutiveLoads - add basic dereference [...] adds 685911ffce9 [CMake] Remove extra lldb-framework target adds 05adc0f3170 [CMake] Distribution builds for LLDB standalone adds 110f97632e1 [CMake] `install-distribution` for LLDB on Darwin adds fb163b4b207 [ELF] Loose a condition for relocation with a symbol adds fcd978b0a6f [ELF] Update test case due to llvm r365618 adds c9721935835 [X86] EltsFromConsecutiveLoads - store Loads on a per-eleme [...] adds 94c84aca5d4 [DAGCombine] visitINSERT_SUBVECTOR - use uint64_t subvector [...] adds ef1aac31916 [X86] EltsFromConsecutiveLoads - LDBase is non-null. NFCI. adds 775b2f598a9 [NFC][ARM] Convert lambdas to static helpers adds f6ea43b8b30 [FileCheck] Fix @LINE value after match failure adds 2bf04f25ff0 [FileCheck] Simplify numeric variable interface adds 7b31491ae23 [MIPS GlobalISel] Select float and double load and store adds 7d0778ea6bc [MIPS GlobalISel] Select float and double phi adds 0a9479ef394 [X86] EltsFromConsecutiveLoads - cleanup Zero/Undef/Load el [...] adds 6b61519995e Loop pragma parsing. NFC. adds 479c2188c16 [docs][llvm-symbolizer] Fix grammar adds 6b043f05183 [clangd] Add a flag to clangdServer rename function to cont [...] adds fbafaf48feb [clangd] Trim spaces around parsed include in include extractor adds 8ceee915f35 gn build: Merge r365585 adds d5214dfa7b5 [clangd] Filter out non-governed files from broadcast adds c44a23f8f45 [LLD][ELF] - Linkerscript: fix FILL() expressions handling. adds 9cd82a4fbd2 [InferFunctionAttrs] add/adjust tests for dereferenceable; NFC adds 0735cc1954d [InstCombine] pow(C,x) -> exp2(log2(C)*x) adds 30d12be76c2 Remove two unused member variables. adds a23c5694fbb [analyzer]Add user docs rst adds bba37e89a57 [AMDGPU] Allow abs/neg source modifiers on v_cndmask_b32 adds 1c51073a3ad [NFC][InstCombine] Redundant masking before left-shift (PR42563) adds 28f44040cc4 NFC: fixed typo #ifdef --> #if to allow macro set to 0 work [...] adds 18ba9d60771 [AMDGPU] Increased the number of implicit argument bytes fo [...] adds f64b7f63828 [FileCheck] Use bool operator to test Expected adds 14cb8c1c70b docs/GithubMove.rst: Remove obsolete information adds 3700736aa82 [Remarks] Add cl::Hidden to -remarks-yaml-string-table adds 839e305eb14 [CMake] Polish Apple-lldb caches adds f554ce7f921 [CMake] Add Apple-lldb-Linux.cmake cache adds 86d3c9fd1fd [CMake][NFC] Polish comments in AddLLDB.cmake adds bf223dff7ef [CMake][NFC] Remove dead code lldb_append_link_flags() from [...] adds c5f92bd67be [PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpI [...] adds 58426a3707d AMDGPU: Serialize mode from MachineFunctionInfo adds 0ace98c9df7 ObjectFileELF: Add support for gnu-style compressed sections adds 893448a3e41 [X86] EltsFromConsecutiveLoads - ensure element reg/store s [...] adds 093f4aa72fc [X86] EltsFromConsecutiveLoads - remove duplicate check for [...] adds e595a2c9644 GlobalISel: Define the full family of FP min/max instructions adds 6ce1b4fec54 GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM adds f65f302cc7a [CodeExtractor] Simplify findAllocas, NFC adds 5eb6ba060a2 [CodeExtractor] Fix sinking of allocas with multiple bitcas [...] adds 893f8d719c0 MC: AArch64: Add support for pg_hi21_nc relocation specifier. adds d37edd0c794 ELF: Add support for R_AARCH64_ADR_PREL_PG_HI21_NC relocation. adds 20b45a61156 [NFC][InstCombine] Fixup some tests in just-added "omit mas [...] adds 8728e457065 [TargetLowering] support BlockAddress as "i" inline asm constraint adds 1abaeece719 Options: Reduce code duplication adds de811d1f51c [clang] Preserve names of addrspacecast'ed values. adds ab5a30ac9dc [X86] Add tests for an alternative sequence for _mm_storel_ [...] adds f9cb127ca92 [X86] Add guards to some of the x86 intrinsic tests to skip [...] adds caf6b71ab2e [X86] Change the IR sequence for _mm_storeh_pi and _mm_stor [...] adds 5a6d40be1f3 [X86] Regenerate tests. NFCI. adds 843f198a83d [ORC] Add custom IR compiler configuration to LLJITBuilder [...] adds 58a37754bb1 [LoopRotate + MemorySSA] Keep an <instruction-cloned instru [...] adds 5dd2af52487 [X86] EltsFromConsecutiveLoads - clean up element size calc [...] adds 43d75f97785 Recommit "[CommandLine] Remove OptionCategory and SubComman [...] adds 9fdfb045ae8 [System Model] [TTI] Update cache and prefetch TTI interfaces adds 89ed2e0a0af [scripts] Remove the unused 'shush' script. adds 6d1a64e489e Revert "[clangd] Filter out non-governed files from broadcast" adds f4572249d78 Move three folds for FADD, FSUB and FMUL in the DAG combine [...] new d300a493df3 Revert "[System Model] [TTI] Update cache and prefetch TTI [...] new 1a2c8809248 [TSan] Attempt to fix linker error on Linux/AArch64 new c32742139ed Update libc++ include path detection to use VFS on Linux new 3132968ae96 [GlobalISel][AArch64][NFC] Use getDefIgnoringCopies from Ut [...] new 7c95925b133 [GlobalISel][AArch64] Use getOpcodeDef instead of findMIFromReg new bbfa4cf70b9 Revert "[ELF] Loose a condition for relocation with a symbol" new 6522bedefe3 Revert "[ELF] Update test case due to llvm r365618"
The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +- clang-tools-extra/clangd/ClangdServer.cpp | 24 +- clang-tools-extra/clangd/ClangdServer.h | 5 +- clang-tools-extra/clangd/ClangdUnit.cpp | 11 +- clang-tools-extra/clangd/CodeComplete.cpp | 5 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 2 +- clang-tools-extra/clangd/SemanticHighlighting.cpp | 52 +- clang-tools-extra/clangd/SemanticHighlighting.h | 2 + clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp | 2 +- clang-tools-extra/clangd/indexer/IndexerMain.cpp | 2 +- .../clangd/test/semantic-highlighting.test | 6 + .../clangd/unittests/BackgroundIndexTests.cpp | 19 +- .../clangd/unittests/ClangdUnitTests.cpp | 21 + .../clangd/unittests/SemanticHighlightingTests.cpp | 54 +- clang-tools-extra/clangd/unittests/SyncAPI.cpp | 2 +- clang/docs/ClangStaticAnalyzer.rst | 7 +- .../HardwareAssistedAddressSanitizerDesign.rst | 64 +- clang/docs/analyzer/user-docs.rst | 4 + clang/include/clang/Basic/BuiltinsX86.def | 2 - clang/include/clang/Basic/Sanitizers.h | 2 +- clang/include/clang/Basic/arm_neon.td | 20 +- clang/include/clang/Driver/Driver.h | 3 - .../clang/StaticAnalyzer/Checkers/Checkers.td | 17 +- .../Core/PathSensitive/CheckerContext.h | 11 + clang/include/clang/Tooling/Syntax/Tokens.h | 3 +- clang/lib/AST/ASTContext.cpp | 6 +- clang/lib/Basic/Targets.cpp | 13 - clang/lib/Basic/Targets.h | 4 - clang/lib/Basic/Targets/AArch64.cpp | 10 +- clang/lib/Basic/Targets/AArch64.h | 2 - clang/lib/Basic/Targets/ARM.cpp | 2 - clang/lib/Basic/Targets/OSTargets.cpp | 79 + clang/lib/Basic/Targets/OSTargets.h | 63 +- clang/lib/Basic/Targets/X86.h | 2 - clang/lib/CodeGen/CGBuiltin.cpp | 16 - clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/SanitizerArgs.cpp | 16 +- clang/lib/Driver/ToolChain.cpp | 1 + clang/lib/Driver/ToolChains/Linux.cpp | 13 +- clang/lib/Headers/xmmintrin.h | 12 +- clang/lib/Sema/SemaDeclAttr.cpp | 22 +- clang/lib/Sema/SemaStmtAttr.cpp | 70 +- clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt | 1 + .../StaticAnalyzer/Checkers/CastValueChecker.cpp | 190 ++ clang/lib/Tooling/Syntax/Tokens.cpp | 6 + clang/test/Analysis/cast-value.cpp | 137 + clang/test/Analysis/return-value-guaranteed.cpp | 2 +- .../dcl.dcl/basic.namespace/namespace.udecl/p4.cpp | 1 + clang/test/CodeGen/aarch64-neon-intrinsics.c | 51 + clang/test/CodeGen/aarch64-neon-tbl.c | 18 +- clang/test/CodeGen/avx-builtins.c | 4 + clang/test/CodeGen/bmi-builtins.c | 4 + clang/test/CodeGen/bmi2-builtins.c | 2 + clang/test/CodeGen/builtins-x86.c | 2 - clang/test/CodeGen/calling-conv-ignored.c | 45 + clang/test/CodeGen/popcnt-builtins.c | 2 + clang/test/CodeGen/rdrand-builtins.c | 4 + clang/test/CodeGen/sse-builtins.c | 16 +- clang/test/CodeGen/sse2-builtins.c | 10 + clang/test/CodeGen/sse41-builtins.c | 4 + clang/test/CodeGen/sse42-builtins.c | 2 + clang/test/CodeGen/tbm-builtins.c | 20 + .../CodeGenCUDA/amdgpu-hip-implicit-kernarg.cu | 2 +- clang/test/CodeGenCUDA/builtins-amdgcn.cu | 6 +- .../CodeGenOpenCL/address-spaces-conversions.cl | 2 +- clang/test/CodeGenOpenCL/amdgpu-attrs.cl | 50 +- clang/test/CodeGenOpenCL/pipe_builtin.cl | 4 +- .../CodeGenOpenCLCXX/address-space-deduction.cl | 2 +- clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl | 40 +- clang/test/CodeGenOpenCLCXX/addrspace-operators.cl | 42 +- .../test/CodeGenOpenCLCXX/addrspace-references.cl | 2 +- .../CodeGenOpenCLCXX/template-address-spaces.cl | 12 +- clang/test/Driver/fsanitize-blacklist.c | 1 + clang/test/Driver/fsanitize-coverage.c | 1 + clang/test/Driver/fsanitize.c | 14 + clang/test/Driver/sanitizer-ld.c | 5 + clang/test/Headers/max_align.c | 2 +- clang/test/Modules/check-for-sanitizer-feature.cpp | 2 +- clang/test/SemaCXX/class.cpp | 1 + clang/test/SemaCXX/linkage2.cpp | 2 +- clang/tools/clang-refactor/ClangRefactor.cpp | 4 +- compiler-rt/lib/fuzzer/tests/CMakeLists.txt | 2 + .../fuzzer/tests/FuzzedDataProviderUnittest.cpp | 2 +- compiler-rt/lib/hwasan/hwasan_allocator.cpp | 79 +- compiler-rt/lib/hwasan/hwasan_checks.h | 33 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 26 - compiler-rt/lib/hwasan/hwasan_report.cpp | 122 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 60 +- compiler-rt/lib/tsan/rtl/tsan_platform_mac.cc | 11 +- .../test/hwasan/TestCases/heap-buffer-overflow.c | 37 +- .../test/hwasan/TestCases/random-align-right.c | 35 - compiler-rt/test/hwasan/TestCases/stack-oob.c | 3 +- compiler-rt/test/hwasan/TestCases/tail-magic.c | 16 +- .../test/ubsan/TestCases/Integer/div-zero.cpp | 1 + libcxx/src/CMakeLists.txt | 32 +- lld/COFF/Chunks.cpp | 2 +- lld/COFF/Chunks.h | 11 +- lld/COFF/Driver.cpp | 6 +- lld/COFF/InputFiles.cpp | 2 +- lld/COFF/SymbolTable.cpp | 2 +- lld/COFF/Symbols.h | 6 +- lld/COFF/Writer.cpp | 4 +- lld/ELF/AArch64ErrataFix.cpp | 460 +-- lld/ELF/AArch64ErrataFix.h | 10 +- lld/ELF/Arch/AArch64.cpp | 411 +-- lld/ELF/Arch/AMDGPU.cpp | 62 +- lld/ELF/Arch/ARM.cpp | 438 +-- lld/ELF/Arch/AVR.cpp | 30 +- lld/ELF/Arch/Hexagon.cpp | 186 +- lld/ELF/Arch/MSP430.cpp | 42 +- lld/ELF/Arch/Mips.cpp | 594 ++-- lld/ELF/Arch/MipsArchTree.cpp | 232 +- lld/ELF/Arch/PPC.cpp | 342 +- lld/ELF/Arch/PPC64.cpp | 644 ++-- lld/ELF/Arch/RISCV.cpp | 356 +-- lld/ELF/Arch/SPARCV9.cpp | 92 +- lld/ELF/Arch/X86.cpp | 366 +-- lld/ELF/Arch/X86_64.cpp | 476 +-- lld/ELF/CallGraphSort.cpp | 178 +- lld/ELF/Config.h | 348 +- lld/ELF/DWARF.cpp | 102 +- lld/ELF/DWARF.h | 58 +- lld/ELF/Driver.cpp | 1788 +++++------ lld/ELF/Driver.h | 32 +- lld/ELF/DriverUtils.cpp | 180 +- lld/ELF/EhFrame.cpp | 130 +- lld/ELF/EhFrame.h | 4 +- lld/ELF/ICF.cpp | 324 +- lld/ELF/InputFiles.cpp | 1358 ++++---- lld/ELF/InputFiles.h | 232 +- lld/ELF/InputSection.cpp | 1044 +++--- lld/ELF/InputSection.h | 226 +- lld/ELF/LTO.cpp | 290 +- lld/ELF/LTO.h | 14 +- lld/ELF/LinkerScript.cpp | 978 +++--- lld/ELF/LinkerScript.h | 212 +- lld/ELF/MapFile.cpp | 224 +- lld/ELF/MarkLive.cpp | 242 +- lld/ELF/OutputSections.cpp | 410 +-- lld/ELF/OutputSections.h | 98 +- lld/ELF/Relocations.cpp | 1300 ++++---- lld/ELF/Relocations.h | 50 +- lld/ELF/ScriptLexer.cpp | 214 +- lld/ELF/ScriptLexer.h | 22 +- lld/ELF/ScriptParser.cpp | 1220 +++---- lld/ELF/ScriptParser.h | 8 +- lld/ELF/SymbolTable.cpp | 230 +- lld/ELF/SymbolTable.h | 36 +- lld/ELF/Symbols.cpp | 506 +-- lld/ELF/Symbols.h | 326 +- lld/ELF/SyntheticSections.cpp | 3346 ++++++++++---------- lld/ELF/SyntheticSections.h | 692 ++-- lld/ELF/Target.cpp | 90 +- lld/ELF/Target.h | 210 +- lld/ELF/Thunks.cpp | 808 ++--- lld/ELF/Thunks.h | 24 +- lld/ELF/Writer.cpp | 2274 ++++++------- lld/ELF/Writer.h | 20 +- lld/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s | 2 + lld/test/ELF/aarch64-hi21-nc.s | 8 + lld/test/ELF/linkerscript/fill.test | 5 + lld/test/ELF/linkerscript/sections-padding.s | 11 +- lld/test/wasm/undefined-data.ll | 3 +- lld/test/wasm/undefined.ll | 5 +- lld/wasm/InputChunks.h | 2 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/OutputSections.cpp | 12 +- lld/wasm/OutputSections.h | 8 +- lld/wasm/Relocations.cpp | 33 +- lld/wasm/SymbolTable.cpp | 51 +- lld/wasm/SymbolTable.h | 2 - lld/wasm/SyntheticSections.cpp | 15 +- lld/wasm/SyntheticSections.h | 12 +- lld/wasm/Writer.cpp | 32 +- lldb/CMakeLists.txt | 8 +- lldb/cmake/caches/Apple-lldb-Linux.cmake | 8 + lldb/cmake/caches/Apple-lldb-base.cmake | 6 - lldb/cmake/caches/Apple-lldb-macOS.cmake | 27 +- lldb/cmake/modules/AddLLDB.cmake | 156 +- lldb/cmake/modules/LLDBConfig.cmake | 9 +- lldb/cmake/modules/LLDBFramework.cmake | 18 +- lldb/cmake/modules/LLDBStandalone.cmake | 1 + lldb/docs/use/python-reference.rst | 13 +- lldb/include/lldb/Host/OptionParser.h | 8 +- lldb/lit/Modules/ELF/compressed-sections.yaml | 13 +- .../lit/SymbolFile/DWARF/gnu-style-compression.cpp | 14 + .../android/platform/TestDefaultCacheLineSize.py | 2 +- lldb/packages/Python/lldbsuite/test/decorators.py | 8 + .../Python/lldbsuite/test/make/Android.rules | 3 +- lldb/scripts/shush | 64 - lldb/source/API/CMakeLists.txt | 8 +- lldb/source/Expression/IRExecutionUnit.cpp | 6 +- lldb/source/Host/common/OptionParser.cpp | 8 +- lldb/source/Interpreter/CommandAlias.cpp | 2 + lldb/source/Interpreter/Options.cpp | 102 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 59 +- .../Plugins/Process/Windows/Common/CMakeLists.txt | 1 + .../Process/Windows/Common/ProcessDebugger.cpp | 582 ++++ .../Process/Windows/Common/ProcessDebugger.h | 101 + .../Process/Windows/Common/ProcessWindows.cpp | 473 +-- .../Process/Windows/Common/ProcessWindows.h | 21 +- lldb/tools/argdumper/CMakeLists.txt | 8 +- lldb/tools/darwin-debug/CMakeLists.txt | 8 +- lldb/tools/debugserver/source/CMakeLists.txt | 16 +- llvm/docs/CodeGenerator.rst | 14 - llvm/docs/CommandGuide/llvm-dwarfdump.rst | 2 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 2 +- llvm/docs/Proposals/GitHubMove.rst | 393 +-- llvm/docs/ReleaseNotes.rst | 2 + llvm/docs/Remarks.rst | 305 ++ llvm/docs/index.rst | 3 + llvm/examples/CMakeLists.txt | 1 + llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp | 8 + llvm/examples/LLJITExamples/CMakeLists.txt | 1 + llvm/examples/LLJITExamples/ExampleModules.h | 54 + .../LLJITWithObjectCache/CMakeLists.txt | 11 + .../LLJITWithObjectCache/LLJITWithObjectCache.cpp | 95 + llvm/include/llvm/BinaryFormat/XCOFF.h | 30 + llvm/include/llvm/Bitstream/BitCodes.h | 14 +- .../GlobalISel/LegalizationArtifactCombiner.h | 58 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 4 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 20 +- llvm/include/llvm/CodeGen/TargetLowering.h | 15 +- .../llvm/ExecutionEngine/Orc/CompileUtils.h | 19 +- llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 29 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 84 + llvm/include/llvm/IR/PatternMatch.h | 44 +- llvm/include/llvm/MC/MCAsmInfoXCOFF.h | 25 + llvm/include/llvm/MC/MCContext.h | 23 + llvm/include/llvm/MC/MCObjectFileInfo.h | 1 + llvm/include/llvm/MC/MCSection.h | 2 +- llvm/include/llvm/MC/MCSectionXCOFF.h | 56 + llvm/include/llvm/MC/MCXCOFFObjectWriter.h | 41 + llvm/include/llvm/MC/MCXCOFFStreamer.h | 33 + llvm/include/llvm/Support/CommandLine.h | 57 +- llvm/include/llvm/Support/FileCheck.h | 12 +- llvm/include/llvm/Support/FileSystem.h | 68 +- llvm/include/llvm/Support/MemoryBuffer.h | 4 +- llvm/include/llvm/Support/TargetOpcodes.def | 12 + llvm/include/llvm/Support/TargetRegistry.h | 9 +- llvm/include/llvm/Target/GenericOpcodes.td | 56 + llvm/include/llvm/Transforms/Utils/CodeExtractor.h | 10 + llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | 2 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 8 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 96 + llvm/lib/CodeGen/GlobalISel/Utils.cpp | 37 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 35 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 + llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 79 +- llvm/lib/LTO/Caching.cpp | 9 +- llvm/lib/LTO/LTOModule.cpp | 3 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 7 +- llvm/lib/MC/CMakeLists.txt | 5 + llvm/lib/MC/MCAsmBackend.cpp | 4 + llvm/lib/MC/MCAsmInfoXCOFF.cpp | 18 + llvm/lib/MC/MCContext.cpp | 35 + llvm/lib/MC/MCObjectFileInfo.cpp | 13 +- llvm/lib/MC/MCSectionXCOFF.cpp | 33 + llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp | 16 + llvm/lib/MC/MCXCOFFStreamer.cpp | 59 + llvm/lib/MC/XCOFFObjectWriter.cpp | 94 + llvm/lib/Object/ArchiveWriter.cpp | 13 +- llvm/lib/ProfileData/InstrProfReader.cpp | 4 +- llvm/lib/Remarks/YAMLRemarkSerializer.cpp | 5 +- llvm/lib/Support/CommandLine.cpp | 112 +- llvm/lib/Support/FileCheck.cpp | 18 +- llvm/lib/Support/FileOutputBuffer.cpp | 3 +- llvm/lib/Support/MemoryBuffer.cpp | 87 +- llvm/lib/Support/Unix/Path.inc | 49 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Support/Windows/Path.inc | 82 +- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 71 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 44 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 + llvm/lib/Target/AMDGPU/AMDGPU.td | 4 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 29 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 72 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 81 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 + llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp | 240 ++ llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 172 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td | 2 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 219 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 124 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 11 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 51 + .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 6 + .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 6 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 30 +- llvm/lib/Target/AMDGPU/SIDefines.h | 18 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 26 + llvm/lib/Target/AMDGPU/SIInstrFormats.td | 5 + llvm/lib/Target/AMDGPU/SIInstrInfo.h | 8 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 41 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 15 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 27 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 16 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 341 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 14 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 6 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 10 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 110 + llvm/lib/Target/AMDGPU/VOPInstructions.td | 31 + llvm/lib/Target/ARM/ARMInstrFormats.td | 2 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 8 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 130 +- llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 95 +- .../lib/Target/PowerPC/MCTargetDesc/CMakeLists.txt | 1 + .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 6 + .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 10 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 25 + .../Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 3 + .../PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp | 29 + llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 11 + llvm/lib/Target/X86/X86ISelLowering.cpp | 140 +- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 3 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 +- .../Instrumentation/HWAddressSanitizer.cpp | 98 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 74 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 2 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 186 +- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp | 12 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 25 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 16 +- llvm/lib/XRay/InstrumentationMap.cpp | 3 +- llvm/lib/XRay/Profile.cpp | 3 +- llvm/lib/XRay/Trace.cpp | 3 +- .../Analysis/MemorySSA/loop-rotate-valuemap.ll | 26 + .../irtranslator-fp-min-max-intrinsics.ll | 88 + .../GlobalISel/legalizer-info-validation.mir | 18 + .../AArch64/GlobalISel/opt-fold-compare.mir | 27 + .../AArch64/GlobalISel/opt-shuffle-splat.mir | 22 + .../test/CodeGen/AArch64/hwasan-check-memaccess.ll | 28 +- .../CodeGen/AArch64/inline-asm-blockaddress.ll | 12 + .../artifact-combiner-unmerge-values.mir | 484 +++ .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 30 + .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 19 +- .../AMDGPU/GlobalISel/legalize-build-vector.mir | 120 + .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 22 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 99 +- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 811 ++++- .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 533 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 533 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 213 +- .../CodeGen/AMDGPU/GlobalISel/legalize-load.mir | 30 + .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 11 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 25 +- .../AMDGPU/GlobalISel/regbankselect-load.mir | 488 +++ llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 6 +- llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir | 24 +- .../CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 52 +- llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 6 +- .../CodeGen/ARM/{unsafe-fsub.ll => nnan-fsub.ll} | 2 +- .../MIR/AMDGPU/machine-function-info-no-ir.mir | 29 + .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 40 + .../Mips/GlobalISel/instruction-select/load.mir | 94 + .../Mips/GlobalISel/instruction-select/phi.mir | 348 +- .../Mips/GlobalISel/instruction-select/store.mir | 94 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load.ll | 22 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll | 86 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store.ll | 22 + llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll | 37 + llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll | 174 +- llvm/test/CodeGen/X86/fmul-combines.ll | 8 +- llvm/test/CodeGen/X86/fp-fast.ll | 2 +- llvm/test/CodeGen/X86/load-partial.ll | 57 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 24 +- llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 122 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 16 +- .../HWAddressSanitizer/alloca-with-calls.ll | 3 +- .../Instrumentation/HWAddressSanitizer/alloca.ll | 15 +- .../Instrumentation/HWAddressSanitizer/basic.ll | 52 +- .../HWAddressSanitizer/kernel-alloca.ll | 5 +- .../PoisonChecking/basic-flag-validation.ll | 121 + llvm/test/MC/AArch64/adrp-relocation2.s | 7 + llvm/test/MC/AMDGPU/accvgpr-altnames.s | 10 + llvm/test/MC/AMDGPU/mai-err.s | 50 + llvm/test/MC/AMDGPU/mai.s | 985 ++++++ llvm/test/MC/AMDGPU/xdl-insts-gfx908.s | 46 + llvm/test/MC/ARM/mve-fp-registers.s | 32 + llvm/test/MC/Disassembler/AMDGPU/mai.txt | 979 ++++++ .../MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt | 46 + llvm/test/Object/Inputs/absolute.elf-x86-64 | Bin 711 -> 0 bytes .../relocatable-with-section-address.elf-x86-64 | Bin 1584 -> 0 bytes llvm/test/Object/Inputs/thumb-symbols.elf.arm | Bin 481 -> 0 bytes llvm/test/Object/Inputs/weak.elf-x86-64 | Bin 896 -> 0 bytes llvm/test/Object/nm-trivial-object.test | 200 +- .../CodeExtractor/live_shrink_multiple.ll | 2 +- .../sink-multiple-bitcasts-of-allocas-pr42451.ll | 74 + .../InferFunctionAttrs/dereferenceable.ll | 41 +- llvm/test/Transforms/InstCombine/pow-exp.ll | 49 +- llvm/test/Transforms/InstCombine/pow_fp_int.ll | 15 +- ...redundant-left-shift-input-masking-variant-a.ll | 434 +++ ...redundant-left-shift-input-masking-variant-b.ll | 409 +++ ...redundant-left-shift-input-masking-variant-c.ll | 277 ++ ...redundant-left-shift-input-masking-variant-d.ll | 334 ++ ...redundant-left-shift-input-masking-variant-e.ll | 213 ++ ...redundant-left-shift-input-masking-variant-f.ll | 214 ++ ...g.ll => redundant-right-shift-input-masking.ll} | 0 .../nontrivial-unswitch-redundant-switch.ll | 24 + .../llvm-objdump/X86/warn-missing-disasm-func.test | 12 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 6 +- llvm/tools/llvm-xray/xray-fdr-dump.cpp | 11 +- llvm/unittests/IR/PatternMatch.cpp | 387 ++- llvm/unittests/ProfileData/InstrProfTest.cpp | 21 + llvm/unittests/Support/CommandLineTest.cpp | 70 +- llvm/unittests/Support/FileCheckTest.cpp | 80 +- llvm/unittests/Support/MemoryBufferTest.cpp | 10 +- llvm/unittests/Support/Path.cpp | 8 +- llvm/unittests/Support/ReplaceFileTest.cpp | 8 +- .../gn/secondary/clang-tools-extra/clangd/BUILD.gn | 1 + .../clang/lib/StaticAnalyzer/Checkers/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn | 5 + .../gn/secondary/llvm/lib/Target/BPF/BUILD.gn | 2 +- .../llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn | 1 + .../llvm/lib/Transforms/Instrumentation/BUILD.gn | 1 + openmp/runtime/src/kmp.h | 2 +- 442 files changed, 28606 insertions(+), 15708 deletions(-) create mode 100644 clang/docs/analyzer/user-docs.rst create mode 100644 clang/lib/StaticAnalyzer/Checkers/CastValueChecker.cpp create mode 100644 clang/test/Analysis/cast-value.cpp create mode 100644 clang/test/CodeGen/calling-conv-ignored.c delete mode 100644 compiler-rt/test/hwasan/TestCases/random-align-right.c create mode 100644 lld/test/ELF/aarch64-hi21-nc.s create mode 100644 lldb/cmake/caches/Apple-lldb-Linux.cmake create mode 100644 lldb/lit/SymbolFile/DWARF/gnu-style-compression.cpp delete mode 100755 lldb/scripts/shush create mode 100644 lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp create mode 100644 lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.h create mode 100644 llvm/docs/Remarks.rst create mode 100644 llvm/examples/LLJITExamples/CMakeLists.txt create mode 100644 llvm/examples/LLJITExamples/ExampleModules.h create mode 100644 llvm/examples/LLJITExamples/LLJITWithObjectCache/CMakeLists.txt create mode 100644 llvm/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjec [...] create mode 100644 llvm/include/llvm/MC/MCAsmInfoXCOFF.h create mode 100644 llvm/include/llvm/MC/MCSectionXCOFF.h create mode 100644 llvm/include/llvm/MC/MCXCOFFObjectWriter.h create mode 100644 llvm/include/llvm/MC/MCXCOFFStreamer.h create mode 100644 llvm/lib/MC/MCAsmInfoXCOFF.cpp create mode 100644 llvm/lib/MC/MCSectionXCOFF.cpp create mode 100644 llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp create mode 100644 llvm/lib/MC/MCXCOFFStreamer.cpp create mode 100644 llvm/lib/MC/XCOFFObjectWriter.cpp create mode 100644 llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp create mode 100644 llvm/test/Analysis/MemorySSA/loop-rotate-valuemap.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-in [...] create mode 100644 llvm/test/CodeGen/AArch64/inline-asm-blockaddress.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-v [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir rename llvm/test/CodeGen/ARM/{unsafe-fsub.ll => nnan-fsub.ll} (76%) create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll create mode 100644 llvm/test/MC/AArch64/adrp-relocation2.s create mode 100644 llvm/test/MC/AMDGPU/accvgpr-altnames.s create mode 100644 llvm/test/MC/AMDGPU/mai-err.s create mode 100644 llvm/test/MC/AMDGPU/mai.s create mode 100644 llvm/test/MC/AMDGPU/xdl-insts-gfx908.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/mai.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt delete mode 100644 llvm/test/Object/Inputs/absolute.elf-x86-64 delete mode 100644 llvm/test/Object/Inputs/relocatable-with-section-address.elf-x86-64 delete mode 100644 llvm/test/Object/Inputs/thumb-symbols.elf.arm delete mode 100644 llvm/test/Object/Inputs/weak.elf-x86-64 create mode 100644 llvm/test/Transforms/HotColdSplit/sink-multiple-bitcasts-of-all [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] rename llvm/test/Transforms/InstCombine/{redundant-shift-input-masking.ll => redun [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-red [...]