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from 3f37c6f47cd testsuite/gfortran.dg/unsigned_22.f90: Add missing close wi [...] new a1e6bb6fb12 RISC-V: Add testcases for form 2 of signed vector SAT_ADD
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Summary of changes: .../riscv/rvv/autovec/binop/vec_sat_s_add-5.c | 9 ++++++++ .../riscv/rvv/autovec/binop/vec_sat_s_add-6.c | 9 ++++++++ .../riscv/rvv/autovec/binop/vec_sat_s_add-7.c | 9 ++++++++ .../riscv/rvv/autovec/binop/vec_sat_s_add-8.c | 9 ++++++++ ...vec_sat_s_add-run-1.c => vec_sat_s_add-run-5.c} | 4 ++-- ...vec_sat_s_add-run-2.c => vec_sat_s_add-run-6.c} | 4 ++-- ...vec_sat_s_add-run-3.c => vec_sat_s_add-run-7.c} | 4 ++-- ...vec_sat_s_add-run-4.c => vec_sat_s_add-run-8.c} | 4 ++-- .../gcc.target/riscv/rvv/autovec/vec_sat_arith.h | 24 ++++++++++++++++++++++ 9 files changed, 68 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-8.c copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_s_add-run-1.c => ve [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_s_add-run-2.c => ve [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_s_add-run-3.c => ve [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_s_add-run-4.c => ve [...]