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from 9d00f4f98a0 [X86] Disabling PLT in Regcall CC Functions new 47d5da39f56 [ARM] ACLE Chapter 9 intrinsics new 0e40641a775 [X86][AVX-512] Allow EVEX encoded instruction selection whe [...]
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Summary of changes: include/llvm/IR/IntrinsicsARM.td | 186 ++++++++++++- lib/Target/ARM/ARMISelLowering.cpp | 38 +++ lib/Target/ARM/ARMISelLowering.h | 4 + lib/Target/ARM/ARMInstrInfo.td | 215 ++++++++++----- lib/Target/ARM/ARMInstrThumb2.td | 220 +++++++++------ lib/Target/X86/X86InstrSSE.td | 4 +- test/CodeGen/ARM/acle-intrinsics-v5.ll | 110 ++++++++ test/CodeGen/ARM/acle-intrinsics.ll | 481 +++++++++++++++++++++++++++++++++ test/CodeGen/ARM/sat-arith.ll | 63 ----- test/CodeGen/X86/avx-isa-check.ll | 5 + test/CodeGen/X86/avx512vl-arith.ll | 2 +- 11 files changed, 1122 insertions(+), 206 deletions(-) create mode 100644 test/CodeGen/ARM/acle-intrinsics-v5.ll create mode 100644 test/CodeGen/ARM/acle-intrinsics.ll delete mode 100644 test/CodeGen/ARM/sat-arith.ll