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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from 7e5a187de31 CrashReason: Add MTE tag check faults to the list of crash [...] adds fddb4174495 [llvm-elfabi] Add flag to preserve timestamp when output is [...] adds 21314940c48 Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...] adds 92207b2ccea [gn build] Port 21314940c48 adds 2c8f5bd5394 [MLIR] Make ComplexType buildable if its element type is buildable adds 58ce477676c Fix DRR pattern when attributes and operands are interleave [...] adds 16c8f6e9134 Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuild [...] adds a373eacb567 [gn build] Port 16c8f6e9134 adds 480936e741d Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...] adds 57b8afda10b [gn build] Port 480936e741d adds 6da00336248 [RISCV] Define vsext/vzext intrinsics. adds d034a94e7b3 Revert "[llvm-elfabi] Add flag to preserve timestamp when o [...] adds 9a5261efd75 [lsan] Parse suppressions just before leak reporting adds 9b25b8068df [NFC][lsan] Extract PrintResults function adds 8a1f1a100cc [mlir][python] Aggressively avoid name collisions in genera [...] adds 5efc71e119d [ORC] Move Orc RPC code into Shared, rename some RPC types. adds f904d50c29f [PowerPC] Remaining KnownBits should be constant when perfo [...] adds e3e25cfb44b [PowerPC] Add mir test to show effect of `optimizeCompareIn [...] adds 096b02ebbff [RISCV] Add intrinsics for vcompress instruction adds f76e83bfbba [Analysis] Use llvm::append_range (NFC) adds 16d20e2554e [Transforms/Utils] Construct SmallVector with iterator rang [...] adds 329b887286a [Analysis, IR] Use *Map::lookup (NFC) adds 11f41cd4451 [mlir][python] Install generated dialect sources. adds a1d05892668 [llvm-elfabi] Add flag to preserve timestamp when output is [...] adds 18c3e795f7c [Verifier] Remove declaration of method that was removed 8. [...] adds bf286b00e9e [X86][test] Improve global address offset folding tests adds 981a0bd8581 [X86] Add x86_amx type for intel AMX. adds ff6fd385524 [libc] Add implementations of rounding functions which depe [...] adds 109e0736620 [ConstraintElimination] Add tests for select form and/or (NFC) adds 71867ed5e66 [IROutliner] Adding support for swift errors adds eeb99c2ac26 Revert "[IROutliner] Adding support for swift errors" adds 30feb93036e [IROutliner] Adding support for swift errors in the IROutliner adds 2820a2ca3a0 Move -fno-semantic-interposition dso_local logic from Targe [...] adds 6e9755bb80c [X86] Refactor AMX test case, remove unnecessary code. adds abb4cd3e749 [mlir][Python] Initial Affine Map Python Bindings. adds bfedd5d2b65 [ConstraintElimination] Add support for select form of and/or adds e6e64046002 [SimplifyCFG] Add tests for select form and/or for creating [...] adds 3f0b637d6b3 [libc++] [docs] Mark contract-related papers as removed fro [...] adds e47e313d647 [mlir] Fix a typo MemRefType -> UnrankedMemRefType adds 9b29610228c Use unary CreateShuffleVector if possible adds 420d046d6bd clang-format, address warnings adds 16c2067cf21 [X86][AMX] Fix compilation warning introduced by 981a0bd8. adds c6035a7bdf2 Remove functions from *-inseltpoison.ll tests if unnecessary adds e90ea76380d [IR] remove 'NoNan' param when creating FP reductions adds 2016f2c8a76 Fixes warning 'enumeration value not handled in switch'. adds 3567908d8ce [SLP] add fadd reduction test to show broken FMF propagation; NFC adds ed507bc4d5e [mlir] NFC - Fix SubViewOp printing adds 9b5a3d67b49 [mlir] Fix indexing of first offset operand in ops that imp [...] adds b0d6bebe90d [ELF] Drop '>>> defined in ' for locations of linker synthe [...] adds 9c0c123b0b4 [CMake][tsan] Remove --sysroot=. adds fe431103b63 [IROutliner] Adding option to enable outlining from linkonc [...] adds 70de7e0d9a9 [compiler-rt] FuzzedDataProvider: Add PickValueInArray for [...] adds 88cadb894ce [PowerPC][test] Add explicit dso_local to definitions in EL [...] adds 453b6aadcef [mlir] Add option to read reproducer options from file adds 277ebe46c66 Fix `LLVM_ENABLE_MODULES=On` build adds 51a292d9945 [gn build] Switch copy_bundle_data from pax to cpio adds 294a196b048 [update_llc_test_checks] Support .Lfunc$local for x86 -relo [...] adds 5ced712e985 [LoopVectorizer] add test to show wrong FMF propagation; NFC adds 8ca60db40bd [LoopUtils] reduce FMF and min/max complexity when forming [...] adds 7181df1e499 [update_llc_test_checks] Support Windows .seh_proc for x86 adds 253dc16f9eb [RISCV] Cleanup some V intrinsic names used in tests to mat [...] adds c45f765c0d4 [SimplifyCFG] Teach SimplifyBranchOnICmpChain() to preserve [...] adds a17025aa61b [SimplifyCFG] Teach switchToSelect() to preserve DomTree adds 7f221c9196d [SimplifyCFG] Teach SwitchToLookupTable() to preserve DomTree adds 51879a52564 [LoopIdiom] 'left-shift until bittest': don't forget to che [...] adds cc07d525114 [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests. adds f07b95e8bcd [PowerPC] Add addtional test that retroactively catches PR47259 adds 6b316febb43 [OpenMP] libomp: Handle implicit conversion warnings new 8c1f5538445 Avoid using /dev/null in test new 871de4a479c [X86][test] Add explicit dso_local to definitions in ELF st [...] new e0f70ee01c6 [test] Fix linux-preemption.ll
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/lib/CodeGen/CGBuiltin.cpp | 23 +- clang/lib/CodeGen/CGExpr.cpp | 16 +- clang/lib/CodeGen/CGExprScalar.cpp | 6 +- clang/lib/CodeGen/CodeGenModule.cpp | 13 +- clang/test/CodeGen/X86/amx_api.c | 13 +- clang/test/CodeGen/X86/avx-builtins.c | 34 +- clang/test/CodeGen/X86/avx2-builtins.c | 22 +- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c | 192 ++-- clang/test/CodeGen/X86/avx512bw-builtins.c | 12 +- clang/test/CodeGen/X86/avx512dq-builtins.c | 24 +- clang/test/CodeGen/X86/avx512f-builtins.c | 56 +- .../CodeGen/X86/avx512vl-builtins-constrained.c | 8 +- clang/test/CodeGen/X86/avx512vl-builtins.c | 52 +- clang/test/CodeGen/X86/avx512vlbw-builtins.c | 16 +- clang/test/CodeGen/X86/avx512vldq-builtins.c | 12 +- clang/test/CodeGen/X86/f16c-builtins-constrained.c | 4 +- clang/test/CodeGen/X86/f16c-builtins.c | 4 +- clang/test/CodeGen/X86/sse2-builtins.c | 6 +- clang/test/CodeGen/arm-mve-intrinsics/vmovl.c | 16 +- clang/test/CodeGen/arm-mve-intrinsics/vmovn.c | 16 +- clang/test/CodeGen/arm-mve-intrinsics/vrev.c | 30 +- clang/test/CodeGen/arm64-abi-vector.c | 8 +- clang/test/CodeGen/semantic-interposition-no.c | 23 + clang/test/CodeGenOpenCL/as_type.cl | 14 +- clang/test/CodeGenOpenCL/partial_initializer.cl | 2 +- clang/test/CodeGenOpenCL/preserve_vec3.cl | 4 +- clang/test/CodeGenOpenCL/vectorLoadStore.cl | 2 +- clang/test/CodeGenOpenCL/vector_literals_valid.cl | 18 +- compiler-rt/include/fuzzer/FuzzedDataProvider.h | 9 + .../fuzzer/tests/FuzzedDataProviderUnittest.cpp | 14 + compiler-rt/lib/lsan/lsan_common.cpp | 111 +- compiler-rt/lib/tsan/CMakeLists.txt | 15 - libc/config/linux/x86_64/entrypoints.txt | 9 + libc/spec/stdc.td | 12 + libc/src/math/CMakeLists.txt | 108 ++ libc/src/math/llrint.cpp | 19 + libc/src/math/llrint.h | 18 + libc/src/math/llrintf.cpp | 19 + libc/src/math/llrintf.h | 18 + libc/src/math/llrintl.cpp | 19 + libc/src/math/llrintl.h | 18 + libc/src/math/lrint.cpp | 18 + libc/src/math/lrint.h | 18 + libc/src/math/lrintf.cpp | 18 + libc/src/math/lrintf.h | 18 + libc/src/math/lrintl.cpp | 19 + libc/src/math/lrintl.h | 18 + libc/src/math/rint.cpp | 18 + libc/src/math/rint.h | 18 + libc/src/math/rintf.cpp | 18 + libc/src/math/rintf.h | 18 + libc/src/math/rintl.cpp | 18 + libc/src/math/rintl.h | 18 + libc/test/src/math/CMakeLists.txt | 135 +++ libc/test/src/math/RIntTest.h | 138 +++ libc/test/src/math/RemQuoTest.h | 2 +- libc/test/src/math/RoundToIntegerTest.h | 177 ++- libc/test/src/math/llrint_test.cpp | 13 + libc/test/src/math/llrintf_test.cpp | 13 + libc/test/src/math/llrintl_test.cpp | 14 + libc/test/src/math/lrint_test.cpp | 13 + libc/test/src/math/lrintf_test.cpp | 13 + libc/test/src/math/lrintl_test.cpp | 13 + libc/test/src/math/rint_test.cpp | 13 + libc/test/src/math/rintf_test.cpp | 13 + libc/test/src/math/rintl_test.cpp | 13 + libc/utils/FPUtil/NearestIntegerOperations.h | 118 +- libc/utils/MPFRWrapper/MPFRUtils.cpp | 48 + libc/utils/MPFRWrapper/MPFRUtils.h | 5 + libcxx/docs/Cxx2aStatusPaperStatus.csv | 4 +- lld/ELF/Relocations.cpp | 10 +- lld/test/ELF/x86-64-gotpc-err.s | 21 +- llvm/include/llvm-c/Core.h | 7 + llvm/include/llvm/Analysis/DDG.h | 2 +- llvm/include/llvm/Analysis/IntervalIterator.h | 2 +- llvm/include/llvm/Analysis/RegionInfoImpl.h | 3 +- llvm/include/llvm/Analysis/VectorUtils.h | 10 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 3 +- llvm/include/llvm/CodeGen/CodeGenPassBuilder.h | 1145 +++++++++++++++++++ llvm/include/llvm/CodeGen/MachinePassRegistry.def | 197 ++++ llvm/include/llvm/CodeGen/TargetPassConfig.h | 4 + llvm/include/llvm/CodeGen/ValueTypes.td | 1 + .../Orc/OrcRPCTargetProcessControl.h | 4 +- .../ExecutionEngine/Orc/OrcRemoteTargetClient.h | 9 +- .../ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h | 282 ++--- .../ExecutionEngine/Orc/OrcRemoteTargetServer.h | 5 +- .../Orc/{RPC => Shared}/FDRawByteChannel.h | 14 +- .../ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h | 250 ++--- .../Orc/{RPC => Shared}/RawByteChannel.h | 25 +- .../RPCSerialization.h => Shared/Serialization.h} | 262 ++--- .../Orc/TargetProcess/OrcRPCTPCServer.h | 86 +- llvm/include/llvm/IR/DataLayout.h | 2 + llvm/include/llvm/IR/IRBuilder.h | 4 +- llvm/include/llvm/IR/Intrinsics.h | 3 +- llvm/include/llvm/IR/Intrinsics.td | 2 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 40 +- llvm/include/llvm/IR/IntrinsicsX86.td | 32 +- llvm/include/llvm/IR/Type.h | 12 +- llvm/include/llvm/InterfaceStub/ELFObjHandler.h | 5 +- llvm/include/llvm/Support/MachineValueType.h | 4 +- llvm/include/llvm/Target/CGPassBuilderOption.h | 65 ++ llvm/include/llvm/Target/TargetMachine.h | 29 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 4 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 15 +- llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/AliasSetTracker.cpp | 2 +- llvm/lib/Analysis/ConstantFolding.cpp | 15 +- llvm/lib/Analysis/DDG.cpp | 2 +- llvm/lib/Analysis/DependenceGraphBuilder.cpp | 3 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 12 +- llvm/lib/Analysis/LazyValueInfo.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 4 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 4 +- llvm/lib/Analysis/VectorUtils.cpp | 3 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/CMakeLists.txt | 1 + llvm/lib/CodeGen/CodeGenPassBuilder.cpp | 25 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 3 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 3 +- llvm/lib/CodeGen/LLVMTargetMachine.cpp | 35 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 161 ++- llvm/lib/CodeGen/ValueTypes.cpp | 3 + llvm/lib/ExecutionEngine/Orc/Shared/RPCError.cpp | 14 +- llvm/lib/IR/AsmWriter.cpp | 1 + llvm/lib/IR/AutoUpgrade.cpp | 21 +- llvm/lib/IR/ConstantFold.cpp | 2 +- llvm/lib/IR/Core.cpp | 8 + llvm/lib/IR/DataLayout.cpp | 2 + llvm/lib/IR/Function.cpp | 9 +- llvm/lib/IR/IRBuilder.cpp | 20 +- llvm/lib/IR/LLVMContextImpl.cpp | 1 + llvm/lib/IR/LLVMContextImpl.h | 2 +- llvm/lib/IR/PassRegistry.cpp | 6 +- llvm/lib/IR/SafepointIRVerifier.cpp | 3 +- llvm/lib/IR/Type.cpp | 15 + llvm/lib/IR/Verifier.cpp | 2 - llvm/lib/InterfaceStub/ELFObjHandler.cpp | 39 +- .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 3 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 3 +- .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 1 + llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 216 +++- llvm/lib/Target/TargetMachine.cpp | 8 - llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +- llvm/lib/Target/X86/X86InterleavedAccess.cpp | 3 +- llvm/lib/Target/X86/X86LowerAMXType.cpp | 455 ++++---- llvm/lib/Target/X86/X86RegisterInfo.td | 2 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 41 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 18 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 3 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 4 + .../Transforms/Instrumentation/MemorySanitizer.cpp | 11 +- .../Transforms/Scalar/ConstraintElimination.cpp | 25 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 4 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 10 +- llvm/lib/Transforms/Scalar/SROA.cpp | 19 +- llvm/lib/Transforms/Utils/Local.cpp | 4 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 64 +- llvm/lib/Transforms/Utils/LowerInvoke.cpp | 2 +- .../Transforms/Utils/PromoteMemoryToRegister.cpp | 2 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 6 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 51 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 5 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 93 +- .../AArch64/aarch64-interleaved-ld-combine.ll | 42 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 16 +- .../AMDGPU/rewrite-out-arguments-address-space.ll | 2 +- llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll | 24 +- .../Generic/expand-experimental-reductions.ll | 34 +- llvm/test/CodeGen/PowerPC/alias.ll | 10 +- llvm/test/CodeGen/PowerPC/atomics-constant.ll | 2 +- llvm/test/CodeGen/PowerPC/dsolocal-pic.ll | 124 +++ llvm/test/CodeGen/PowerPC/dsolocal-static.ll | 123 +++ llvm/test/CodeGen/PowerPC/elf-common.ll | 17 +- llvm/test/CodeGen/PowerPC/f128-arith.ll | 48 +- llvm/test/CodeGen/PowerPC/f128-compare.ll | 24 +- llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 40 +- llvm/test/CodeGen/PowerPC/float-load-store-pair.ll | 36 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 22 +- llvm/test/CodeGen/PowerPC/func-addr.ll | 2 +- llvm/test/CodeGen/PowerPC/macro-fusion.ll | 2 +- llvm/test/CodeGen/PowerPC/mcm-11.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-3.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-obj-2.ll | 6 +- llvm/test/CodeGen/PowerPC/mcm-obj.ll | 40 +- llvm/test/CodeGen/PowerPC/mma-acc-memops.ll | 40 +- llvm/test/CodeGen/PowerPC/p10-setbc-ri.ll | 125 +-- llvm/test/CodeGen/PowerPC/p10-setbc-rr.ll | 213 ++-- llvm/test/CodeGen/PowerPC/p10-setbcr-ri.ll | 44 +- llvm/test/CodeGen/PowerPC/p10-setbcr-rr.ll | 247 ++--- llvm/test/CodeGen/PowerPC/p10-setnbc-ri.ll | 203 ++-- llvm/test/CodeGen/PowerPC/p10-setnbc-rr.ll | 309 +++--- llvm/test/CodeGen/PowerPC/p10-setnbcr-ri.ll | 80 +- llvm/test/CodeGen/PowerPC/p10-setnbcr-rr.ll | 336 +++--- llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll | 14 +- llvm/test/CodeGen/PowerPC/peephole-align.ll | 30 +- llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir | 44 + llvm/test/CodeGen/PowerPC/pie.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-calls.ll | 12 +- llvm/test/CodeGen/PowerPC/ppc64-nonfunc-calls.ll | 10 +- .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll | 50 +- llvm/test/CodeGen/PowerPC/pr32140.ll | 41 +- llvm/test/CodeGen/PowerPC/pr48388.ll | 41 + llvm/test/CodeGen/PowerPC/preemption.ll | 302 ----- llvm/test/CodeGen/PowerPC/sched-addi.ll | 4 +- .../PowerPC/tailcall-speculatable-callee.ll | 2 +- llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll | 4 +- llvm/test/CodeGen/PowerPC/tailcall1-64.ll | 4 +- llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesieqsc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqsi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqsll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqss.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequs.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesigesc.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigesi.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigesll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesigess.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigeuc.ll | 110 +- llvm/test/CodeGen/PowerPC/testComparesigeui.ll | 110 +- llvm/test/CodeGen/PowerPC/testComparesigeull.ll | 110 +- llvm/test/CodeGen/PowerPC/testComparesigeus.ll | 110 +- llvm/test/CodeGen/PowerPC/testComparesilesc.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesilesi.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesilesll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiless.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesileuc.ll | 119 +- llvm/test/CodeGen/PowerPC/testComparesileui.ll | 119 +- llvm/test/CodeGen/PowerPC/testComparesileull.ll | 116 +- llvm/test/CodeGen/PowerPC/testComparesileus.ll | 119 +- llvm/test/CodeGen/PowerPC/testComparesiltsc.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltsi.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltsll.ll | 101 +- llvm/test/CodeGen/PowerPC/testComparesiltss.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltuc.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesiltui.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesiltus.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesinesc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesinesi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesinesll.ll | 42 +- llvm/test/CodeGen/PowerPC/testComparesiness.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineuc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineui.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineull.ll | 42 +- llvm/test/CodeGen/PowerPC/testComparesineus.ll | 38 +- llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqss.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequc.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequi.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequs.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllgesc.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgesi.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgesll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllgess.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 102 +- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 102 +- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 102 +- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 102 +- llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 16 +- llvm/test/CodeGen/PowerPC/testCompareslllesi.ll | 16 +- llvm/test/CodeGen/PowerPC/testCompareslllesll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllless.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 111 +- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 111 +- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 108 +- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 111 +- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 95 +- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 52 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 52 +- llvm/test/CodeGen/PowerPC/testComparesllnesll.ll | 34 +- llvm/test/CodeGen/PowerPC/testComparesllneull.ll | 34 +- llvm/test/CodeGen/PowerPC/tls.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 650 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 830 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 210 ++-- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 210 ++-- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 482 ++++++-- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 288 ++--- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 442 +++++++- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 216 ++-- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 482 ++++++-- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 288 ++--- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 482 ++++++-- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 288 ++--- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 442 +++++++- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 216 ++-- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 180 +-- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 220 ++-- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 216 ++-- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 220 ++-- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 144 +-- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 176 +-- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 144 +-- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 176 +-- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 252 ++--- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 308 +++--- llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 664 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 1162 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 664 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 1162 ++++++++++++++++++++ llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll | 4 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 6 +- llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll | 8 +- llvm/test/CodeGen/X86/AMX/amx-across-func.ll | 28 +- llvm/test/CodeGen/X86/AMX/amx-config.ll | 40 +- llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll | 25 +- llvm/test/CodeGen/X86/AMX/amx-spill.ll | 56 +- llvm/test/CodeGen/X86/AMX/amx-type.ll | 235 ++-- llvm/test/CodeGen/X86/GlobalISel/GV.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir | 6 +- llvm/test/CodeGen/X86/abi-isel.ll | 658 +++++------ llvm/test/CodeGen/X86/atomic-fp.ll | 22 +- llvm/test/CodeGen/X86/avx-vzeroupper.ll | 4 +- llvm/test/CodeGen/X86/avx2-gather.ll | 2 +- .../CodeGen/X86/avx512-gather-scatter-intrin.ll | 68 +- llvm/test/CodeGen/X86/avx512-regcall-Mask.ll | 38 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 52 +- llvm/test/CodeGen/X86/backpropmask.ll | 12 +- llvm/test/CodeGen/X86/break-false-dep.ll | 34 +- llvm/test/CodeGen/X86/bswap.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll | 6 +- llvm/test/CodeGen/X86/cast-vsel.ll | 14 +- llvm/test/CodeGen/X86/cmov-double.ll | 8 +- llvm/test/CodeGen/X86/cmovcmov.ll | 12 +- llvm/test/CodeGen/X86/cmp.ll | 46 +- llvm/test/CodeGen/X86/copy-eflags.ll | 18 +- llvm/test/CodeGen/X86/critical-edge-split-2.ll | 4 +- llvm/test/CodeGen/X86/dbg-changes-codegen.ll | 10 +- llvm/test/CodeGen/X86/emutls-pie.ll | 12 +- llvm/test/CodeGen/X86/emutls.ll | 36 +- llvm/test/CodeGen/X86/fmf-flags.ll | 14 +- llvm/test/CodeGen/X86/fold-add-pcrel.ll | 41 - llvm/test/CodeGen/X86/fold-add.ll | 125 ++- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 28 +- llvm/test/CodeGen/X86/fp128-cast.ll | 72 +- llvm/test/CodeGen/X86/fp128-g.ll | 2 +- llvm/test/CodeGen/X86/fp128-i128.ll | 10 +- llvm/test/CodeGen/X86/fp128-libcalls.ll | 42 +- llvm/test/CodeGen/X86/fp128-load.ll | 2 +- llvm/test/CodeGen/X86/fp128-store.ll | 4 +- llvm/test/CodeGen/X86/ga-offset.ll | 6 +- llvm/test/CodeGen/X86/global-access-pie.ll | 22 +- llvm/test/CodeGen/X86/hoist-spill-lpad.ll | 4 +- llvm/test/CodeGen/X86/immediate_merging.ll | 28 +- llvm/test/CodeGen/X86/inline-asm-h.ll | 4 +- llvm/test/CodeGen/X86/lea-recursion.ll | 6 +- llvm/test/CodeGen/X86/load-partial.ll | 6 +- llvm/test/CodeGen/X86/lsr-sort.ll | 4 +- llvm/test/CodeGen/X86/mempcpy.ll | 4 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 74 +- llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll | 4 +- llvm/test/CodeGen/X86/musttail-tailcc.ll | 8 +- llvm/test/CodeGen/X86/narrow_op-1.ll | 6 +- llvm/test/CodeGen/X86/peephole-fold-movsd.ll | 4 +- llvm/test/CodeGen/X86/pie.ll | 8 +- llvm/test/CodeGen/X86/pr22774.ll | 6 +- llvm/test/CodeGen/X86/pr31956.ll | 4 +- llvm/test/CodeGen/X86/pr32282.ll | 10 +- llvm/test/CodeGen/X86/pr33290.ll | 8 +- llvm/test/CodeGen/X86/pr34629.ll | 6 +- llvm/test/CodeGen/X86/pr34634.ll | 10 +- llvm/test/CodeGen/X86/pr35761.ll | 8 +- llvm/test/CodeGen/X86/pr35763.ll | 6 +- llvm/test/CodeGen/X86/pr35765.ll | 10 +- llvm/test/CodeGen/X86/pr36312.ll | 8 +- llvm/test/CodeGen/X86/pr37826.ll | 10 +- llvm/test/CodeGen/X86/pr38217.ll | 4 +- llvm/test/CodeGen/X86/pr38803.ll | 8 +- llvm/test/CodeGen/X86/pr38865.ll | 4 +- llvm/test/CodeGen/X86/pr43866.ll | 4 +- llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll | 20 +- llvm/test/CodeGen/X86/sad.ll | 28 +- .../CodeGen/X86/semantic-interposition-comdat.ll | 28 - .../X86/semantic-interposition-infer-dsolocal.ll | 46 - llvm/test/CodeGen/X86/shift-combine.ll | 24 +- llvm/test/CodeGen/X86/shrink-compare-pgso.ll | 28 +- llvm/test/CodeGen/X86/shrink-compare.ll | 28 +- llvm/test/CodeGen/X86/sibcall.ll | 36 +- ...peculative-execution-side-effect-suppression.ll | 8 +- .../X86/speculative-load-hardening-indirect.ll | 20 +- llvm/test/CodeGen/X86/splat-for-size.ll | 2 +- llvm/test/CodeGen/X86/stores-merging.ll | 56 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 20 +- llvm/test/CodeGen/X86/swift-return.ll | 10 +- llvm/test/CodeGen/X86/tail-opts.ll | 30 +- llvm/test/CodeGen/X86/tailcall-disable.ll | 6 +- llvm/test/CodeGen/X86/tailcall-tailcc.ll | 12 +- llvm/test/CodeGen/X86/tailcall.ll | 12 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 6 +- llvm/test/CodeGen/X86/tls-pie.ll | 10 +- llvm/test/CodeGen/X86/tls.ll | 42 +- llvm/test/CodeGen/X86/trunc-and.ll | 4 +- llvm/test/CodeGen/X86/undef-label.ll | 4 +- llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll | 6 +- llvm/test/CodeGen/X86/widen_load-1.ll | 4 +- llvm/test/CodeGen/X86/x86-64-intrcc.ll | 6 +- llvm/test/CodeGen/X86/xor-select-i1-combine.ll | 8 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/Instrumentation/MemorySanitizer/clmul.ll | 16 +- llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 10 + llvm/test/Transforms/ConstraintElimination/and.ll | 67 ++ llvm/test/Transforms/ConstraintElimination/or.ll | 61 + llvm/test/Transforms/IROutliner/outlining-odr.ll | 70 ++ .../Transforms/IROutliner/outlining-swift-error.ll | 47 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 28 +- .../AMDGPU/amdgcn-demanded-vector-elts.ll | 278 ++--- .../Transforms/InstCombine/assume-inseltpoison.ll | 633 +---------- .../Transforms/InstCombine/bswap-inseltpoison.ll | 784 +------------ .../InstCombine/canonicalize-vector-insert.ll | 16 +- .../Transforms/InstCombine/fmul-inseltpoison.ll | 1129 +------------------ .../AArch64/interleaved-accesses-inseltpoison.ll | 4 +- .../AArch64/interleaved-accesses.ll | 100 +- .../ARM/interleaved-accesses-inseltpoison.ll | 8 +- .../InterleavedAccess/ARM/interleaved-accesses.ll | 8 +- .../X86/interleavedStore-inseltpoison.ll | 12 +- .../InterleavedAccess/X86/interleavedStore.ll | 12 +- .../LoopIdiom/X86/left-shift-until-bittest.ll | 81 ++ .../Transforms/LoopVectorize/AMDGPU/packed-math.ll | 4 +- llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll | 6 +- .../LoopVectorize/PowerPC/widened-massv-call.ll | 4 +- .../PowerPC/widened-massv-vfabi-attr.ll | 4 +- .../LoopVectorize/X86/reduction-fastmath.ll | 89 ++ .../LoopVectorize/float-minmax-instruction-flag.ll | 4 +- .../LoopVectorize/interleaved-accesses.ll | 6 +- .../LoopVectorize/invariant-store-vectorization.ll | 4 +- llvm/test/Transforms/LoopVectorize/reduction.ll | 36 +- .../Transforms/LoopVectorize/select-reduction.ll | 4 +- .../bigger-expressions-double.ll | 144 +-- .../Transforms/LowerMatrixIntrinsics/const-gep.ll | 24 +- .../LowerMatrixIntrinsics/load-align-volatile.ll | 2 +- .../multiply-add-sub-double-row-major.ll | 32 +- .../multiply-double-contraction-fmf.ll | 32 +- .../multiply-double-contraction.ll | 32 +- .../multiply-double-row-major.ll | 120 +- .../LowerMatrixIntrinsics/multiply-double.ll | 120 +- .../multiply-float-contraction-fmf.ll | 32 +- .../multiply-float-contraction.ll | 32 +- .../LowerMatrixIntrinsics/multiply-float.ll | 120 +- .../multiply-fused-volatile.ll | 64 +- .../multiply-i32-row-major.ll | 120 +- .../LowerMatrixIntrinsics/multiply-i32.ll | 120 +- .../LowerMatrixIntrinsics/propagate-backward.ll | 24 +- .../propagate-backwards-unsupported.ll | 411 ++++++- .../LowerMatrixIntrinsics/propagate-forward.ll | 32 +- .../LowerMatrixIntrinsics/propagate-mixed-users.ll | 4 +- .../LowerMatrixIntrinsics/store-align-volatile.ll | 18 +- .../LowerMatrixIntrinsics/strided-load-double.ll | 24 +- .../LowerMatrixIntrinsics/strided-load-float.ll | 24 +- .../LowerMatrixIntrinsics/strided-load-i32.ll | 24 +- .../LowerMatrixIntrinsics/strided-store-double.ll | 18 +- .../LowerMatrixIntrinsics/strided-store-float.ll | 18 +- .../LowerMatrixIntrinsics/strided-store-i32.ll | 18 +- .../transpose-double-row-major.ll | 26 +- .../LowerMatrixIntrinsics/transpose-double.ll | 20 +- .../transpose-float-row-major.ll | 26 +- .../LowerMatrixIntrinsics/transpose-float.ll | 20 +- .../transpose-i32-row-major.ll | 26 +- .../LowerMatrixIntrinsics/transpose-i32.ll | 20 +- .../X86/vector-reductions-expanded.ll | 34 +- .../SLPVectorizer/AMDGPU/horizontal-store.ll | 30 +- .../Transforms/SLPVectorizer/AMDGPU/reduction.ll | 54 +- .../Transforms/SLPVectorizer/X86/horizontal.ll | 35 + llvm/test/Transforms/SROA/vector-promotion.ll | 18 +- .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_create.ll | 139 ++- llvm/test/Transforms/SimplifyCFG/switch_msan.ll | 2 +- .../Inputs/x86_function_name.ll | 21 +- .../Inputs/x86_function_name.ll.expected | 61 +- .../tools/llvm-elfabi/preserve-dates-stub.test | 19 + .../test/tools/llvm-elfabi/preserve-dates-tbe.test | 8 + llvm/tools/lli/ChildTarget/ChildTarget.cpp | 6 +- llvm/tools/lli/RemoteJITUtils.h | 4 +- llvm/tools/lli/lli.cpp | 8 +- llvm/tools/llvm-c-test/echo.cpp | 2 + llvm/tools/llvm-elfabi/llvm-elfabi.cpp | 33 +- .../llvm-jitlink-executor.cpp | 8 +- llvm/tools/llvm-jitlink/llvm-jitlink.cpp | 10 +- llvm/tools/llvm-jitlink/llvm-jitlink.h | 8 +- llvm/unittests/ExecutionEngine/Orc/QueueChannel.h | 12 +- .../unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp | 104 +- llvm/unittests/IR/PatternMatch.cpp | 11 +- llvm/utils/TableGen/CodeGenTarget.cpp | 1 + llvm/utils/TableGen/IntrinsicEmitter.cpp | 4 +- llvm/utils/UpdateTestChecks/asm.py | 4 +- llvm/utils/gn/build/toolchain/BUILD.gn | 6 +- llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 1 + mlir/docs/PassManagement.md | 4 + mlir/include/mlir-c/Bindings/Python/Interop.h | 21 + mlir/include/mlir/Bindings/Python/Attributes.td | 16 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 33 +- mlir/include/mlir/IR/OpBase.td | 13 +- mlir/include/mlir/Interfaces/ViewLikeInterface.td | 31 +- mlir/lib/Bindings/Python/CMakeLists.txt | 19 + mlir/lib/Bindings/Python/IRModules.cpp | 46 + mlir/lib/Bindings/Python/IRModules.h | 22 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 2 +- mlir/lib/Support/MlirOptMain.cpp | 23 + mlir/test/Bindings/Python/ir_affine_map.py | 24 + mlir/test/Pass/run-reproducer.mlir | 22 + mlir/test/mlir-tblgen/op-python-bindings.td | 148 +-- mlir/test/mlir-tblgen/rewriter-indexing.td | 8 + mlir/test/mlir-tblgen/types.mlir | 2 +- mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp | 61 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 2 +- openmp/runtime/cmake/LibompHandleFlags.cmake | 1 + openmp/runtime/cmake/config-ix.cmake | 1 + openmp/runtime/src/kmp.h | 114 +- openmp/runtime/src/kmp_affinity.cpp | 17 +- openmp/runtime/src/kmp_affinity.h | 54 +- openmp/runtime/src/kmp_alloc.cpp | 5 +- openmp/runtime/src/kmp_atomic.cpp | 6 +- openmp/runtime/src/kmp_barrier.cpp | 4 +- openmp/runtime/src/kmp_csupport.cpp | 28 +- openmp/runtime/src/kmp_dispatch.cpp | 33 +- openmp/runtime/src/kmp_dispatch_hier.h | 14 +- openmp/runtime/src/kmp_environment.cpp | 7 +- openmp/runtime/src/kmp_ftn_entry.h | 8 +- openmp/runtime/src/kmp_gsupport.cpp | 12 +- openmp/runtime/src/kmp_i18n.h | 2 +- openmp/runtime/src/kmp_itt.inl | 5 +- openmp/runtime/src/kmp_lock.cpp | 4 +- openmp/runtime/src/kmp_runtime.cpp | 23 +- openmp/runtime/src/kmp_settings.cpp | 14 +- openmp/runtime/src/kmp_stats.cpp | 35 +- openmp/runtime/src/kmp_stats.h | 2 +- openmp/runtime/src/kmp_str.cpp | 9 +- openmp/runtime/src/kmp_str.h | 4 +- openmp/runtime/src/kmp_stub.cpp | 6 +- openmp/runtime/src/kmp_stub.h | 4 +- openmp/runtime/src/kmp_taskdeps.cpp | 11 +- openmp/runtime/src/kmp_tasking.cpp | 13 +- openmp/runtime/src/kmp_threadprivate.cpp | 5 +- openmp/runtime/src/kmp_utility.cpp | 2 +- openmp/runtime/src/kmp_wait_release.h | 6 +- openmp/runtime/src/ompt-specific.cpp | 2 +- openmp/runtime/src/z_Linux_util.cpp | 38 +- 585 files changed, 21415 insertions(+), 13884 deletions(-) create mode 100644 clang/test/CodeGen/semantic-interposition-no.c create mode 100644 libc/src/math/llrint.cpp create mode 100644 libc/src/math/llrint.h create mode 100644 libc/src/math/llrintf.cpp create mode 100644 libc/src/math/llrintf.h create mode 100644 libc/src/math/llrintl.cpp create mode 100644 libc/src/math/llrintl.h create mode 100644 libc/src/math/lrint.cpp create mode 100644 libc/src/math/lrint.h create mode 100644 libc/src/math/lrintf.cpp create mode 100644 libc/src/math/lrintf.h create mode 100644 libc/src/math/lrintl.cpp create mode 100644 libc/src/math/lrintl.h create mode 100644 libc/src/math/rint.cpp create mode 100644 libc/src/math/rint.h create mode 100644 libc/src/math/rintf.cpp create mode 100644 libc/src/math/rintf.h create mode 100644 libc/src/math/rintl.cpp create mode 100644 libc/src/math/rintl.h create mode 100644 libc/test/src/math/RIntTest.h create mode 100644 libc/test/src/math/llrint_test.cpp create mode 100644 libc/test/src/math/llrintf_test.cpp create mode 100644 libc/test/src/math/llrintl_test.cpp create mode 100644 libc/test/src/math/lrint_test.cpp create mode 100644 libc/test/src/math/lrintf_test.cpp create mode 100644 libc/test/src/math/lrintl_test.cpp create mode 100644 libc/test/src/math/rint_test.cpp create mode 100644 libc/test/src/math/rintf_test.cpp create mode 100644 libc/test/src/math/rintl_test.cpp create mode 100644 llvm/include/llvm/CodeGen/CodeGenPassBuilder.h create mode 100644 llvm/include/llvm/CodeGen/MachinePassRegistry.def rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/FDRawByteChannel.h (87%) rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h (89%) rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RawByteChannel.h (88%) rename llvm/include/llvm/ExecutionEngine/Orc/{RPC/RPCSerialization.h => Shared/Ser [...] create mode 100644 llvm/include/llvm/Target/CGPassBuilderOption.h create mode 100644 llvm/lib/CodeGen/CodeGenPassBuilder.cpp create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-static.ll create mode 100644 llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir create mode 100644 llvm/test/CodeGen/PowerPC/pr48388.ll delete mode 100644 llvm/test/CodeGen/PowerPC/preemption.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll delete mode 100644 llvm/test/CodeGen/X86/fold-add-pcrel.ll delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-comdat.ll delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-odr.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-swift-error.ll create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-stub.test create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test create mode 100644 mlir/test/Bindings/Python/ir_affine_map.py create mode 100644 mlir/test/Pass/run-reproducer.mlir