[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (805d59593f5 -> 8f933a4e931)

21 Dec 2020


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig
in repository toolchain/ci/llvm-project.
from  805d59593f5 [Analysis, CodeGen, IR] Use contains (NFC)
      adds  195f44278c4 [ARM] Implement harden-sls-retbr for ARM mode
      adds  c061cb521b9 [gn build] Port 195f44278c4
      adds  320fd3314e3 [ARM] Implement harden-sls-retbr for Thumb mode
      adds  a4c1f5160e6 [ARM] Harden indirect calls against SLS
      adds  df8ed392837 [ARM] harden-sls-blr: avoid r12 and lr in indirect calls.
      adds  9c895aea118 [ARM] Add clang command line support for -mharden-sls=
      adds  9cf3b1b6665 [RISCV] Define vlxe/vsxe/vsuxe intrinsics.
      adds  5740f96d8ee [NFC][libc++] Fixes swapped comments.
      adds  1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...]
      adds  56edfcada90 [Target, Transforms] Use contains (NFC)
      adds  a6516a820d3 [Analysis] Remove dead function getInstTypePair (NFC)
      adds  f47b07315a3 [X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga [...]
      adds  c52bcf3a9b2 [IRSim][IROutliner] Limit to extracting regions that only r [...]
      adds  b43b77ff9b8 [NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation
      adds  4be8707e645 [SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree
      adds  76e74d93950 [SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree
      adds  c209b88dd43 [SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree
      adds  b7d00e29b77 [SimplifyCFG] Teach simplifySingleResume() to preserve DomTree
      adds  83659c70767 [SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondB [...]
      adds  4d87a6ad13c [NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull  [...]
      adds  b94520c9ee2 [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...]
      adds  6a1617d67cc [SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to pre [...]
      adds  262ff9c23e7 [SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree
      adds  c043f5055e8 [SimplifyCFG] Teach FoldBranchToCommonDest() to preserve Do [...]
      adds  99930719c66 Handle overflow beyond the 127 common encodings limit
      adds  0cbceed27c4 [TableGen][ARM][X86] Detect combining IntrReadMem and IntrW [...]
      adds  5cdc4f57e50 [IROutliner] Deduplicating functions that only require inputs.
      adds  b8a2b6af374 Revert "[IROutliner] Deduplicating functions that only requ [...]
      adds  7c6f28a438b [IROutliner] Deduplicating functions that only require inputs.
      adds  0985a8bfea4 Fix left shift overflow UB in PPC backend on LLP64 platforms
      adds  c1d6de41a9d [mlir][CAPI] Add the missing <stdbool.h> in Support.h
      adds  37974b493a4 [lldb/test] Enable reverse-connect on windows too
      adds  62c94f06781 [RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics.
      adds  bd576ac8d4b [RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics.
      adds  f86e61d8862 [RISCV] Define vector vfwadd/vfwsub intrinsics.
      adds  41ab45d6624 [RISCV] Define vector vfwmul intrinsics.
      adds  99562332e3d [lldb] [test] Update test status for NetBSD
      adds  35f2c3a8b41 [clang-tidy] cppcoreguidelines-pro-type-member-init: suppre [...]
      adds  7e84aa1b81e Fix MSVC "not all control paths return a value" warnings. NFCI.
      adds  d86a00d8feb [RISCV] Define vslideup/vslidedown intrinsics
      adds  6fa1230594e [MemLoc] Fix debug print for LocationSize
      adds  3285ee143b7 [Analysis, IR, CodeGen] Use llvm::erase_if (NFC)
      adds  5d24935f220 [PGO] Remove dead member variable InstrumentFuncEntry (NFC)
      adds  43327ba98da [Object] Fix LFFile<ELFT>::getEntry on sizeof(size_t)==4 platforms
      adds  e2863357de7 [lld-macho][nfc] Use split-file in order file test
      adds  5f9896d3b23 [lld-macho] Support Obj-C symbols in order files
      adds  64e47572002 [lld-macho] Have order files support filtering by archive m [...]
      adds  bfa95b4ac79 [BasicAA] Add test for byval argument (NFC)
      adds  f47bac5dd20 [ARM] Extra vecreduce tests with smaller than legal types. NFC
      adds  47dbee6790c Make NPM OptBisectInstrumentation use global singleton OptBisect
      adds  01d1de81963 [MC] Reject byte alignment if larger than or equal to 2**32
      adds  36b0dd8f678 [OpenMP] Fixed the issue that CMake variables for OpenMP we [...]
      adds  1a883484afe [test] Fix reg-usage.ll under NPM
      adds  4dce7c2e209 [MachineLICM] delete dead flag if the duplicated def outsid [...]
      adds  564066524ad [PowerPC] add has side effect for SAT bit clobber intrinsic [...]
      adds  db1616c7684 [test] Fix new-pass-manager-opt-bisect.c
      adds  966f1431de0 [Target] Use llvm::erase_if (NFC)
      adds  9e4b682baf2 [RISCV][NFC] Add tests for multiplication with constant
      adds  72e75ca343c [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets
      adds  791fe7ac57a [lld-macho] Fix memcpy ub after D93267
      adds  f314bcffa3c [llvm-reduce][test] Make remove-alias.ll CHECK patterns mor [...]
      adds  553d4d08d2b [MC] Report locations for .symver errors
      adds  e4c360a897f [MC][ELF] Drop MCSymbol::isExternal call sites
      adds  29eb3dcfe62 [PowerPC] Materialize i64 constants by enumerated patterns.
      adds  7b9890e17e9 [MC][ELF] Remove unneeded MCSymbol::setExternal calls
      adds  26d378b801f [PowerPC][NFC] Added assertion of shift exponent is too lar [...]
      adds  e0963ae274b [AsmParser] make .ascii support spaces as separators
      adds  3183add5343 [RISCV] Define the remaining vector fixed-point arithmetic  [...]
      adds  e2303a448e2 [FastRA] Fix handling of bundled MIs
      adds  8ffda237a66 MCContext::reportError: don't call report_fatal_error
      adds  1635dea266c [AsmPrinter] Replace a reachable report_fatal_error with MC [...]
      adds  f6c7ebe76ac [MLIR][SPIRVToLLVM] Updated documentation on entry points a [...]
      adds  3bf7d47a977 [NFC][InstructionCost] Remove isValid() asserts in SLPVecto [...]
      adds  27b7d646886 [clang][cli] Streamline MarshallingInfoFlag description
      adds  70410a26494 [clang][cli] Let denormalizer decide how to render the opti [...]
      adds  5a85526728c [clang] Use enum for LangOptions::SYCLVersion instead of unsigned
      adds  93da221eaf7 [VP][NFC] ISD::VP_Sub -> ISD::VP_SUB
      adds  cd608dc8d3e [VPlan] Use VPDef for VPInterleaveRecipe.
      adds  d99e4a4840d [VE] Support RETURNADDR
      adds  5e273b845bc [VE] Support STACKSAVE and STACKRESTORE
      adds  d6abd7317a2 [flang][driver] Make the names of files created in unit tes [...]
      adds  06b83fd6c75 [TableGen] NFC: Switch to range-based for loops in OptParse [...]
      adds  164bcbd40e6 [TableGen] NFC: Rename variables in OptParserEmitter
      adds  a3a896d1cdc [VE] Optimize LEA combinations
      adds  b2ba6867eac Refactoring the attribute plugin example to fit the new API
      adds  6f45049fb6e [Statepoints] Disable VReg lowering for values used on exce [...]
      adds  f2508923737 [VPlan] Make VPRecipeBase inherit from VPDef.
      adds  8c2ad9e85f6 [VE] Correct VMP allocation in calling conv
      adds  d6118759f30 [InstSimplify] add tests for inverted logic operands; NFC
      adds  38ca7face67 [InstSimplify] reduce logic with inverted add/sub ops
      adds  3a675c777dd [TableGen] Add the !substr() bang operator
      adds  88c5b500606 [AggressiveInstCombine] Generalize foldGuardedRotateToFunne [...]
      adds  d56982b6f5f Remove unused variables.
      adds  554eb1f6dc4 Revert "[TableGen] Add the !substr() bang operator"
      adds  e25afcfa51a [ELF][PPC64] Detect missing R_PPC64_TLSGD/R_PPC64_TLSLD and [...]
      adds  fb3c1b3de5c [ELF] Reject local-exec TLS relocations for -shared
      adds  9a93f95fce9 [clang] Fix expected errors in plugin attribute example
      adds  26c8f9081b6 [mlir[[vector] Extend Transfer read/write ops to support te [...]
      adds  a323682dcbf [AMDGPU][MC][NFC] Lit tests cleanup
      adds  8ab5770a17f [AMDGPU][MC][NFC] Parser refactoring
      adds  f4f49d9d0d6 [AMDGPU][MC][NFC] Fix for sanitizer error in 8ab5770
      adds  bb8d20d9f3b [cuda][hip] Fix typoes in header wrappers.
      adds  dfa40840e0e scudo: Remove ANDROID_EXPERIMENTAL_MTE macro.
      adds  43def795aac Update references to 'master' branch.
      adds  82bd64fff63 [AA] byval argument is identified function local
      adds  3fa2d37eb3f [clangd][NFC] Improve clangd status messages
      adds  3f3ab03ab7b [lldb] Remove anonymous namespace from NativeRegisterContex [...]
      adds  a817594de92 [lld-macho][nfc] Clean up tests
      adds  0f8224c2104 [lld-macho][nfc] Remove %T from headerpad.s
       new  8f933a4e931 [openacc] Use TableGen enum for default clause value
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../cppcoreguidelines/ProTypeMemberInitCheck.cpp   |    4 +
 clang-tools-extra/clangd/ClangdServer.cpp          |    8 +-
 clang-tools-extra/clangd/TUScheduler.cpp           |    2 +-
 .../cppcoreguidelines-pro-type-member-init.cpp     |   16 +
 clang/examples/Attribute/Attribute.cpp             |   49 +-
 clang/include/clang/Basic/DiagnosticDriverKinds.td |    2 +
 clang/include/clang/Basic/LangOptions.def          |    2 +-
 clang/include/clang/Basic/LangOptions.h            |    5 +
 clang/include/clang/Driver/Options.td              |   44 +-
 clang/lib/Driver/ToolChains/Arch/ARM.cpp           |   45 +
 clang/lib/Driver/ToolChains/Arch/ARM.h             |    1 +
 clang/lib/Frontend/CompilerInvocation.cpp          |   88 +-
 clang/lib/Frontend/InitPreprocessor.cpp            |    2 +-
 clang/lib/Headers/cuda_wrappers/algorithm          |    2 +-
 clang/lib/Headers/cuda_wrappers/new                |    2 +-
 clang/lib/Sema/SemaTemplate.cpp                    |    2 +
 clang/test/CodeGen/new-pass-manager-opt-bisect.c   |   12 +
 clang/test/Driver/aarch64-sls-hardening-options.c  |   45 -
 clang/test/Driver/sls-hardening-options.c          |   97 +
 clang/test/Frontend/plugin-attribute.cpp           |   39 +-
 .../unittests/Frontend/CompilerInvocationTest.cpp  |   44 +-
 compiler-rt/lib/scudo/standalone/linux.cpp         |    9 +-
 compiler-rt/lib/scudo/standalone/memtag.h          |   29 +-
 flang/include/flang/Parser/dump-parse-tree.h       |    6 +-
 flang/include/flang/Parser/parse-tree.h            |    3 +-
 flang/lib/Parser/openacc-parsers.cpp               |    6 +-
 flang/lib/Parser/unparse.cpp                       |    4 +-
 flang/lib/Semantics/resolve-directives.cpp         |    4 +-
 flang/unittests/Frontend/FrontendActionTest.cpp    |    4 +-
 .../libcxx/iterators/trivial_iterators.pass.cpp    |    4 +-
 lld/ELF/InputFiles.h                               |    4 +
 lld/ELF/Relocations.cpp                            |   61 +-
 lld/MachO/Driver.cpp                               |   94 +-
 lld/MachO/UnwindInfoSection.cpp                    |  214 +-
 lld/MachO/UnwindInfoSection.h                      |   31 +-
 lld/MachO/Writer.cpp                               |   18 +-
 lld/test/ELF/Inputs/i386-static-tls-model4.s       |    9 -
 lld/test/ELF/aarch64-tls-le.s                      |    8 +
 lld/test/ELF/arm-tls-le32.s                        |    7 +
 lld/test/ELF/i386-static-tls-model.s               |    8 -
 lld/test/ELF/i386-tls-le.s                         |   57 +-
 lld/test/ELF/i386-zrel-zrela.s                     |    8 +-
 lld/test/ELF/mips-tls-hilo.s                       |    6 +-
 lld/test/ELF/ppc64-local-exec-tls.s                |   12 +
 lld/test/ELF/ppc64-tls-missing-gdld.s              |   85 +-
 lld/test/ELF/riscv-tls-le.s                        |    7 +
 lld/test/ELF/tls.s                                 |   20 +
 lld/test/ELF/x86-64-reloc-tpoff32-fpic.s           |   14 -
 lld/test/MachO/Inputs/libfunction.s                |    6 -
 lld/test/MachO/archive.s                           |   30 +-
 lld/test/MachO/common-symbol-resolution.s          |    3 +-
 lld/test/MachO/filelist.s                          |   22 +-
 lld/test/MachO/force-load.s                        |   22 +-
 lld/test/MachO/framework.s                         |   12 +-
 lld/test/MachO/headerpad.s                         |   46 +-
 lld/test/MachO/invalid/archive-no-index.s          |   25 +-
 lld/test/MachO/invalid/bad-archive-member.s        |    3 +-
 lld/test/MachO/invalid/order-file-bad-arch.test    |    9 -
 lld/test/MachO/invalid/order-file-bad-objfile.test |   10 -
 lld/test/MachO/lto-archive.ll                      |    3 +-
 lld/test/MachO/objc.s                              |    4 +-
 lld/test/MachO/order-file.s                        |  185 +-
 lld/test/MachO/resolution.s                        |   16 +-
 lld/test/MachO/section-merge.s                     |   41 +-
 lld/test/MachO/stabs.s                             |    3 +-
 lld/test/MachO/subsections-section-relocs.s        |   12 +-
 lld/test/MachO/subsections-symbol-relocs.s         |   37 +-
 lld/test/MachO/symbol-order.s                      |   42 +-
 lld/test/MachO/tools/generate-cfi-funcs.py         |    2 +-
 lld/test/MachO/tools/validate-unwind-info.py       |   13 +-
 lld/test/MachO/weak-definition-direct-fetch.s      |   22 +-
 lld/test/MachO/weak-definition-indirect-fetch.s    |   24 +-
 lld/test/MachO/weak-definition-order.s             |   21 +-
 lld/test/MachO/weak-definition-over-dysym.s        |   35 +-
 .../test/tools/lldb-server/gdbremote_testcase.py   |    4 -
 .../Linux/NativeRegisterContextLinux_x86_64.cpp    |   12 +-
 .../api/multiple-targets/TestMultipleTargets.py    |    1 +
 .../call-restarts/TestCallThatRestarts.py          |    2 +-
 .../expression/ir-interpreter/TestIRInterpreter.py |    1 -
 .../expression/radar_9531204/TestPrintfAfterUp.py  |    1 -
 .../save_jit_objects/TestSaveJITObjects.py         |    1 -
 .../test/API/commands/expression/test/TestExprs.py |    1 -
 .../API/commands/gui/viewlarge/TestGuiViewLarge.py |    1 +
 .../commands/process/attach/TestProcessAttach.py   |    1 +
 .../cpp_exception/TestCPPExceptionBreakpoint.py    |    2 -
 .../TestBreakpointInGlobalConstructor.py           |    1 -
 .../functionalities/completion/TestCompletion.py   |    1 +
 .../TestDlopenOtherExecutable.py                   |    1 +
 .../inferior-assert/TestInferiorAssert.py          |    4 -
 .../TestRecursiveInferiorStep.py                   |    1 +
 ...ConcurrentBreakpointDelayBreakpointOneSignal.py |    1 -
 .../TestConcurrentSignalDelayBreak.py              |    2 +-
 .../TestConcurrentTwoBreakpointsOneDelaySignal.py  |    2 +-
 .../TestConcurrentTwoBreakpointsOneSignal.py       |    2 +-
 .../TestExitDuringExpression.py                    |    2 +
 .../TestStateAfterExpression.py                    |    1 +
 .../TestThreadSpecificBpPlusCondition.py           |    2 +-
 .../unwind/noreturn/TestNoreturnUnwind.py          |    1 -
 .../c/conflicting-symbol/TestConflictingSymbol.py  |    1 -
 .../lang/c/const_variables/TestConstVariables.py   |    1 -
 .../API/lang/c/function_types/TestFunctionTypes.py |    1 -
 .../lang/c/global_variables/TestGlobalVariables.py |    1 -
 lldb/test/API/lang/c/shared_lib/TestSharedLib.py   |    2 -
 .../cpp/exceptions/TestCPPExceptionBreakpoints.py  |    1 -
 .../TestNamespaceDefinitions.py                    |    1 -
 .../test/API/lang/cpp/stl/TestStdCXXDisassembly.py |    1 -
 lldb/test/API/lang/cpp/this/TestCPPThis.py         |    1 -
 lldb/test/API/python_api/event/TestEvents.py       |    2 +-
 .../lldbutil/iter/TestRegistersIterator.py         |    1 +
 lldb/test/API/python_api/thread/TestThreadAPI.py   |    1 -
 .../lldb-server/TestGdbRemote_vContThreads.py      |    2 +
 .../TestVSCode_setExceptionBreakpoints.py          |    1 -
 .../disconnect/TestVSCode_disconnect.py            |    1 +
 lldb/test/Shell/Recognizer/assert.test             |    1 +
 .../Functionalities/TestExpressionEvaluation.test  |    2 +-
 .../ScriptInterpreter/Lua/watchpoint_callback.test |    1 +
 llvm/docs/CodingStandards.rst                      |    2 +-
 llvm/docs/DeveloperPolicy.rst                      |    4 +-
 llvm/docs/FAQ.rst                                  |    2 +-
 llvm/docs/GettingStarted.rst                       |   10 +-
 llvm/docs/GitBisecting.rst                         |    6 +-
 llvm/docs/GlobalISel/IRTranslator.rst              |    2 +-
 llvm/docs/LibFuzzer.rst                            |    4 +-
 llvm/docs/TestingGuide.rst                         |    2 +-
 llvm/docs/TypeMetadata.rst                         |    2 +-
 llvm/include/llvm/Analysis/AliasAnalysis.h         |    3 -
 llvm/include/llvm/Frontend/OpenACC/ACC.td          |    8 +
 llvm/include/llvm/IR/IntrinsicsARM.td              |    4 +-
 llvm/include/llvm/IR/IntrinsicsPowerPC.td          |   42 +-
 llvm/include/llvm/IR/IntrinsicsRISCV.td            |  112 +-
 llvm/include/llvm/IR/IntrinsicsX86.td              |    7 +-
 llvm/include/llvm/IR/OptBisect.h                   |   20 +-
 llvm/include/llvm/IR/PassManager.h                 |    6 +-
 llvm/include/llvm/IR/VPIntrinsics.def              |    2 +-
 llvm/include/llvm/MC/MCAssembler.h                 |    7 +-
 llvm/include/llvm/MC/MCSymbol.h                    |    3 +-
 llvm/include/llvm/Object/ELF.h                     |    9 +-
 llvm/include/llvm/Option/OptParser.td              |   12 +-
 .../include/llvm/Passes/StandardInstrumentations.h |    2 +-
 llvm/include/llvm/Transforms/IPO/IROutliner.h      |   57 +-
 llvm/include/llvm/Transforms/Utils/Local.h         |    3 +-
 llvm/lib/Analysis/AliasAnalysis.cpp                |   10 +-
 llvm/lib/Analysis/CGSCCPassManager.cpp             |   31 +-
 llvm/lib/Analysis/InstructionSimplify.cpp          |   33 +
 llvm/lib/Analysis/MemDepPrinter.cpp                |    3 -
 llvm/lib/Analysis/MemoryLocation.cpp               |    2 +-
 llvm/lib/Analysis/ScalarEvolution.cpp              |    4 +-
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp         |    4 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp         |    4 +-
 llvm/lib/CodeGen/MachineLICM.cpp                   |   37 +-
 llvm/lib/CodeGen/RDFLiveness.cpp                   |    2 +-
 llvm/lib/CodeGen/RegAllocFast.cpp                  |   43 +
 .../CodeGen/SelectionDAG/StatepointLowering.cpp    |   24 +-
 llvm/lib/CodeGen/StackMaps.cpp                     |    5 +-
 llvm/lib/IR/LLVMContextImpl.cpp                    |   15 +-
 llvm/lib/IR/LLVMContextImpl.h                      |    3 +-
 llvm/lib/IR/Metadata.cpp                           |    9 +-
 llvm/lib/IR/OptBisect.cpp                          |    2 +
 llvm/lib/MC/ELFObjectWriter.cpp                    |   26 +-
 llvm/lib/MC/MCContext.cpp                          |    4 +-
 llvm/lib/MC/MCELFStreamer.cpp                      |   16 +-
 llvm/lib/MC/MCParser/AsmParser.cpp                 |   15 +-
 llvm/lib/Passes/StandardInstrumentations.cpp       |    8 +-
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp    |    8 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp       |   10 +-
 .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp    |  171 +-
 llvm/lib/Target/ARM/ARM.h                          |    3 +
 llvm/lib/Target/ARM/ARM.td                         |   14 +
 llvm/lib/Target/ARM/ARMAsmPrinter.cpp              |   42 +
 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp           |   56 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.h             |   65 +
 llvm/lib/Target/ARM/ARMCallLowering.cpp            |    9 +-
 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp      |   11 +
 llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp       |    5 +-
 llvm/lib/Target/ARM/ARMFastISel.cpp                |   14 +-
 llvm/lib/Target/ARM/ARMFeatures.h                  |    1 +
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |    2 +-
 llvm/lib/Target/ARM/ARMInstrInfo.td                |   35 +-
 llvm/lib/Target/ARM/ARMInstrThumb.td               |   13 +-
 llvm/lib/Target/ARM/ARMInstrThumb2.td              |    9 +
 llvm/lib/Target/ARM/ARMPredicates.td               |    3 +
 llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp        |   12 +-
 llvm/lib/Target/ARM/ARMRegisterInfo.td             |   17 +
 llvm/lib/Target/ARM/ARMSLSHardening.cpp            |  416 ++
 llvm/lib/Target/ARM/ARMSubtarget.h                 |   10 +
 llvm/lib/Target/ARM/ARMTargetMachine.cpp           |    4 +
 llvm/lib/Target/ARM/CMakeLists.txt                 |    1 +
 .../lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |    2 -
 .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp  |    2 +-
 llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp       |    3 +-
 llvm/lib/Target/Hexagon/HexagonGenInsert.cpp       |    8 +-
 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp        |  534 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |    2 +-
 llvm/lib/Target/PowerPC/PPCInstrAltivec.td         |   91 +-
 llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp     |    2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp           |    5 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td    |  611 ++-
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp        |    1 +
 llvm/lib/Target/RISCV/RISCVRegisterInfo.td         |    1 +
 llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp |    4 +-
 llvm/lib/Target/VE/VECallingConv.td                |    4 +-
 llvm/lib/Target/VE/VEISelLowering.cpp              |   26 +
 llvm/lib/Target/VE/VEInstrInfo.td                  |    4 +
 .../WebAssemblyLowerEmscriptenEHSjLj.cpp           |    2 +-
 llvm/lib/Target/X86/X86InstrSVM.td                 |   28 +-
 .../AggressiveInstCombine.cpp                      |   71 +-
 llvm/lib/Transforms/IPO/IROutliner.cpp             |  470 +-
 .../Instrumentation/PGOInstrumentation.cpp         |    3 -
 .../lib/Transforms/Scalar/DeadStoreElimination.cpp |    3 +-
 llvm/lib/Transforms/Utils/LoopSimplify.cpp         |    2 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |  134 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |   30 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |   12 +-
 llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h    |    4 +-
 llvm/lib/Transforms/Vectorize/VPlan.cpp            |   48 +-
 llvm/lib/Transforms/Vectorize/VPlan.h              |  204 +-
 llvm/lib/Transforms/Vectorize/VPlanValue.h         |   35 +-
 llvm/runtimes/CMakeLists.txt                       |    3 +
 llvm/test/Analysis/BasicAA/noalias-param.ll        |   19 +-
 .../AMDGPU/GlobalISel/lds-zero-initializer.ll      |    4 +-
 llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir |   26 +
 llvm/test/CodeGen/AMDGPU/lds-initializer.ll        |    4 +-
 llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll   |    4 +-
 .../llvm.amdgcn.ds.gws.barrier-fastregalloc.ll     |   19 +
 llvm/test/CodeGen/ARM/O3-pipeline.ll               |    4 +
 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll |  246 +
 llvm/test/CodeGen/PowerPC/aix-cc-abi.ll            |    2 +-
 llvm/test/CodeGen/PowerPC/arr-fp-arg-no-copy.ll    |    4 +-
 llvm/test/CodeGen/PowerPC/bperm.ll                 |   26 +-
 llvm/test/CodeGen/PowerPC/combine_ext_trunc.ll     |   11 +-
 llvm/test/CodeGen/PowerPC/constants-i64.ll         |  145 +-
 llvm/test/CodeGen/PowerPC/f128-fma.ll              |    8 +-
 llvm/test/CodeGen/PowerPC/f128-passByValue.ll      |    4 +-
 llvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll       |    6 +-
 llvm/test/CodeGen/PowerPC/fp-strict-f128.ll        |    6 +-
 llvm/test/CodeGen/PowerPC/fp-to-int-to-fp.ll       |    8 +-
 .../PowerPC/fp128-bitcast-after-operation.ll       |   12 +-
 llvm/test/CodeGen/PowerPC/funnel-shift.ll          |   12 +-
 .../CodeGen/PowerPC/machinelicm-cse-dead-flag.mir  |   84 +
 .../PowerPC/memCmpUsedInZeroEqualityComparison.ll  |    8 +-
 llvm/test/CodeGen/PowerPC/negctr.ll                |    7 +-
 llvm/test/CodeGen/PowerPC/ori_imm32.ll             |    2 +-
 llvm/test/CodeGen/PowerPC/ori_imm64.ll             |    9 +-
 llvm/test/CodeGen/PowerPC/pr43976.ll               |    2 +-
 llvm/test/CodeGen/PowerPC/pr45448.ll               |    5 +-
 .../rematerializable-instruction-machine-licm.ll   |  147 +-
 llvm/test/CodeGen/PowerPC/sat-register-clobber.ll  |   43 +
 llvm/test/CodeGen/PowerPC/sms-grp-order.ll         |   36 +-
 llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll       |   72 +-
 .../PowerPC/tailcall-speculatable-callee.ll        |    6 +-
 .../CodeGen/PowerPC/unaligned-addressing-mode.ll   |    5 +-
 llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll       |   56 +-
 llvm/test/CodeGen/RISCV/mul.ll                     |  410 ++
 llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll          | 1441 +++++
 llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll          | 1761 ++++++
 llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll         | 1441 +++++
 llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll         | 1761 ++++++
 llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll          | 1441 +++++
 llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll          | 1761 ++++++
 llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll         | 1441 +++++
 llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll         | 1761 ++++++
 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll          |  881 +++
 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll          | 1201 +++++
 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll          |  881 +++
 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll          | 1201 +++++
 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll         |  441 ++
 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll         |  601 +++
 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll         |  881 +++
 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll         | 1201 +++++
 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll        |  881 +++
 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll        | 1201 +++++
 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll        |  881 +++
 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll        | 1201 +++++
 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll         |  401 ++
 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll         |  721 +++
 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll       |  401 ++
 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll       |  721 +++
 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll         |  401 ++
 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll         |  721 +++
 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll         |  401 ++
 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll         |  721 +++
 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll       |  401 ++
 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll       |  721 +++
 llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll           | 3281 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll           | 5361 +++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll         | 1189 +++++
 llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll         | 1621 ++++++
 llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll        | 1189 +++++
 llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll        | 1621 ++++++
 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll     | 1705 ++++++
 llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll     | 2131 ++++++++
 llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll       | 1705 ++++++
 llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll       | 2131 ++++++++
 llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll          | 1441 +++++
 llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll          | 1761 ++++++
 llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll          | 1945 +++++++
 llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll          | 2377 +++++++++
 llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll          | 1945 +++++++
 llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll          | 2377 +++++++++
 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll          | 3445 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll          | 5629 ++++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll           | 3445 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll           | 5629 ++++++++++++++++++++
 llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll      |  516 ++
 llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll  |  575 ++
 llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll      |  447 ++
 llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll  |  738 +++
 llvm/test/CodeGen/VE/Scalar/lea-opt.ll             |   63 +
 llvm/test/CodeGen/VE/Scalar/returnaddr.ll          |   91 +
 llvm/test/CodeGen/VE/Scalar/stacksave.ll           |   26 +
 llvm/test/CodeGen/VE/Vector/fastcc_callee.ll       |    8 +
 llvm/test/CodeGen/X86/equiv_with_vardef.ll         |    5 +-
 llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll    |   45 +-
 llvm/test/CodeGen/XCore/section-name.ll            |    4 +-
 llvm/test/MC/AMDGPU/flat-gfx9.s                    |    1 -
 llvm/test/MC/AMDGPU/flat-global.s                  |    1 -
 llvm/test/MC/AMDGPU/flat.s                         |    6 -
 llvm/test/MC/AMDGPU/fma-mix.s                      |    4 -
 llvm/test/MC/AMDGPU/literal16.s                    |    1 +
 llvm/test/MC/AMDGPU/mad-mix.s                      |    4 -
 llvm/test/MC/AMDGPU/smem.s                         |    1 -
 llvm/test/MC/AMDGPU/vop1-gfx9-err.s                |    1 -
 llvm/test/MC/AMDGPU/vop1.s                         |    2 +-
 llvm/test/MC/AsmParser/align_invalid.s             |    4 +
 llvm/test/MC/AsmParser/directive_ascii.s           |    8 +
 llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt     |    2 +-
 llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt       |    2 +-
 llvm/test/MC/Disassembler/X86/simple-tests.txt     |   10 +-
 llvm/test/MC/ELF/basic-elf-32.s                    |    4 +-
 llvm/test/MC/ELF/compression.s                     |    4 +-
 llvm/test/MC/ELF/invalid-symver.s                  |    7 -
 llvm/test/MC/ELF/multiple-different-symver.s       |    6 -
 llvm/test/MC/ELF/multiple-equiv-symver.s           |    6 -
 llvm/test/MC/ELF/relocation-386.s                  |    5 +-
 llvm/test/MC/ELF/symver-err.s                      |   12 +
 llvm/test/MC/Mips/elf-relsym.s                     |   10 +-
 llvm/test/MC/Mips/xgot.s                           |    4 +-
 llvm/test/MC/X86/SVM-32.s                          |   30 +-
 llvm/test/MC/X86/SVM-64.s                          |   30 +-
 llvm/test/MC/X86/x86-32-coverage.s                 |   10 +-
 llvm/test/MC/X86/x86-32.s                          |   10 +-
 llvm/test/Reduce/remove-alias.ll                   |    3 +-
 llvm/test/TableGen/directive1.td                   |   13 +
 .../Transforms/AggressiveInstCombine/funnel.ll     |  118 +-
 .../Transforms/AggressiveInstCombine/rotate.ll     |   11 +-
 llvm/test/Transforms/Coroutines/coro-heap-elide.ll |    2 +-
 llvm/test/Transforms/GVNSink/indirect-call.ll      |    2 +-
 llvm/test/Transforms/GVNSink/sink-common-code.ll   |    2 +-
 llvm/test/Transforms/IROutliner/extraction.ll      |   50 +-
 llvm/test/Transforms/IROutliner/illegal-assumes.ll |   38 +-
 .../test/Transforms/IROutliner/illegal-branches.ll |    4 +-
 llvm/test/Transforms/IROutliner/illegal-callbr.ll  |    8 +-
 llvm/test/Transforms/IROutliner/illegal-calls.ll   |    8 +-
 .../test/Transforms/IROutliner/illegal-catchpad.ll |    4 +-
 llvm/test/Transforms/IROutliner/illegal-cleanup.ll |    4 +-
 llvm/test/Transforms/IROutliner/illegal-frozen.ll  |    4 +-
 llvm/test/Transforms/IROutliner/illegal-gep.ll     |    4 +-
 llvm/test/Transforms/IROutliner/illegal-invoke.ll  |    4 +-
 .../Transforms/IROutliner/illegal-landingpad.ll    |    4 +-
 llvm/test/Transforms/IROutliner/illegal-memcpy.ll  |   40 +-
 llvm/test/Transforms/IROutliner/illegal-memmove.ll |   40 +-
 llvm/test/Transforms/IROutliner/illegal-memset.ll  |    4 +-
 .../Transforms/IROutliner/illegal-phi-nodes.ll     |    4 +-
 llvm/test/Transforms/IROutliner/illegal-vaarg.ll   |   30 +-
 llvm/test/Transforms/IROutliner/legal-debug.ll     |    4 +-
 .../IROutliner/outlining-address-taken.ll          |    4 +-
 .../IROutliner/outlining-constants-vs-registers.ll |   78 +
 ...ructure.ll => outlining-different-constants.ll} |   30 +-
 .../IROutliner/outlining-different-globals.ll      |   40 +
 .../IROutliner/outlining-different-structure.ll    |    8 +-
 .../IROutliner/outlining-same-constants.ll         |   11 +-
 .../IROutliner/outlining-same-globals.ll           |   13 +-
 llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll  |   18 +-
 llvm/test/Transforms/InstCombine/bitcast.ll        |   12 +-
 .../Transforms/InstCombine/insert-const-shuf.ll    |   20 +-
 llvm/test/Transforms/InstSimplify/AndOrXor.ll      |  324 +-
 .../test/Transforms/LoopVectorize/X86/reg-usage.ll |    4 +-
 .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll     |    2 +-
 .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll  |    2 +-
 .../SimplifyCFG/2005-08-01-PHIUpdateFail.ll        |    2 +-
 .../Transforms/SimplifyCFG/2006-08-03-Crash.ll     |    2 +-
 .../Transforms/SimplifyCFG/2008-12-16-DCECond.ll   |    2 +-
 .../SimplifyCFG/2011-09-05-TrivialLPad.ll          |    2 +-
 .../SimplifyCFG/ARM/speculate-vector-ops.ll        |    4 +-
 llvm/test/Transforms/SimplifyCFG/BrUnwind.ll       |    2 +-
 llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll      |    2 +-
 llvm/test/Transforms/SimplifyCFG/HoistCode.ll      |    2 +-
 .../Transforms/SimplifyCFG/UncondBranchToReturn.ll |    2 +-
 .../Transforms/SimplifyCFG/UnreachableEliminate.ll |    2 +-
 .../SimplifyCFG/X86/2010-03-30-InvokeCrash.ll      |    2 +-
 .../SimplifyCFG/X86/CoveredLookupTable.ll          |    2 +-
 llvm/test/Transforms/SimplifyCFG/X86/bug-25299.ll  |    2 +-
 .../SimplifyCFG/X86/disable-lookup-table.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll  |    2 +-
 .../SimplifyCFG/X86/switch-covered-bug.ll          |    2 +-
 .../Transforms/SimplifyCFG/X86/switch-table-bug.ll |    2 +-
 llvm/test/Transforms/SimplifyCFG/branch-fold.ll    |    2 +-
 .../Transforms/SimplifyCFG/branch-phi-thread.ll    |    2 +-
 .../SimplifyCFG/debug-info-thread-phi.ll           |    2 +-
 .../SimplifyCFG/duplicate-ret-into-uncond-br.ll    |   31 +
 llvm/test/Transforms/SimplifyCFG/extract-cost.ll   |    2 +-
 .../SimplifyCFG/fold-branch-to-common-dest.ll      |    2 +-
 .../Transforms/SimplifyCFG/hoist-common-code.ll    |    2 +-
 .../Transforms/SimplifyCFG/hoist-with-range.ll     |    2 +-
 llvm/test/Transforms/SimplifyCFG/indirectbr.ll     |    2 +-
 llvm/test/Transforms/SimplifyCFG/invoke_unwind.ll  |    2 +-
 .../Transforms/SimplifyCFG/lifetime-landingpad.ll  |    2 +-
 .../merge-duplicate-conditional-ret-val.ll         |   21 +
 llvm/test/Transforms/SimplifyCFG/pr39807.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr46638.ll        |    2 +-
 .../SimplifyCFG/preserve-branchweights-partial.ll  |    4 +-
 .../SimplifyCFG/preserve-branchweights.ll          |    2 +-
 llvm/test/Transforms/SimplifyCFG/rangereduce.ll    |    2 +-
 .../Transforms/SimplifyCFG/switch-masked-bits.ll   |    2 +-
 .../SimplifyCFG/switch-on-const-select.ll          |    2 +-
 .../Transforms/SimplifyCFG/switch-range-to-icmp.ll |    2 +-
 .../SimplifyCFG/switch-simplify-crash.ll           |    2 +-
 .../SimplifyCFG/switch-to-select-two-case.ll       |    2 +-
 .../Transforms/SimplifyCFG/switch_switch_fold.ll   |    2 +-
 llvm/test/Transforms/SimplifyCFG/switch_thread.ll  |    2 +-
 .../test/Transforms/SimplifyCFG/unprofitable-pr.ll |    2 +-
 llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s |    2 +-
 .../tools/llvm-mca/X86/Atom/resources-x86_64.s     |    4 +-
 .../tools/llvm-mca/X86/Barcelona/resources-sse1.s  |    2 +-
 .../llvm-mca/X86/Barcelona/resources-x86_64.s      |    4 +-
 .../tools/llvm-mca/X86/BdVer2/resources-avx1.s     |    2 +-
 .../tools/llvm-mca/X86/BdVer2/resources-sse1.s     |    2 +-
 .../tools/llvm-mca/X86/BdVer2/resources-x86_64.s   |    4 +-
 .../tools/llvm-mca/X86/Broadwell/resources-avx1.s  |    2 +-
 .../tools/llvm-mca/X86/Broadwell/resources-sse1.s  |    2 +-
 .../llvm-mca/X86/Broadwell/resources-x86_64.s      |    4 +-
 .../tools/llvm-mca/X86/BtVer2/resources-avx1.s     |    2 +-
 .../tools/llvm-mca/X86/BtVer2/resources-sse1.s     |    2 +-
 .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s   |    4 +-
 .../tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s    |   10 +-
 .../tools/llvm-mca/X86/Generic/resources-avx1.s    |    2 +-
 .../tools/llvm-mca/X86/Generic/resources-sse1.s    |    2 +-
 .../tools/llvm-mca/X86/Generic/resources-x86_64.s  |    4 +-
 .../tools/llvm-mca/X86/Haswell/resources-avx1.s    |    2 +-
 .../tools/llvm-mca/X86/Haswell/resources-sse1.s    |    2 +-
 .../tools/llvm-mca/X86/Haswell/resources-x86_64.s  |    4 +-
 .../tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s   |   26 +-
 llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s  |    2 +-
 .../test/tools/llvm-mca/X86/SLM/resources-x86_64.s |    4 +-
 .../llvm-mca/X86/SandyBridge/resources-avx1.s      |    2 +-
 .../llvm-mca/X86/SandyBridge/resources-sse1.s      |    2 +-
 .../llvm-mca/X86/SandyBridge/resources-x86_64.s    |    4 +-
 .../llvm-mca/X86/SkylakeClient/resources-avx1.s    |    2 +-
 .../llvm-mca/X86/SkylakeClient/resources-sse1.s    |    2 +-
 .../llvm-mca/X86/SkylakeClient/resources-x86_64.s  |    4 +-
 .../llvm-mca/X86/SkylakeServer/resources-avx1.s    |    2 +-
 .../llvm-mca/X86/SkylakeServer/resources-sse1.s    |    2 +-
 .../llvm-mca/X86/SkylakeServer/resources-x86_64.s  |    4 +-
 .../tools/llvm-mca/X86/Znver1/resources-avx1.s     |    2 +-
 .../tools/llvm-mca/X86/Znver1/resources-sse1.s     |    2 +-
 .../tools/llvm-mca/X86/Znver1/resources-x86_64.s   |    4 +-
 .../tools/llvm-mca/X86/Znver2/resources-avx1.s     |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse1.s     |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-x86_64.s   |    4 +-
 llvm/unittests/Transforms/Vectorize/VPlanTest.cpp  |   57 +-
 llvm/utils/TableGen/CodeGenTarget.cpp              |   14 +-
 llvm/utils/TableGen/DirectiveEmitter.cpp           |   22 +
 llvm/utils/TableGen/OptParserEmitter.cpp           |   41 +-
 .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn      |    1 +
 mlir/docs/SPIRVToLLVMDialectConversion.md          |   53 +-
 mlir/include/mlir-c/Support.h                      |    1 +
 mlir/include/mlir/Dialect/Vector/VectorOps.h       |    2 +-
 mlir/include/mlir/Dialect/Vector/VectorOps.td      |   65 +-
 mlir/include/mlir/Dialect/Vector/VectorUtils.h     |    4 +-
 mlir/include/mlir/Interfaces/VectorInterfaces.td   |   28 +-
 .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp   |   16 +-
 .../VectorToLLVM/ConvertVectorToLLVM.cpp           |   46 +-
 .../lib/Conversion/VectorToROCDL/VectorToROCDL.cpp |    6 +-
 mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp    |   41 +-
 mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp    |    4 +-
 .../Dialect/Linalg/Transforms/Vectorization.cpp    |    4 +-
 mlir/lib/Dialect/Vector/VectorOps.cpp              |  154 +-
 .../Dialect/Vector/VectorTransferOpTransforms.cpp  |    4 +-
 mlir/lib/Dialect/Vector/VectorTransforms.cpp       |   47 +-
 mlir/lib/Dialect/Vector/VectorUtils.cpp            |   12 +-
 mlir/test/Dialect/Vector/invalid.mlir              |   12 +-
 mlir/test/Dialect/Vector/ops.mlir                  |   48 +
 482 files changed, 90892 insertions(+), 2866 deletions(-)
 create mode 100644 clang/test/CodeGen/new-pass-manager-opt-bisect.c
 delete mode 100644 clang/test/Driver/aarch64-sls-hardening-options.c
 create mode 100644 clang/test/Driver/sls-hardening-options.c
 delete mode 100644 lld/test/ELF/Inputs/i386-static-tls-model4.s
 delete mode 100644 lld/test/ELF/x86-64-reloc-tpoff32-fpic.s
 delete mode 100644 lld/test/MachO/Inputs/libfunction.s
 delete mode 100644 lld/test/MachO/invalid/order-file-bad-arch.test
 delete mode 100644 lld/test/MachO/invalid/order-file-bad-objfile.test
 create mode 100644 llvm/lib/Target/ARM/ARMSLSHardening.cpp
 create mode 100644 llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
 create mode 100644 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/machinelicm-cse-dead-flag.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/sat-register-clobber.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (805d59593f5 -> 8f933a4e931)