This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from ededc9899f1 [InstCombine] fold udiv with common factor from muls with nuw new 7531be0d757 [AMDGPU] Fix VGPR spills where offset doesn't fit in 12 bits
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: lib/Target/AMDGPU/SIRegisterInfo.cpp | 27 +-- test/CodeGen/AMDGPU/spill-offset-calculation.ll | 213 ++++++++++++++++++++++++ 2 files changed, 229 insertions(+), 11 deletions(-) create mode 100644 test/CodeGen/AMDGPU/spill-offset-calculation.ll