[Tcwg-commits] [llvm] branch master updated (a0a00583bde -> 68567bed6e0)

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from a0a00583bde Add FNeg support to InstructionSimplify new 68567bed6e0 [SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635)

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Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 +++ test/CodeGen/AArch64/vecreduce-bool.ll | 138 +++++-------------------------- 2 files changed, 32 insertions(+), 118 deletions(-)