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from d0c7e1df707 [llvm-mc] - Properly set the the address align field of the [...] new 4204ce0fa78 [ARM][FIX] Add missing f16.lane.vldN/vstN lowering new e86c537628d [AArch64] Add support for MTE intrinsics
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Summary of changes: include/llvm/IR/IntrinsicsAArch64.td | 17 + lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 63 ++- lib/Target/AArch64/AArch64InstrFormats.td | 5 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 16 + lib/Target/AArch64/AArch64InstrInfo.td | 16 +- lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 + test/CodeGen/AArch64/arm64-mte.ll | 497 +++++++++++++++++++++ .../CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll | 112 +++++ 8 files changed, 706 insertions(+), 22 deletions(-) create mode 100644 test/CodeGen/AArch64/arm64-mte.ll