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from 6c833c0581f1 Merge tag 'devicetree-fixes-for-6.0-1' of git://git.kernel [...] new c08b4848f596 riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit new f5bbc93937ac dt-bindings: display: convert ilitek,ili9341.txt to dt-schema new 5ec88543063c dt-bindings: display: ili9341: document canaan kd233's lcd new 727b05e46cff dt-bindings: memory-controllers: add canaan k210 sram controller new 465c12749b36 riscv: dts: canaan: fix the k210's memory node new 3f64510e3d80 riscv: dts: canaan: fix the k210's timer nodes new 5f4c5824d53e riscv: dts: canaan: fix mmc node names new 3bd204cbb7c4 riscv: dts: canaan: fix kd233 display spi frequency new 9bd61feb7025 riscv: dts: canaan: use custom compatible for k210 i2s new 719a85a2c57f riscv: dts: canaan: remove spi-max-frequency from controllers new e19f975a39f0 riscv: dts: canaan: fix bus {ranges,reg} warnings new 6990ea211c79 riscv: dts: canaan: add specific compatible for kd233's LCD new 0ed048137fd9 riscv: dts: canaan: build all devicetress if SOC_CANAAN new 8f2f74b4b6e6 RISC-V: Canaan devicetree fixes new 12b827758f51 of: also handle dma-noncoherent in of_dma_is_coherent() new d1afce670959 dt-bindings: riscv: document cbom-block-size new 1631ba1259d6 riscv: Add support for non-coherent devices using zicbom e [...] new d20ec7529236 riscv: implement cache-management errata for T-Head SoCs new 3aefb2ee5bdd riscv: implement Zicbom-based CMO instructions + the t-hea [...] new 8eb060e10185 arch/riscv: add Zihintpause support new 76ad33e1b95f riscv: traps_misaligned: do not duplicate stringify new 357628e68f5c RISC-V: kexec: Fixup use of smp_processor_id() in preempti [...] new 59c026c359c3 RISC-V: Fixup get incorrect user mode PC for kernel mode regs new ad943893d5f1 RISC-V: Fixup schedule out issue in machine_crash_shutdown() new f9293ad46d8b RISC-V: Add modules to virtual kernel memory layout dump new da06cc5bb600 RISC-V: fixups to work with crash tool new 788177e76589 riscv/purgatory: hard-code obj-y in Makefile new d8357e3bf8f7 riscv/purgatory: Omit use of bin2c new 2cfe9bbec56e riscv: dts: sifive unmatched: Add PWM controlled LEDs new a208acf0eac8 riscv: dts: starfive: correct number of external interrupts new da6d2128e56a RISC-V: Declare cpu_ops_spinwait in <asm/cpu_ops.h> new e4aa991c05ae RISC-V: cpu_ops_spinwait.c should include head.h new 87df2b5cbc84 riscv: ensure cpu_ops_sbi is declared new b60cf8e59e61 dt-bindings: riscv: fix SiFive l2-cache's cache-sets new 3dbe5829408b riscv:uprobe fix SR_SPIE set/clear handling new bf952a290f7a RISC-V: Add SSTC extension CSR details new 464b0187ff94 RISC-V: Enable sstc extension parsing from DT new 9f7a8ff6391f RISC-V: Prefer sstc extension if available new 7ab52f75a9cf RISC-V: Add Sstc extension support new acc1b919f479 RISC-V: Fix counter restart during overflow for RV32 new 133a6d1fe7d7 RISC-V: Update user page mapping only once during start new 0209b5830bea RISC-V: Fix SBI PMU calls for RV32 new 63ba67ebdfd4 RISC-V: Move counter info definition to sbi header file new f829ee7595b5 RISC-V: Improve SBI definitions new 9801002f76c6 perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes new 8f5cb44b1bae RISC-V: KVM: Support sstc extension new 9019b4f6d9bd wireguard: selftests: set CONFIG_NONPORTABLE on riscv32 new 5cef38dd03f3 dt-bindings: gpio: sifive: add gpio-line-names new 69dac8e431af Merge tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.o [...]
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Summary of changes: .../devicetree/bindings/display/ilitek,ili9341.txt | 27 ---- .../bindings/display/panel/ilitek,ili9341.yaml | 49 +++++-- .../devicetree/bindings/gpio/sifive,gpio.yaml | 4 + .../memory-controllers/canaan,k210-sram.yaml | 52 ++++++++ Documentation/devicetree/bindings/riscv/cpus.yaml | 5 + .../devicetree/bindings/riscv/sifive-l2-cache.yaml | 6 +- arch/riscv/Kconfig | 32 ++++- arch/riscv/Kconfig.erratas | 11 ++ arch/riscv/Makefile | 8 ++ arch/riscv/boot/dts/canaan/Makefile | 10 +- arch/riscv/boot/dts/canaan/canaan_kd233.dts | 6 +- arch/riscv/boot/dts/canaan/k210.dtsi | 73 +++++++---- arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts | 2 +- arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts | 2 +- arch/riscv/boot/dts/canaan/sipeed_maix_go.dts | 2 +- arch/riscv/boot/dts/canaan/sipeed_maixduino.dts | 2 +- .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 42 ++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +- arch/riscv/errata/thead/errata.c | 20 +++ arch/riscv/include/asm/cache.h | 4 + arch/riscv/include/asm/cacheflush.h | 10 ++ arch/riscv/include/asm/cpu_ops.h | 1 + arch/riscv/include/asm/cpu_ops_sbi.h | 2 + arch/riscv/include/asm/csr.h | 5 + arch/riscv/include/asm/errata_list.h | 59 ++++++++- arch/riscv/include/asm/hwcap.h | 7 + arch/riscv/include/asm/kvm_vcpu_timer.h | 7 + arch/riscv/include/asm/sbi.h | 32 ++++- arch/riscv/include/asm/vdso/processor.h | 21 ++- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpu.c | 3 + arch/riscv/kernel/cpu_ops.c | 5 +- arch/riscv/kernel/cpu_ops_spinwait.c | 2 + arch/riscv/kernel/cpufeature.c | 26 ++++ arch/riscv/kernel/crash_save_regs.S | 2 +- arch/riscv/kernel/machine_kexec.c | 28 +++- arch/riscv/kernel/probes/uprobes.c | 6 - arch/riscv/kernel/setup.c | 2 + arch/riscv/kernel/traps_misaligned.c | 8 +- arch/riscv/kvm/vcpu.c | 8 +- arch/riscv/kvm/vcpu_timer.c | 144 ++++++++++++++++++++- arch/riscv/lib/uaccess.S | 4 +- arch/riscv/mm/Makefile | 1 + arch/riscv/mm/dma-noncoherent.c | 116 +++++++++++++++++ arch/riscv/mm/init.c | 4 + arch/riscv/purgatory/.gitignore | 1 - arch/riscv/purgatory/Makefile | 10 +- arch/riscv/purgatory/kexec-purgatory.S | 14 ++ drivers/clocksource/timer-riscv.c | 25 +++- drivers/of/address.c | 17 ++- drivers/perf/riscv_pmu.c | 1 - drivers/perf/riscv_pmu_sbi.c | 30 +++-- scripts/remove-stale-files | 2 + .../selftests/wireguard/qemu/arch/riscv32.config | 1 + 54 files changed, 821 insertions(+), 143 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/ilitek,ili9341.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k21 [...] create mode 100644 arch/riscv/mm/dma-noncoherent.c create mode 100644 arch/riscv/purgatory/kexec-purgatory.S