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from 70b02dfd72c MAINTAINERS: Fix write after approval name order new 400efdddf3d [PATCH v4 1/2] RISC-V: Add support for XCVmac extension in [...] new 5ef248c15ec [PATCH v4 2/2] RISC-V: Add support for XCValu extension in [...]
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Summary of changes: gcc/common/config/riscv/riscv-common.cc | 6 + gcc/config/riscv/constraints.md | 7 + gcc/config/riscv/corev.def | 43 ++ gcc/config/riscv/corev.md | 693 +++++++++++++++++++++ gcc/config/riscv/predicates.md | 5 + gcc/config/riscv/riscv-builtins.cc | 13 + gcc/config/riscv/riscv-ftypes.def | 11 + gcc/config/riscv/riscv.cc | 7 + gcc/config/riscv/riscv.md | 1 + gcc/config/riscv/riscv.opt | 7 + gcc/doc/extend.texi | 174 ++++++ gcc/doc/sourcebuild.texi | 12 + gcc/testsuite/gcc.target/riscv/cv-alu-compile.c | 252 ++++++++ .../gcc.target/riscv/cv-alu-fail-compile-addn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-addrn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-addun.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-addurn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-clip.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-clipu.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-subn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-subrn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-subun.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile-suburn.c | 11 + .../gcc.target/riscv/cv-alu-fail-compile.c | 32 + gcc/testsuite/gcc.target/riscv/cv-mac-compile.c | 198 ++++++ .../gcc.target/riscv/cv-mac-fail-compile-mac.c | 25 + .../gcc.target/riscv/cv-mac-fail-compile-machhsn.c | 24 + .../riscv/cv-mac-fail-compile-machhsrn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-machhun.c | 24 + .../riscv/cv-mac-fail-compile-machhurn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-macsn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-macsrn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-macun.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-macurn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-msu.c | 25 + .../gcc.target/riscv/cv-mac-fail-compile-mulhhsn.c | 24 + .../riscv/cv-mac-fail-compile-mulhhsrn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-mulhhun.c | 24 + .../riscv/cv-mac-fail-compile-mulhhurn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-mulsn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-mulsrn.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-mulun.c | 24 + .../gcc.target/riscv/cv-mac-fail-compile-mulurn.c | 24 + .../gcc.target/riscv/cv-mac-test-autogeneration.c | 18 + gcc/testsuite/lib/target-supports.exp | 26 + 45 files changed, 2049 insertions(+) create mode 100644 gcc/config/riscv/corev.def create mode 100644 gcc/config/riscv/corev.md create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-compile.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-addn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-addrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-addun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-addurn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-clip.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-clipu.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-subn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-subrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-subun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile-suburn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-alu-fail-compile.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-compile.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mac.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-machhsn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-machhsrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-machhun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-machhurn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-macsn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-macsrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-macun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-macurn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-msu.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulhhsn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulhhsrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulhhun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulhhurn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulsn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulsrn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulun.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-fail-compile-mulurn.c create mode 100644 gcc/testsuite/gcc.target/riscv/cv-mac-test-autogeneration.c