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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.
from bf55c4e3e39 [LLD][COFF] Early dependency detection adds 7e062c9b1f9 [X86] Make post-ra scheduling macrofusion-aware. adds d66a47f90a7 [InstCombine] Handle vector gep with scalar argument in eva [...] adds 0276b943566 InstSimplify: Add baseline test for upcoming change adds 3e527cd823a Revert "[InstCombine] Handle vector gep with scalar argumen [...] adds ebf90db0848 X86: Fix override warning adds 150a7ec2dc0 [InstCombine] Handle vector gep with scalar argument in eva [...] adds e106f25f056 [OPENMP] Check that allocated variables are used in private [...] adds 30c2f20e558 Fix builder. adds efe376add6a [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register adds da20f5ca745 [RISCV] Generate address sequences suitable for mcmodel=medium adds 60768cd8967 [ASTImporter] Make ODR error handling configurable new 9142b8ef1b9 [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions new 44668ae7c7d [RISCV] Attach VK_RISCV_CALL to symbols upon creation new 3d233d5d4d8 [AArch64] Add v8.5-a Memory Tagging STZGM instruction new 22990ba11c2 gn build: Merge r357383 new d8519f4a7db [lldb] [Process/elf-core] Support aarch64 NetBSD core dumps new 0a30f33ce21 [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure. new 95c585e258f [pstl] Indent preprocessor directives as part of the clang- [...] new 410f32ce7c6 [ASTImporter] Convert ODR diagnostics inside ASTImporter im [...] new 9ef7708bbbf [Tests] Add tests for a possible loop predication transform [...] new 7eee62b5d4e [Tests] Autogen all the LoopPredication tests new dae5ff2b7b8 Attempt to fix failing buildbot (ppc64le) new d109e2a7c3b [LoopPred] Delete the old condition expressions if unused new 6c21ccd245b [NVPTX] Fix the codegen for llvm.round.
The 13 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/include/clang/AST/ASTStructuralEquivalence.h | 4 + clang/include/clang/Basic/DiagnosticASTKinds.td | 72 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/lib/AST/ASTImporter.cpp | 28 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 161 ++-- clang/lib/Sema/SemaOpenMP.cpp | 357 +++++--- clang/test/OpenMP/allocate_messages.cpp | 2 + lld/COFF/DebugTypes.cpp | 4 +- .../postmortem/netbsd-core/1lwp_SIGSEGV.aarch64 | Bin 0 -> 9088 bytes .../netbsd-core/1lwp_SIGSEGV.aarch64.core | Bin 0 -> 225728 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64 | Bin 0 -> 13192 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64.core | Bin 0 -> 246936 bytes .../postmortem/netbsd-core/2lwp_t2_SIGSEGV.aarch64 | Bin 0 -> 11848 bytes .../netbsd-core/2lwp_t2_SIGSEGV.aarch64.core | Bin 0 -> 251904 bytes .../postmortem/netbsd-core/TestNetBSDCore.py | 15 + .../Plugins/Process/elf-core/ProcessElfCore.cpp | 26 + .../Plugins/Process/elf-core/RegisterUtilities.h | 5 + .../Plugins/Process/elf-core/ThreadElfCore.cpp | 3 + llvm/include/llvm/CodeGen/MachineBasicBlock.h | 11 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 5 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 13 +- llvm/lib/Target/AArch64/AArch64SystemOperands.td | 1 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 9 - .../AArch64/Disassembler/AArch64Disassembler.cpp | 27 - llvm/lib/Target/AMDGPU/AMDGPU.h | 6 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 12 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +- llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp | 417 --------- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 5 + llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 221 +++++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 + llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 21 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 104 ++- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 4 + llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 9 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 34 + .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 6 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 45 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 94 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 16 +- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 9 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 2 + llvm/lib/Target/X86/X86Subtarget.cpp | 6 + llvm/lib/Target/X86/X86Subtarget.h | 3 + .../InstCombine/InstCombineVectorOps.cpp | 9 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 5 + .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 5 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 8 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 4 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 4 +- llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir | 185 ---- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 3 - llvm/test/CodeGen/AMDGPU/wqm.mir | 2 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 188 ++++ llvm/test/CodeGen/NVPTX/f16-instructions.ll | 8 +- llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 13 +- llvm/test/CodeGen/NVPTX/math-intrins.ll | 12 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 80 ++ llvm/test/CodeGen/X86/testb-je-fusion.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-mte-error.s | 106 ++- llvm/test/MC/AArch64/armv8.5a-mte.s | 42 +- .../AArch64/armv8.5a-mte-unpredictable.txt | 7 - llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt | 31 +- .../Transforms/InstCombine/vec_gep_scalar_arg.ll | 16 + .../Transforms/InstSimplify/round-intrinsics.ll | 120 +++ llvm/test/Transforms/LoopPredication/basic.ll | 986 ++++++++++++++++----- .../basic_widenable_branch_guards.ll | 490 ++++++++-- .../Transforms/LoopPredication/invariant_load.ll | 246 +++++ llvm/test/Transforms/LoopPredication/nested.ll | 223 ++++- .../Transforms/LoopPredication/profitability.ll | 89 +- llvm/test/Transforms/LoopPredication/reverse.ll | 229 ++++- llvm/test/Transforms/LoopPredication/visited.ll | 42 +- llvm/test/Transforms/LoopPredication/widened.ll | 142 ++- llvm/utils/gn/secondary/lld/COFF/BUILD.gn | 1 + pstl/.clang-format | 3 + pstl/include/pstl/algorithm | 6 +- pstl/include/pstl/execution | 8 +- pstl/include/pstl/internal/algorithm_impl.h | 10 +- pstl/include/pstl/internal/glue_execution_defs.h | 6 +- pstl/include/pstl/internal/numeric_impl.h | 2 +- pstl/include/pstl/internal/parallel_backend.h | 2 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 2 +- pstl/include/pstl/internal/pstl_config.h | 98 +- pstl/include/pstl/memory | 6 +- pstl/include/pstl/numeric | 6 +- 92 files changed, 3720 insertions(+), 1530 deletions(-) create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp create mode 100644 llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp delete mode 100644 llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir create mode 100644 llvm/test/CodeGen/AMDGPU/wwm-reserved.ll create mode 100644 llvm/test/CodeGen/RISCV/codemodel-lowering.ll delete mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-mte-unpredictable.txt create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll create mode 100644 llvm/test/Transforms/InstSimplify/round-intrinsics.ll create mode 100644 llvm/test/Transforms/LoopPredication/invariant_load.ll