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from 34ac15c [PATCH 14/17][ARM] Add NEON FP16 instrinsics. new 66a55fc [PATCH 15/17][ARM] Add tests for ARMv8.2-A FP16 support. new f264556 [PATCH 16/17][ARM] Add tests for VFP FP16 ACLE instrinsics. new 5f4626d [PATCH 17/17][ARM] Add tests for NEON FP16 ACLE intrinsics.
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/testsuite/ChangeLog | 147 +++++++ .../advsimd-intrinsics/advsimd-intrinsics.exp | 5 +- .../aarch64/advsimd-intrinsics/binary_op_float.inc | 170 +++++++ .../aarch64/advsimd-intrinsics/binary_op_no64.inc | 57 ++- .../advsimd-intrinsics/binary_scalar_op.inc | 160 +++++++ .../aarch64/advsimd-intrinsics/cmp_fp_op.inc | 41 ++ .../aarch64/advsimd-intrinsics/cmp_op.inc | 80 ++++ .../aarch64/advsimd-intrinsics/cmp_zero_op.inc | 111 +++++ .../advsimd-intrinsics/ternary_scalar_op.inc | 206 +++++++++ .../aarch64/advsimd-intrinsics/unary_scalar_op.inc | 199 +++++++++ .../gcc.target/aarch64/advsimd-intrinsics/vabd.c | 57 ++- .../gcc.target/aarch64/advsimd-intrinsics/vabs.c | 28 ++ .../aarch64/advsimd-intrinsics/vabsh_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vadd.c | 31 ++ .../aarch64/advsimd-intrinsics/vaddh_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vcage.c | 10 + .../gcc.target/aarch64/advsimd-intrinsics/vcagt.c | 10 + .../gcc.target/aarch64/advsimd-intrinsics/vcale.c | 10 + .../gcc.target/aarch64/advsimd-intrinsics/vcalt.c | 10 + .../gcc.target/aarch64/advsimd-intrinsics/vceq.c | 18 + .../aarch64/advsimd-intrinsics/vceqz_1.c | 27 ++ .../gcc.target/aarch64/advsimd-intrinsics/vcge.c | 22 + .../aarch64/advsimd-intrinsics/vcgez_1.c | 30 ++ .../gcc.target/aarch64/advsimd-intrinsics/vcgt.c | 21 + .../aarch64/advsimd-intrinsics/vcgtz_1.c | 28 ++ .../gcc.target/aarch64/advsimd-intrinsics/vcle.c | 22 + .../aarch64/advsimd-intrinsics/vclez_1.c | 29 ++ .../gcc.target/aarch64/advsimd-intrinsics/vclt.c | 21 + .../aarch64/advsimd-intrinsics/vcltz_1.c | 27 ++ .../gcc.target/aarch64/advsimd-intrinsics/vcvt.c | 189 +++++++- .../aarch64/advsimd-intrinsics/vcvtX.inc | 113 +++++ .../aarch64/advsimd-intrinsics/vcvta_1.c | 33 ++ .../aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c | 52 +++ .../aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c | 52 +++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c | 99 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c | 99 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c | 100 +++++ .../aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c | 100 +++++ .../aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtm_1.c | 33 ++ .../aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtp_1.c | 33 ++ .../aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c | 53 +++ .../aarch64/advsimd-intrinsics/vdivh_f16_1.c | 42 ++ .../gcc.target/aarch64/advsimd-intrinsics/vfma.c | 46 +- .../aarch64/advsimd-intrinsics/vfmah_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vfms.c | 45 +- .../aarch64/advsimd-intrinsics/vfmsh_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vmax.c | 33 ++ .../aarch64/advsimd-intrinsics/vmaxnm_1.c | 47 ++ .../aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c | 42 ++ .../gcc.target/aarch64/advsimd-intrinsics/vmin.c | 37 ++ .../aarch64/advsimd-intrinsics/vminnm_1.c | 51 +++ .../aarch64/advsimd-intrinsics/vminnmh_f16_1.c | 42 ++ .../gcc.target/aarch64/advsimd-intrinsics/vmul.c | 35 ++ .../aarch64/advsimd-intrinsics/vmul_lane.c | 37 ++ .../gcc.target/aarch64/advsimd-intrinsics/vmul_n.c | 32 ++ .../aarch64/advsimd-intrinsics/vmulh_f16_1.c | 42 ++ .../gcc.target/aarch64/advsimd-intrinsics/vneg.c | 29 ++ .../aarch64/advsimd-intrinsics/vnegh_f16_1.c | 39 ++ .../aarch64/advsimd-intrinsics/vpXXX.inc | 15 + .../gcc.target/aarch64/advsimd-intrinsics/vpadd.c | 3 + .../gcc.target/aarch64/advsimd-intrinsics/vpmax.c | 3 + .../gcc.target/aarch64/advsimd-intrinsics/vpmin.c | 3 + .../gcc.target/aarch64/advsimd-intrinsics/vrecpe.c | 125 ++++++ .../gcc.target/aarch64/advsimd-intrinsics/vrecps.c | 98 +++++ .../gcc.target/aarch64/advsimd-intrinsics/vrnd.c | 8 + .../aarch64/advsimd-intrinsics/vrndX.inc | 20 + .../gcc.target/aarch64/advsimd-intrinsics/vrnda.c | 9 + .../aarch64/advsimd-intrinsics/vrndah_f16_1.c | 40 ++ .../aarch64/advsimd-intrinsics/vrndh_f16_1.c | 40 ++ .../aarch64/advsimd-intrinsics/vrndih_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vrndm.c | 9 + .../aarch64/advsimd-intrinsics/vrndmh_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vrndn.c | 9 + .../aarch64/advsimd-intrinsics/vrndnh_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vrndp.c | 8 + .../aarch64/advsimd-intrinsics/vrndph_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vrndx.c | 8 + .../aarch64/advsimd-intrinsics/vrndxh_f16_1.c | 40 ++ .../aarch64/advsimd-intrinsics/vrsqrte.c | 91 ++++ .../aarch64/advsimd-intrinsics/vrsqrts.c | 97 ++++ .../aarch64/advsimd-intrinsics/vsqrth_f16_1.c | 40 ++ .../gcc.target/aarch64/advsimd-intrinsics/vsub.c | 31 ++ .../aarch64/advsimd-intrinsics/vsubh_f16_1.c | 42 ++ gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c | 490 +++++++++++++++++++++ .../gcc.target/arm/armv8_2-fp16-scalar-1.c | 203 +++++++++ .../gcc.target/arm/armv8_2-fp16-scalar-2.c | 71 +++ gcc/testsuite/gcc.target/arm/attr-fp16-arith-1.c | 13 + 96 files changed, 5428 insertions(+), 17 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_op_f [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_scal [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/cmp_zero_op.inc create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ternary_sca [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_scala [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqz_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgez_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtz_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclez_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltz_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtX.inc create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvta_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32 [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtm_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtp_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnm_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnm_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_2-fp16-scalar-1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_2-fp16-scalar-2.c