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from 5f5e37dcbc1 MIPS: Use unaligned access to expand block_move on r6 new f4a2ae23389 Change MODE_BITSIZE to MODE_PRECISION for MODE_VECTOR_BOOL.
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Summary of changes: gcc/c-family/c-common.cc | 2 +- gcc/fortran/trans-types.cc | 2 +- gcc/go/go-lang.cc | 2 +- gcc/lto/lto-lang.cc | 2 +- gcc/rust/backend/rust-tree.cc | 2 +- gcc/simplify-rtx.cc | 10 ++++---- .../riscv/rvv/autovec/vls-vlmax/bitmask-1.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-10.c | 22 ++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-11.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-12.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-13.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-14.c | 24 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-2.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-3.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-4.c | 23 +++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-5.c | 25 ++++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-6.c | 27 +++++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-7.c | 30 ++++++++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-8.c | 30 ++++++++++++++++++++++ .../riscv/rvv/autovec/vls-vlmax/bitmask-9.c | 30 ++++++++++++++++++++++ gcc/tree.cc | 2 +- gcc/varasm.cc | 8 +++++- 22 files changed, 367 insertions(+), 12 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c