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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/glibc.
from 7b1cfba79e RISC-V: Use an autoconf template to produce `preconfigure' new 9403b71ae9 x86_64: Remove bzero optimization
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Summary of changes: sysdeps/x86_64/bzero.S | 1 - sysdeps/x86_64/memset.S | 10 +- sysdeps/x86_64/multiarch/Makefile | 1 - sysdeps/x86_64/multiarch/bzero.c | 106 --------------------- sysdeps/x86_64/multiarch/ifunc-impl-list.c | 42 -------- .../multiarch/memset-avx2-unaligned-erms-rtm.S | 1 - .../x86_64/multiarch/memset-avx2-unaligned-erms.S | 6 -- .../multiarch/memset-avx512-unaligned-erms.S | 3 - .../x86_64/multiarch/memset-evex-unaligned-erms.S | 3 - .../x86_64/multiarch/memset-sse2-unaligned-erms.S | 1 - .../x86_64/multiarch/memset-vec-unaligned-erms.S | 63 +----------- 11 files changed, 2 insertions(+), 235 deletions(-) delete mode 100644 sysdeps/x86_64/bzero.S delete mode 100644 sysdeps/x86_64/multiarch/bzero.c