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from 176cbb368e9 [SelectionDAG] ComputeKnownBits - add support for SMIN+SMAX [...] new 04c7451aa8d [AMDGPU] Make note of existing waitcnt instrs; this is add- [...] new d57c7490c56 bitcode support change for fast flags compatibility new 56fd21e66cb [X86] Reduce the number of isel pattern variations needed f [...] new c3ed6c4bc30 [X86] Stop swapping the operands of AVX512 setge.
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Summary of changes: include/llvm/Bitcode/LLVMBitCodes.h | 14 + lib/Bitcode/Reader/BitcodeReader.cpp | 16 +- lib/Bitcode/Writer/BitcodeWriter.cpp | 16 +- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 34 ++- lib/Target/X86/X86ISelLowering.cpp | 12 +- lib/Target/X86/X86InstrAVX512.td | 40 +-- test/Bitcode/compatibility-3.6.ll | 4 +- test/Bitcode/compatibility-3.7.ll | 4 +- test/Bitcode/compatibility-3.8.ll | 8 +- test/Bitcode/compatibility-3.9.ll | 8 +- test/Bitcode/compatibility-4.0.ll | 8 +- test/Bitcode/compatibility-5.0.ll | 8 +- test/CodeGen/AMDGPU/waitcnt-no-redundant.mir | 23 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 8 +- test/CodeGen/X86/avx512-vec-cmp.ll | 10 +- test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll | 16 +- test/CodeGen/X86/avx512bw-vec-cmp.ll | 6 +- test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll | 16 +- test/CodeGen/X86/avx512bwvl-vec-cmp.ll | 12 +- test/CodeGen/X86/avx512f-vec-test-testn.ll | 32 +++ test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 16 +- test/CodeGen/X86/avx512vl-vec-cmp.ll | 44 +-- test/CodeGen/X86/avx512vl-vec-masked-cmp.ll | 332 +++++++++++----------- 23 files changed, 365 insertions(+), 322 deletions(-)