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from 351641203ef [TableGen] Change std::sort to llvm::sort in response to r327219 new 839cd7ff05c [RISCV] Tablegen-driven Instruction Compression.
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Summary of changes: include/llvm/MC/MCInst.h | 2 + lib/MC/MCInst.cpp | 18 + lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 +- lib/Target/RISCV/CMakeLists.txt | 1 + lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp | 16 +- lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 1 + lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h | 1 + lib/Target/RISCV/RISCVAsmPrinter.cpp | 11 + lib/Target/RISCV/RISCVInstrInfo.td | 32 + lib/Target/RISCV/RISCVInstrInfoC.td | 263 ++++++- test/CodeGen/RISCV/alu32.ll | 42 ++ test/CodeGen/RISCV/branch.ll | 32 + test/CodeGen/RISCV/compress-Pseudo.ll | 10 + test/CodeGen/RISCV/compress-inline-asm.ll | 15 + test/MC/RISCV/cnop.s | 2 +- test/MC/RISCV/compress-cjal.s | 17 + test/MC/RISCV/compress-rv32d.s | 44 ++ test/MC/RISCV/compress-rv32f.s | 32 + test/MC/RISCV/compress-rv32i.s | 207 ++++++ test/MC/RISCV/compress-rv64i.s | 60 ++ test/MC/RISCV/compressed-relocations.s | 20 + test/MC/RISCV/fixups-compressed.s | 2 +- test/MC/RISCV/relocations.s | 14 +- test/MC/RISCV/rv32-relaxation.s | 26 +- test/MC/RISCV/rv64-relaxation.s | 22 +- utils/TableGen/CMakeLists.txt | 1 + utils/TableGen/RISCVCompressInstEmitter.cpp | 806 ++++++++++++++++++++++ utils/TableGen/TableGen.cpp | 6 + utils/TableGen/TableGenBackends.h | 1 + 29 files changed, 1672 insertions(+), 44 deletions(-) create mode 100644 test/CodeGen/RISCV/compress-Pseudo.ll create mode 100644 test/CodeGen/RISCV/compress-inline-asm.ll create mode 100644 test/MC/RISCV/compress-cjal.s create mode 100644 test/MC/RISCV/compress-rv32d.s create mode 100644 test/MC/RISCV/compress-rv32f.s create mode 100644 test/MC/RISCV/compress-rv32i.s create mode 100644 test/MC/RISCV/compress-rv64i.s create mode 100644 test/MC/RISCV/compressed-relocations.s create mode 100644 utils/TableGen/RISCVCompressInstEmitter.cpp