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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allnoconfig in repository toolchain/ci/gcc.
from 74b5b8dec46 testsuite: Prevent spellcheck-inttypes failures on AIX. adds adcf8a11c77 c++: Name lookup simplifications adds dec881f85ab x86: Replace <enqcmdntrin.h> with <enqcmdintrin.h> adds 7cbfe0894de c++: Hiddenness is a property of the symbol table adds 9b4b1ed50f1 analyzer: silence -Wsign-compare warnings adds f836f3bc8f7 aarch64: add support for Cortex-X1 adds 0eef5eea2b4 arm: add support for Cortex-X1 adds 6649df18f98 Fix GCC 10+ build failure with zstd version 1.2.0 or older. adds d60d63a00bb analyzer: fix signal-handler registration location [PR95188] adds 01852cc865c testsuite: Remove unnecessary DWARF2 xfails on AIX adds 969baf03acd c++: Implement -Wrange-loop-construct [PR94695] adds 873f8c1e6df Correct and improve -Wnonnull for calls to functions with V [...] adds 58614b10edc rs6000: Use parameterized names for tablejump adds 93bca37c0a6 Daily bump. adds ac001f5ce60 Re: rs6000: Use parameterized names for tablejump adds de2c1d00f27 gcc/configure typo fix adds f63023fafbb arm: Fix ICEs in no-literal-pool.c on MVE [PR97251] adds d4f9e819760 aarch64: Tweak movti and movtf patterns adds 135b043196b PR target/96313 AArch64: vqmovun* return types should be unsigned adds 2d8fbebdb1e PR target/97150 AArch64: 2nd parameter of unsigned Neon sca [...] adds 7d131029918 testsuite: Fix up amx* dg-do run tests with older binutils adds 92e652d8c21 i386: Define __LAHF_SAHF__ and __MOVBE__ macros, based on I [...] adds 4c0eb14bc85 [testsuite] Re-enable pr94600-{1,3}.c tests for arm adds 46183c96d2a x86: Use SET operation in MOVDIRI and MOVDIR64B adds bae974e6374 [nvptx] Add type arg to TARGET_LIBC_HAS_FUNCTION adds fcc4891d7f3 This patch fixes PR97045 - unlimited polymorphic array elem [...] adds 8b0a63e47cd OpenMP: Add implicit declare target for nested procedures adds 65167982efa Fortran: add contiguous check for ptr assignment, fix non-c [...] adds 734eed68537 c++: Kill DECL_HIDDEN_FRIEND_P adds aa248b8db9a middle-end: Refactor refcnt to use SLP_TREE_REF_COUNT for c [...] adds 97b798d80ba [SLP][VECT] Add check to fix 96837 adds 6bd4ce64eb4 [GCC][PATCH] arm: Fix MVE intrinsics polymorphic variants w [...] new b6860cb96d0 aarch64: add support for Cortex-A78 and Cortex-A78AE new 60e4b3cade5 arm: add support for Cortex-A78 and Cortex-A78AE new 9ff2bcd9df8 amend SLP reduction testcases new ef11f5b37b0 arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595] new 373b99dc409 Add a testcase for PR target/96827 new 1814c828a02 Add trailing dots so length of spec string matches number o [...] new ecd700c1bc6 Fix some fnspec strings in trans-decl.c
The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/ChangeLog | 135 ++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 14 + gcc/analyzer/constraint-manager.cc | 6 +- gcc/analyzer/engine.cc | 24 +- gcc/builtins.c | 4 +- gcc/builtins.def | 20 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c.opt | 4 + gcc/calls.c | 115 +++-- gcc/config/aarch64/aarch64-cores.def | 3 + gcc/config/aarch64/aarch64-simd-builtins.def | 2 +- gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aarch64/aarch64.c | 9 +- gcc/config/aarch64/aarch64.md | 17 +- gcc/config/aarch64/arm_neon.h | 36 +- gcc/config/arm/arm-cpus.in | 33 ++ gcc/config/arm/arm-tables.opt | 9 + gcc/config/arm/arm-tune.md | 1 + gcc/config/arm/arm.md | 4 +- gcc/config/arm/arm_mve.h | 167 ++++---- gcc/config/arm/vfp.md | 4 +- gcc/config/darwin-protos.h | 2 +- gcc/config/darwin.c | 3 +- gcc/config/i386/enqcmdintrin.h | 8 +- gcc/config/i386/i386-c.c | 4 + gcc/config/i386/i386.c | 2 +- gcc/config/i386/i386.md | 20 +- gcc/config/linux-protos.h | 2 +- gcc/config/linux.c | 3 +- gcc/config/nvptx/nvptx.c | 20 + gcc/config/rs6000/rs6000.md | 103 ++--- gcc/configure | 13 +- gcc/configure.ac | 9 +- gcc/convert.c | 8 +- gcc/cp/ChangeLog | 52 +++ gcc/cp/call.c | 32 +- gcc/cp/cp-tree.h | 12 +- gcc/cp/decl.c | 31 +- gcc/cp/name-lookup.c | 466 +++++++++++++-------- gcc/cp/name-lookup.h | 7 + gcc/cp/parser.c | 68 ++- gcc/cp/pt.c | 32 +- gcc/cp/tree.c | 30 +- gcc/doc/invoke.texi | 27 +- gcc/doc/tm.texi | 7 +- gcc/fortran/expr.c | 26 +- gcc/fortran/f95-lang.c | 4 +- gcc/fortran/trans-array.c | 15 +- gcc/fortran/trans-decl.c | 26 +- gcc/fortran/trans-expr.c | 3 +- gcc/fortran/trans-io.c | 46 +- gcc/fortran/trans-stmt.c | 1 + gcc/fortran/trans.c | 23 +- gcc/match.pd | 6 +- gcc/omp-offload.c | 7 + gcc/target.def | 7 +- gcc/targhooks.c | 9 +- gcc/targhooks.h | 6 +- gcc/testsuite/ChangeLog | 94 +++++ gcc/testsuite/g++.dg/debug/dwarf2/align-1.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/align-2.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/align-3.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/align-4.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/align-5.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/align-6.C | 2 +- .../debug/dwarf2/defaulted-member-function-1.C | 2 +- .../debug/dwarf2/defaulted-member-function-2.C | 2 +- .../debug/dwarf2/defaulted-member-function-3.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/inline-var-1.C | 10 +- gcc/testsuite/g++.dg/debug/dwarf2/inline-var-2.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/inline-var-3.C | 12 +- .../g++.dg/debug/dwarf2/noreturn-function.C | 2 +- gcc/testsuite/g++.dg/debug/dwarf2/ptrdmem-1.C | 4 +- gcc/testsuite/g++.dg/debug/dwarf2/ref-2.C | 4 +- gcc/testsuite/g++.dg/debug/dwarf2/ref-3.C | 10 +- gcc/testsuite/g++.dg/debug/dwarf2/ref-4.C | 6 +- gcc/testsuite/g++.dg/debug/dwarf2/refqual-1.C | 4 +- gcc/testsuite/g++.dg/debug/dwarf2/refqual-2.C | 4 +- gcc/testsuite/g++.dg/warn/Wrange-loop-construct.C | 207 +++++++++ gcc/testsuite/gcc.dg/Wnonnull-4.c | 173 ++++++++ gcc/testsuite/gcc.dg/Wstringop-overflow-23.c | 12 +- .../gcc.dg/analyzer/signal-registration-loc.c | 23 + gcc/testsuite/gcc.dg/debug/dwarf2/align-1.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-2.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-3.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-4.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-5.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-6.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/align-as-1.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/inline5.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/lang-c89.c | 2 +- .../debug/dwarf2/noreturn-function-attribute.c | 2 +- .../debug/dwarf2/noreturn-function-keyword.c | 2 +- gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c | 2 +- gcc/testsuite/gcc.dg/pr94600-1.c | 4 +- gcc/testsuite/gcc.dg/pr94600-3.c | 4 +- gcc/testsuite/gcc.dg/vect/bb-slp-49.c | 28 ++ gcc/testsuite/gcc.dg/vect/pr37027.c | 2 +- gcc/testsuite/gcc.dg/vect/pr67790.c | 1 + gcc/testsuite/gcc.dg/vect/pr92324-4.c | 2 + gcc/testsuite/gcc.dg/vect/pr92558.c | 2 + gcc/testsuite/gcc.dg/vect/pr95495.c | 2 + gcc/testsuite/gcc.dg/vect/slp-reduc-1.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-2.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-3.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-5.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-7.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-in-order-4.c | 1 + gcc/testsuite/gcc.target/aarch64/movtf_1.c | 87 ++++ gcc/testsuite/gcc.target/aarch64/movti_1.c | 87 ++++ gcc/testsuite/gcc.target/aarch64/pr96313.c | 8 + gcc/testsuite/gcc.target/aarch64/pr97150.c | 14 + .../gcc.target/aarch64/scalar_intrinsics.c | 6 +- .../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 +++ .../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 ++ .../arm/mve/intrinsics/vaddq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vaddq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vaddq_x_n_f16-1.c | 12 + .../arm/mve/intrinsics/vaddq_x_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpeqq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpeqq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpgeq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpgeq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpgtq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpgtq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpleq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpleq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpleq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpleq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpltq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpltq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpltq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpltq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpneq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpneq_m_n_f32-1.c | 12 + .../arm/mve/intrinsics/vcmpneq_n_f16-1.c | 12 + .../arm/mve/intrinsics/vcmpneq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 + .../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 + .../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 + .../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 + .../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 + .../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 + .../arm/mve/intrinsics/vminnmavq_f16-1.c | 12 + .../arm/mve/intrinsics/vminnmavq_f32-1.c | 12 + .../arm/mve/intrinsics/vminnmavq_p_f16-1.c | 12 + .../arm/mve/intrinsics/vminnmavq_p_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c | 12 + .../arm/mve/intrinsics/vminnmvq_p_f16-1.c | 12 + .../arm/mve/intrinsics/vminnmvq_p_f32-1.c | 12 + .../arm/mve/intrinsics/vmulq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vmulq_m_n_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vmulq_x_n_f16-1.c | 12 + .../arm/mve/intrinsics/vmulq_x_n_f32-1.c | 12 + .../arm/mve/intrinsics/vsetq_lane_f16-1.c | 13 + .../arm/mve/intrinsics/vsetq_lane_f32-1.c | 13 + .../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 + .../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c | 12 + .../gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c | 12 + .../arm/mve/intrinsics/vsubq_x_n_f16-1.c | 13 + .../arm/mve/intrinsics/vsubq_x_n_f32-1.c | 13 + gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +- gcc/testsuite/gcc.target/i386/amxbf16-dpbf16ps-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbssd-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbsud-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbusd-2.c | 2 + gcc/testsuite/gcc.target/i386/amxint8-dpbuud-2.c | 2 + gcc/testsuite/gcc.target/i386/amxtile-2.c | 1 + gcc/testsuite/gcc.target/i386/movdir64b.c | 23 + gcc/testsuite/gcc.target/i386/movdiri32.c | 20 + gcc/testsuite/gcc.target/i386/movdiri64.c | 20 + gcc/testsuite/gcc.target/i386/pr96827.c | 41 ++ gcc/testsuite/gfortran.dg/contiguous_11.f90 | 45 ++ gcc/testsuite/gfortran.dg/contiguous_4.f90 | 6 +- gcc/testsuite/gfortran.dg/contiguous_7.f90 | 16 +- gcc/testsuite/gfortran.dg/select_type_50.f90 | 52 +++ gcc/testsuite/lib/target-supports.exp | 17 + gcc/tree-ssa-math-opts.c | 8 +- gcc/tree-vect-slp.c | 22 +- gcc/tree-vectorizer.h | 1 + libgcc/ChangeLog | 5 + libgomp/ChangeLog | 13 + .../testsuite/libgomp.fortran/declare-target-3.f90 | 45 ++ 210 files changed, 3188 insertions(+), 665 deletions(-) create mode 100644 gcc/testsuite/g++.dg/warn/Wrange-loop-construct.C create mode 100644 gcc/testsuite/gcc.dg/Wnonnull-4.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/signal-registration-loc.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-49.c create mode 100644 gcc/testsuite/gcc.target/aarch64/movtf_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/movti_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96313.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr97150.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c create mode 100644 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