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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb.
from d4e8e096a5 Automatic date update in version.in adds 2b014cc535 gdb: Support the c.mv insn in the riscv prologue scanner. adds 0a9bddab0f gdb: Fix comment in riscv_scan_prologue adds 46039d3632 sim: ppc: fallback when ln is not available [PR sim/18864] adds 39d53d0435 sim: filter out SIGSTKSZ [PR sim/28302]
No new revisions were added by this update.
Summary of changes: gdb/riscv-tdep.c | 15 ++++++-- ...h-ld-lw.c => riscv64-unwind-prologue-with-mv.c} | 13 ++++--- ...-lw.exp => riscv64-unwind-prologue-with-mv.exp} | 6 ++-- ...h-ld-lw.c => riscv64-unwind-prologue-with-mv.s} | 41 +++++++++++++++------- sim/arch-subdir.mk.in | 1 + sim/bfin/linux-targ-map.h | 5 +-- sim/common/gennltvals.py | 6 ++-- sim/common/nltvals.def | 1 - sim/ppc/Makefile.in | 4 +-- 9 files changed, 59 insertions(+), 33 deletions(-) copy gdb/testsuite/gdb.arch/{riscv64-unwind-prologue-with-ld-lw.c => riscv64-unwin [...] copy gdb/testsuite/gdb.arch/{riscv64-unwind-prologue-with-ld-lw.exp => riscv64-unw [...] copy gdb/testsuite/gdb.arch/{riscv64-unwind-prologue-with-ld-lw.c => riscv64-unwin [...]