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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project.
from 6ada70d1b55 [X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/f [...] adds b5088aa9442 [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - u [...] adds 0a15981a84b [MSP430] Shift Amount Threshold in DAGCombine (Baseline Tes [...] adds 7d8ea71677f [ARM] Add dependency on GlobalISel for unit tests to fix sh [...] adds a298964d22a [TargetLowering][DAGCombine][MSP430] add/use hook for Shift [...] adds 10213b90730 [X86] Pulled out helper to decode target shuffle element se [...] adds 1d509201e2d [SCEV] Simplify umin/max of zext and sext of the same value adds 722b6189245 eliminate nontrivial Reset(...) from TypedPythonObject adds 8a8b317460f AMDGPU: Don't error on calls to null or undef adds 5b8546023f3 Fix minor warning in DWARFVerifier.
No new revisions were added by this update.
Summary of changes: .../ScriptInterpreter/Python/PythonDataObjects.cpp | 35 +- .../ScriptInterpreter/Python/PythonDataObjects.h | 57 ++- .../Python/ScriptInterpreterPython.cpp | 22 +- .../Python/PythonDataObjectsTests.cpp | 10 +- llvm/include/llvm/CodeGen/TargetLowering.h | 6 + llvm/lib/Analysis/ScalarEvolution.cpp | 35 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 26 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 9 + llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 3 + llvm/lib/Target/MSP430/MSP430ISelLowering.h | 2 + llvm/lib/Target/X86/X86ISelLowering.cpp | 45 ++- .../max-trip-count-address-space.ll | 2 +- .../Analysis/ScalarEvolution/max-trip-count.ll | 2 +- llvm/test/Analysis/ScalarEvolution/sext-mul.ll | 4 +- .../Analysis/ScalarEvolution/umin-umax-folds.ll | 88 ++--- llvm/test/CodeGen/AMDGPU/call-constant.ll | 45 +++ llvm/test/CodeGen/AMDGPU/unsupported-calls.ll | 10 + llvm/test/CodeGen/MSP430/shift-amount-threshold.ll | 170 +++++++++ llvm/test/CodeGen/X86/bitcast-and-setcc-128.ll | 10 +- llvm/test/CodeGen/X86/bitcast-setcc-128.ll | 2 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 30 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 404 +++++++++++---------- llvm/test/CodeGen/X86/vector-sext.ll | 129 +++---- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 16 +- llvm/test/CodeGen/X86/widen_conv-3.ll | 8 +- llvm/unittests/Target/ARM/CMakeLists.txt | 1 + 27 files changed, 753 insertions(+), 422 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/call-constant.ll create mode 100644 llvm/test/CodeGen/MSP430/shift-amount-threshold.ll