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from 5d7be27bf7e var-tracking: Add entry values up to max register mode new 03f3365742a RISC-V: Add ABI-defined RVV types.
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Summary of changes: gcc/config.gcc | 1 + gcc/config/riscv/riscv-builtins.cc | 2 + gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv-vector-builtins.cc | 279 +++++++++++++++++++++ gcc/config/riscv/riscv-vector-builtins.def | 199 +++++++++++++++ gcc/config/riscv/riscv-vector-builtins.h | 79 ++++++ gcc/config/riscv/riscv-vector-switch.def | 164 ++++++++++++ gcc/config/riscv/riscv.cc | 95 ++++++- gcc/config/riscv/t-riscv | 10 + gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-2.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-3.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-4.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-5.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-6.c | 63 +++++ gcc/testsuite/gcc.target/riscv/rvv/base/abi-7.c | 63 +++++ .../gcc.target/riscv/{riscv.exp => rvv/rvv.exp} | 14 +- 17 files changed, 1279 insertions(+), 6 deletions(-) create mode 100644 gcc/config/riscv/riscv-vector-builtins.cc create mode 100644 gcc/config/riscv/riscv-vector-builtins.def create mode 100644 gcc/config/riscv/riscv-vector-builtins.h create mode 100644 gcc/config/riscv/riscv-vector-switch.def create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-7.c copy gcc/testsuite/gcc.target/riscv/{riscv.exp => rvv/rvv.exp} (79%)