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from 004afb984be Treat undefined operands as varying in GORI. new d70720c2382 middle-end: convert negate + right shift into compare greater. new 1b4a63593bc AArch64: Lower intrinsics shift to GIMPLE when possible.
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Summary of changes: gcc/config/aarch64/aarch64-builtins.c | 48 +++++++++++++++ gcc/config/aarch64/aarch64-simd-builtins.def | 2 +- gcc/config/aarch64/arm_neon.h | 14 ++--- gcc/match.pd | 36 ++++++++++- gcc/testsuite/gcc.dg/signbit-2.c | 19 ++++++ gcc/testsuite/gcc.dg/signbit-3.c | 13 ++++ gcc/testsuite/gcc.dg/signbit-4.c | 65 +++++++++++++++++++ gcc/testsuite/gcc.dg/signbit-5.c | 65 +++++++++++++++++++ gcc/testsuite/gcc.dg/signbit-6.c | 72 ++++++++++++++++++++++ .../aarch64/advsimd-intrinsics/vshl-opt-1.c | 11 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-2.c | 11 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-3.c | 11 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-4.c | 11 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-5.c | 12 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-6.c | 10 +++ .../aarch64/advsimd-intrinsics/vshl-opt-7.c | 12 ++++ .../aarch64/advsimd-intrinsics/vshl-opt-8.c | 10 +++ gcc/testsuite/gcc.target/aarch64/signbit-1.c | 20 ++++++ gcc/testsuite/gcc.target/aarch64/signbit-2.c | 36 +++++++++++ 19 files changed, 469 insertions(+), 9 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/signbit-2.c create mode 100644 gcc/testsuite/gcc.dg/signbit-3.c create mode 100644 gcc/testsuite/gcc.dg/signbit-4.c create mode 100644 gcc/testsuite/gcc.dg/signbit-5.c create mode 100644 gcc/testsuite/gcc.dg/signbit-6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl-opt-8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/signbit-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/signbit-2.c