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from 17f7b625062 Handle auto-fdo 0 more carefully new f4456ea9e95 RISC-V: Leverage vaadd.vv for signed standard name avg_floor new ef0c2ed1382 RISC-V: Reconcile the existing test for avg_floor new d4a2f9ba6ec RISC-V: Add test cases for avg_floor vaadd implementation
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Summary of changes: gcc/config/riscv/autovec.md | 19 +-- gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h | 23 +++ .../gcc.target/riscv/rvv/autovec/avg_data.h | 185 +++++++++++++++++++++ .../riscv/rvv/autovec/avg_floor-1-i16-from-i32.c | 12 ++ .../riscv/rvv/autovec/avg_floor-1-i16-from-i64.c | 12 ++ .../riscv/rvv/autovec/avg_floor-1-i32-from-i64.c | 12 ++ .../riscv/rvv/autovec/avg_floor-1-i8-from-i16.c | 12 ++ .../riscv/rvv/autovec/avg_floor-1-i8-from-i32.c | 12 ++ .../riscv/rvv/autovec/avg_floor-1-i8-from-i64.c | 12 ++ .../rvv/autovec/avg_floor-run-1-i16-from-i32.c | 16 ++ .../rvv/autovec/avg_floor-run-1-i16-from-i64.c | 16 ++ .../rvv/autovec/avg_floor-run-1-i32-from-i64.c | 16 ++ .../rvv/autovec/avg_floor-run-1-i8-from-i16.c | 16 ++ .../rvv/autovec/avg_floor-run-1-i8-from-i32.c | 16 ++ .../rvv/autovec/avg_floor-run-1-i8-from-i64.c | 16 ++ .../gcc.target/riscv/rvv/autovec/avg_run.h | 26 +++ .../gcc.target/riscv/rvv/autovec/vls/avg-1.c | 5 +- .../gcc.target/riscv/rvv/autovec/vls/avg-2.c | 5 +- .../gcc.target/riscv/rvv/autovec/vls/avg-3.c | 5 +- .../riscv/rvv/autovec/widen/vec-avg-rv32gcv.c | 7 +- .../riscv/rvv/autovec/widen/vec-avg-rv64gcv.c | 7 +- 21 files changed, 418 insertions(+), 32 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16- [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16- [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32- [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-f [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-f [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-f [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_run.h