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from c5f26069a5d [X86] When lowering v32i8 MULHS/MULHU, shuffle after the PA [...] new 2ef0c6283a6 [NVPTX] Implement isLegalToVectorizeLoadChain new 7ac9af102fe [PowerPC][MC] Support expressions in getMemRIX16Encoding.
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Summary of changes: lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 13 ++++++++ .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 12 +++++-- test/CodeGen/NVPTX/vectorize-misaligned.ll | 29 +++++++++++++++++ test/MC/PowerPC/ppc64-dq-expr.s | 38 ++++++++++++++++++++++ 4 files changed, 89 insertions(+), 3 deletions(-) create mode 100644 test/CodeGen/NVPTX/vectorize-misaligned.ll create mode 100644 test/MC/PowerPC/ppc64-dq-expr.s