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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/binutils-gdb.
from da7ee7f9ce Fix build with current GCC: EL_EXPLICIT(location) always non-NULL adds 64f5c8167b Regenerate a couple of files adds 7aba54da42 PowerPC64 @notoc in non-power10 code adds daad0428f2 -Waddress fixes for gold testsuite adds 7b2ec4e46f sim: bfin: fix mach/xfail usage in tests adds e8f20a28b1 sim: split program path out of argv vector adds 852016f921 sim: run: add --argv0 option to control argv[0] adds 565cbe4b91 sim: cris: replace custom "dest" test field with new --argv0 adds 145a603abc sim: cris: touch up rvdummy handling adds 7770da9714 sim: run: fix crash in argc==0 error situation adds e6c46d0772 sim: cris: make error message test a little more flexible
No new revisions were added by this update.
Summary of changes: bfd/bfd-in2.h | 1 + bfd/elf64-ppc.c | 741 ++++++++++++-------------- bfd/libbfd.h | 1 + bfd/reloc.c | 2 + gas/config/tc-ppc.c | 7 + gold/testsuite/common_test_1.c | 16 +- gold/testsuite/common_test_1_v1.c | 16 +- gold/testsuite/common_test_1_v2.c | 16 +- gold/testsuite/script_test_2.cc | 8 +- include/elf/ppc64.h | 1 + intl/configure | 4 +- ld/Makefile.am | 4 +- ld/Makefile.in | 5 +- ld/testsuite/ld-powerpc/callstub-2.s | 1 + sim/aarch64/interp.c | 5 +- sim/arm/wrapper.c | 5 +- sim/avr/interp.c | 5 +- sim/bfin/interp.c | 5 +- sim/bpf/sim-if.c | 5 +- sim/common/nrun.c | 4 +- sim/common/sim-base.h | 9 + sim/common/sim-options.c | 37 +- sim/common/sim-utils.c | 2 + sim/cr16/interp.c | 5 +- sim/cris/Makefile.in | 4 +- sim/cris/sim-if.c | 10 +- sim/d10v/interp.c | 5 +- sim/example-synacor/interp.c | 5 +- sim/frv/sim-if.c | 6 +- sim/ft32/interp.c | 5 +- sim/h8300/compile.c | 5 +- sim/iq2000/sim-if.c | 6 +- sim/lm32/sim-if.c | 5 +- sim/m32r/sim-if.c | 6 +- sim/m68hc11/interp.c | 5 +- sim/mcore/interp.c | 5 +- sim/microblaze/interp.c | 5 +- sim/mips/interp.c | 6 +- sim/mn10300/interp.c | 6 +- sim/moxie/interp.c | 5 +- sim/msp430/msp430-sim.c | 5 +- sim/or1k/sim-if.c | 5 +- sim/pru/interp.c | 5 +- sim/riscv/interp.c | 5 +- sim/sh/interp.c | 5 +- sim/testsuite/bfin/se_all32bitopcodes.S | 4 +- sim/testsuite/bfin/se_all64bitg0opcodes.S | 4 +- sim/testsuite/bfin/se_illegalcombination.S | 2 +- sim/testsuite/bfin/se_undefinedinstruction3.S | 2 +- sim/testsuite/cris/asm/opterr3.ms | 2 +- sim/testsuite/cris/c/c.exp | 6 +- sim/testsuite/cris/c/readlink11.c | 3 +- sim/testsuite/cris/c/readlink5.c | 2 +- sim/testsuite/cris/c/readlink6.c | 2 +- sim/v850/interp.c | 6 +- 55 files changed, 480 insertions(+), 572 deletions(-)