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from 7feea4e245b [AArch64] Fix scheduling info for INS(vector, general) inst [...] new adabd2ad348 [asan] Give global metadata private linkage. new 3bca0534eec AMDGPU: Prune unecessary include new 651ac560976 AMDGPU: Fix folding reg_sequence into copy to phys reg new 938bfaf893c AMDGPU: Refactor argument lowering new 56db90276b4 AMDGPU: Refactor SIMachineFunctionInfo slightly new 8c86ad544bb AMDGPU: Insert wait at start of callee functions
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Summary of changes: lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 23 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 4 +- lib/Target/AMDGPU/AMDGPURegisterInfo.h | 2 - lib/Target/AMDGPU/R600ISelLowering.cpp | 2 +- lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 4 + lib/Target/AMDGPU/SIISelLowering.cpp | 574 ++++++++++++--------- lib/Target/AMDGPU/SIISelLowering.h | 16 +- lib/Target/AMDGPU/SIInsertWaits.cpp | 14 + lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 42 +- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 13 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 4 + lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 23 +- .../Instrumentation/AddressSanitizer.cpp | 11 +- .../AMDGPU/amdgpu-shader-calling-convention.ll | 5 +- test/CodeGen/AMDGPU/calling-conventions.ll | 14 +- test/CodeGen/AMDGPU/hsa-func.ll | 2 +- test/CodeGen/AMDGPU/inline-asm.ll | 13 + test/CodeGen/AMDGPU/insert-waits-callee.mir | 25 + .../AddressSanitizer/global_metadata_windows.ll | 2 +- 20 files changed, 486 insertions(+), 309 deletions(-) create mode 100644 test/CodeGen/AMDGPU/insert-waits-callee.mir