[Tcwg-commits] [toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2_LTO updated (1537de9ce4c -> f397b0a13ad)

7 Jul 2023


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2_LTO
in repository toolchain/ci/base-artifacts.
from  1537de9ce4c onsuccess: #34: 1: [TCWG CI] https://ci.linaro.org/job/tcwg [...]
       new  f397b0a13ad onsuccess: #36: 1: [TCWG CI] https://ci.linaro.org/job/tcwg [...]
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 01-reset_artifacts/console.log.xz                  |    Bin 2088 -> 2120 bytes
 02-build_bmk_llvm/console.log.xz                   |    Bin 237224 -> 242100 bytes
 03-benchmark/benchmark-build.log                   |    146 +-
 03-benchmark/benchmark.log                         |    144 +-
 03-benchmark/console.log.xz                        |    Bin 3872 -> 5488 bytes
 04-check_regression/bmk-specific-variability.csv   |      2 +-
 04-check_regression/console.log.xz                 |    Bin 2932 -> 3212 bytes
 annex/bmk-data/csv_results/md5sum.csv              |      1 +
 annex/bmk-data/csv_results/perf.csv                |      1 +
 annex/bmk-data/csv_results/results.csv             |      1 +
 annex/bmk-data/csv_results/size.csv                |      1 +
 annex/bmk-data/csv_results/sve.csv                 |      1 +
 annex/bmk-data/csv_results/vect.csv                |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.10       |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.12       |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.14       |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.3        |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.4        |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.5        |      1 +
 .../CPU2017.parallel.fprate.train.cfg.run.6        |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.10       |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.12       |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.14       |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.3        |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.4        |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.5        |      1 +
 .../CPU2017.parallel.fprate.train.csv.run.6        |      1 +
 ...CPU2017.parallel.fprate.train.flags.html.run.10 |      1 +
 ...CPU2017.parallel.fprate.train.flags.html.run.12 |      1 +
 ...CPU2017.parallel.fprate.train.flags.html.run.14 |      1 +
 .../CPU2017.parallel.fprate.train.flags.html.run.3 |      1 +
 .../CPU2017.parallel.fprate.train.flags.html.run.4 |      1 +
 .../CPU2017.parallel.fprate.train.flags.html.run.5 |      1 +
 .../CPU2017.parallel.fprate.train.flags.html.run.6 |      1 +
 .../CPU2017.parallel.fprate.train.html.run.10      |      1 +
 .../CPU2017.parallel.fprate.train.html.run.12      |      1 +
 .../CPU2017.parallel.fprate.train.html.run.14      |      1 +
 .../CPU2017.parallel.fprate.train.html.run.3       |      1 +
 .../CPU2017.parallel.fprate.train.html.run.4       |      1 +
 .../CPU2017.parallel.fprate.train.html.run.5       |      1 +
 .../CPU2017.parallel.fprate.train.html.run.6       |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.10  |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.12  |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.14  |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.3   |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.4   |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.5   |      1 +
 .../CPU2017.parallel.fprate.train.orig.cfg.run.6   |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.10       |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.12       |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.14       |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.3        |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.4        |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.5        |      1 +
 .../CPU2017.parallel.fprate.train.pdf.run.6        |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.10       |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.12       |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.14       |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.3        |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.4        |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.5        |      1 +
 .../CPU2017.parallel.fprate.train.rsf.run.6        |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.10       |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.12       |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.14       |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.3        |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.4        |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.5        |      1 +
 .../CPU2017.parallel.fprate.train.txt.run.6        |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.0       |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.1       |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.11      |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.13      |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.15      |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.2       |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.7       |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.8       |      1 +
 .../CPU2017.parallel.intrate.train.cfg.run.9       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.0       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.1       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.11      |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.13      |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.15      |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.2       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.7       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.8       |      1 +
 .../CPU2017.parallel.intrate.train.csv.run.9       |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.0 |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.1 |      1 +
 ...PU2017.parallel.intrate.train.flags.html.run.11 |      1 +
 ...PU2017.parallel.intrate.train.flags.html.run.13 |      1 +
 ...PU2017.parallel.intrate.train.flags.html.run.15 |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.2 |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.7 |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.8 |      1 +
 ...CPU2017.parallel.intrate.train.flags.html.run.9 |      1 +
 .../CPU2017.parallel.intrate.train.html.run.0      |      1 +
 .../CPU2017.parallel.intrate.train.html.run.1      |      1 +
 .../CPU2017.parallel.intrate.train.html.run.11     |      1 +
 .../CPU2017.parallel.intrate.train.html.run.13     |      1 +
 .../CPU2017.parallel.intrate.train.html.run.15     |      1 +
 .../CPU2017.parallel.intrate.train.html.run.2      |      1 +
 .../CPU2017.parallel.intrate.train.html.run.7      |      1 +
 .../CPU2017.parallel.intrate.train.html.run.8      |      1 +
 .../CPU2017.parallel.intrate.train.html.run.9      |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.0  |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.1  |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.11 |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.13 |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.15 |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.2  |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.7  |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.8  |      1 +
 .../CPU2017.parallel.intrate.train.orig.cfg.run.9  |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.0       |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.1       |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.11      |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.13      |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.15      |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.2       |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.7       |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.8       |      1 +
 .../CPU2017.parallel.intrate.train.pdf.run.9       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.0       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.1       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.11      |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.13      |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.15      |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.2       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.7       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.8       |      1 +
 .../CPU2017.parallel.intrate.train.rsf.run.9       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.0       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.1       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.11      |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.13      |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.15      |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.2       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.7       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.8       |      1 +
 .../CPU2017.parallel.intrate.train.txt.run.9       |      1 +
 .../CPU2017.parallel.log.build.0                   |      1 +
 .../CPU2017.parallel.log.build.1                   |      1 +
 .../CPU2017.parallel.log.build.10                  |      1 +
 .../CPU2017.parallel.log.build.11                  |      1 +
 .../CPU2017.parallel.log.build.12                  |      1 +
 .../CPU2017.parallel.log.build.13                  |      1 +
 .../CPU2017.parallel.log.build.14                  |      1 +
 .../CPU2017.parallel.log.build.15                  |      1 +
 .../CPU2017.parallel.log.build.2                   |      1 +
 .../CPU2017.parallel.log.build.3                   |      1 +
 .../CPU2017.parallel.log.build.4                   |      1 +
 .../CPU2017.parallel.log.build.5                   |      1 +
 .../CPU2017.parallel.log.build.6                   |      1 +
 .../CPU2017.parallel.log.build.7                   |      1 +
 .../CPU2017.parallel.log.build.8                   |      1 +
 .../CPU2017.parallel.log.build.9                   |      1 +
 .../CPU2017.parallel.log.run.0                     |      1 +
 .../CPU2017.parallel.log.run.1                     |      1 +
 .../CPU2017.parallel.log.run.10                    |      1 +
 .../CPU2017.parallel.log.run.11                    |      1 +
 .../CPU2017.parallel.log.run.12                    |      1 +
 .../CPU2017.parallel.log.run.13                    |      1 +
 .../CPU2017.parallel.log.run.14                    |      1 +
 .../CPU2017.parallel.log.run.15                    |      1 +
 .../CPU2017.parallel.log.run.2                     |      1 +
 .../CPU2017.parallel.log.run.3                     |      1 +
 .../CPU2017.parallel.log.run.4                     |      1 +
 .../CPU2017.parallel.log.run.5                     |      1 +
 .../CPU2017.parallel.log.run.6                     |      1 +
 .../CPU2017.parallel.log.run.7                     |      1 +
 .../CPU2017.parallel.log.run.8                     |      1 +
 .../CPU2017.parallel.log.run.9                     |      1 +
 .../kallsyms                                       | 157225 ++++++++++++++++++
 .../c6d94c5a646d206d000000000000000000000000/elf   |    Bin 0 -> 2614064 bytes
 .../probes                                         |      0
 .../fcda8af8f5e9ef59000000000000000000000000/elf   |    Bin 0 -> 11995664 bytes
 .../probes                                         |      0
 .../669b52ab3e149aa1000000000000000000000000/elf   |    Bin 0 -> 18096780 bytes
 .../probes                                         |      0
 .../80a97943645e6529000000000000000000000000/elf   |    Bin 0 -> 109116 bytes
 .../probes                                         |      0
 .../4c34e51592e34187000000000000000000000000/elf   |    Bin 0 -> 1433064 bytes
 .../probes                                         |      0
 .../3b39eea9f50f23ec000000000000000000000000/elf   |    Bin 0 -> 107492 bytes
 .../probes                                         |      0
 .../923d4522dff6b23f000000000000000000000000/elf   |    Bin 0 -> 97092 bytes
 .../probes                                         |      0
 .../26d6c61c853d5334000000000000000000000000/elf   |    Bin 0 -> 149216 bytes
 .../probes                                         |      0
 .../84e1754dbc0e6012000000000000000000000000/elf   |    Bin 0 -> 33696 bytes
 .../probes                                         |      0
 .../a38325b08fddd2ce000000000000000000000000/elf   |    Bin 0 -> 533704 bytes
 .../probes                                         |      0
 .../8c3ef9e135f7cca4000000000000000000000000/elf   |    Bin 0 -> 2411524 bytes
 .../probes                                         |      0
 .../bb5e43c7ce3b1dea000000000000000000000000/elf   |    Bin 0 -> 1351664 bytes
 .../probes                                         |      0
 .../897aabf3f7905f4c000000000000000000000000/elf   |    Bin 0 -> 16408 bytes
 .../probes                                         |      0
 .../f63dabad26f8e261000000000000000000000000/elf   |    Bin 0 -> 2246288 bytes
 .../probes                                         |      0
 .../336757e01cf09c2d000000000000000000000000/elf   |    Bin 0 -> 5155900 bytes
 .../probes                                         |      0
 .../4230cd3f1d5f9c4f000000000000000000000000/elf   |    Bin 0 -> 589088 bytes
 .../probes                                         |      0
 .../4fe6c4942f57f6440ab05a7d898720c95a049ce1/debug |    Bin 0 -> 4160572 bytes
 .../4fe6c4942f57f6440ab05a7d898720c95a049ce1/elf   |    Bin 0 -> 1120260 bytes
 .../probes                                         |    134 +
 .../4861b45680e6ace43389c6c19d4a4b054fa2cc92/elf   |    Bin 0 -> 99996 bytes
 .../probes                                         |      0
 .../6a2b96731b3725b6371636f6f27c3343cd63d759/debug |    Bin 0 -> 377888 bytes
 .../6a2b96731b3725b6371636f6f27c3343cd63d759/elf   |    Bin 0 -> 267776 bytes
 .../probes                                         |      0
 .../fb462931a4c5af32945cf3c3ba2f8f15e6decaba/elf   |    Bin 0 -> 1504160 bytes
 .../probes                                         |      6 +
 .../perf.parallel.data/500.perlbench_r.data        |      1 +
 .../perf.parallel.data/502.gcc_r.data              |      1 +
 .../perf.parallel.data/505.mcf_r.data              |      1 +
 .../perf.parallel.data/508.namd_r.data             |      1 +
 .../perf.parallel.data/510.parest_r.data           |      1 +
 .../perf.parallel.data/511.povray_r.data           |      1 +
 .../perf.parallel.data/519.lbm_r.data              |      1 +
 .../perf.parallel.data/520.omnetpp_r.data          |      1 +
 .../perf.parallel.data/523.xalancbmk_r.data        |      1 +
 .../perf.parallel.data/525.x264_r.data             |      1 +
 .../perf.parallel.data/526.blender_r.data          |      1 +
 .../perf.parallel.data/531.deepsjeng_r.data        |      1 +
 .../perf.parallel.data/538.imagick_r.data          |      1 +
 .../perf.parallel.data/541.leela_r.data            |      1 +
 .../perf.parallel.data/544.nab_r.data              |      1 +
 .../perf.parallel.data/557.xz_r.data               |      1 +
 .../save.parallel.temps/500.perlbench_r.tar.xz     |      1 +
 .../save.parallel.temps/502.gcc_r.tar.xz           |      1 +
 .../save.parallel.temps/505.mcf_r.tar.xz           |      1 +
 .../save.parallel.temps/508.namd_r.tar.xz          |      1 +
 .../save.parallel.temps/510.parest_r.tar.xz        |      1 +
 .../save.parallel.temps/511.povray_r.tar.xz        |      1 +
 .../save.parallel.temps/519.lbm_r.tar.xz           |      1 +
 .../save.parallel.temps/520.omnetpp_r.tar.xz       |      1 +
 .../save.parallel.temps/523.xalancbmk_r.tar.xz     |      1 +
 .../save.parallel.temps/525.x264_r.tar.xz          |      1 +
 .../save.parallel.temps/526.blender_r.tar.xz       |      1 +
 .../save.parallel.temps/531.deepsjeng_r.tar.xz     |      1 +
 .../save.parallel.temps/538.imagick_r.tar.xz       |      1 +
 .../save.parallel.temps/541.leela_r.tar.xz         |      1 +
 .../save.parallel.temps/544.nab_r.tar.xz           |      1 +
 .../save.parallel.temps/557.xz_r.tar.xz            |      1 +
 git/llvm_rev                                       |      2 +-
 jenkins/build-name                                 |      2 +-
 jenkins/rewrite.log                                |     10 +
 jenkins/run-build.env                              |     13 +
 manifest.sh                                        |     10 +-
 results                                            |      1 +
 results-vs-prev/compare-results-internal.csv       |     48 +-
 results-vs-prev/csv-results-0/md5sum.csv           |     17 -
 results-vs-prev/csv-results-0/perf.csv             |     49 -
 results-vs-prev/csv-results-0/results.csv          |  56512 -------
 results-vs-prev/csv-results-0/size.csv             |  56475 -------
 results-vs-prev/csv-results-0/sve.csv              |     17 -
 results-vs-prev/csv-results-0/vect.csv             |      1 -
 results-vs-prev/csv-results-1/md5sum.csv           |     17 -
 results-vs-prev/csv-results-1/perf.csv             |     49 -
 results-vs-prev/csv-results-1/results.csv          |  56513 -------
 results-vs-prev/csv-results-1/size.csv             |  56476 -------
 results-vs-prev/csv-results-1/sve.csv              |     17 -
 results-vs-prev/csv-results-1/vect.csv             |      1 -
 results-vs-prev/csvs2table-results-brief.csv       |     42 +-
 results-vs-prev/csvs2table-results-full.csv        |    104 +-
 results-vs-prev/csvs2table-results-internal.csv    |     48 +-
 results-vs-prev/csvs2table-results.csv             |     48 +-
 results-vs-prev/results-internal.csv               |     48 +-
 results-vs-prev/tcwg-benchmark-results.log         |   1960 +-
 results_id                                         |      2 +-
 274 files changed, 158794 insertions(+), 227543 deletions(-)
 create mode 120000 annex/bmk-data/csv_results/md5sum.csv
 create mode 120000 annex/bmk-data/csv_results/perf.csv
 create mode 120000 annex/bmk-data/csv_results/results.csv
 create mode 120000 annex/bmk-data/csv_results/size.csv
 create mode 120000 annex/bmk-data/csv_results/sve.csv
 create mode 120000 annex/bmk-data/csv_results/vect.csv
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.fprate.t [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.intrate. [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.0
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.1
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.10
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.11
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.12
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.13
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.14
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.15
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.2
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.3
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.4
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.5
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.6
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.7
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.8
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.build.9
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.0
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.1
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.10
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.11
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.12
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.13
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.14
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.15
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.2
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.3
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.4
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.5
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.6
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.7
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.8
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/CPU2017.parallel.log.run.9
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100755 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 100644 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/.debug [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/500.pe [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/502.gc [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/505.mc [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/508.na [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/510.pa [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/511.po [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/519.lb [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/520.om [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/523.xa [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/525.x2 [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/526.bl [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/531.de [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/538.im [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/541.le [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/544.na [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/perf.parallel.data/557.xz_r.data
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/500.p [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/502.g [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/505.m [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/508.n [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/510.p [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/511.p [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/519.l [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/520.o [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/523.x [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/525.x [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/526.b [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/531.d [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/538.i [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/541.l [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/544.n [...]
 create mode 120000 annex/bmk-data/tcwg-bmk-sq-01.tcwglab/save.parallel.temps/557.x [...]
 create mode 100644 jenkins/rewrite.log
 create mode 100644 jenkins/run-build.env
 delete mode 100644 results-vs-prev/csv-results-0/md5sum.csv
 delete mode 100644 results-vs-prev/csv-results-0/perf.csv
 delete mode 100644 results-vs-prev/csv-results-0/results.csv
 delete mode 100644 results-vs-prev/csv-results-0/size.csv
 delete mode 100644 results-vs-prev/csv-results-0/sve.csv
 delete mode 100644 results-vs-prev/csv-results-0/vect.csv
 delete mode 100644 results-vs-prev/csv-results-1/md5sum.csv
 delete mode 100644 results-vs-prev/csv-results-1/perf.csv
 delete mode 100644 results-vs-prev/csv-results-1/results.csv
 delete mode 100644 results-vs-prev/csv-results-1/size.csv
 delete mode 100644 results-vs-prev/csv-results-1/sve.csv
 delete mode 100644 results-vs-prev/csv-results-1/vect.csv
-- 
To stop receiving notification emails like this one, please contact
the administrator of this repository.

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

[Tcwg-commits] [toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2_LTO updated (1537de9ce4c -> f397b0a13ad)