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from 8ab9fb6b8e0 PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV. new 1330977166a RISC-V: Move optimization patterns into autovec-opt.md new 5c9cffa3a4a RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
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Summary of changes: gcc/config/riscv/autovec-opt.md | 92 ++++++++++++++++++++++ gcc/config/riscv/autovec.md | 52 ------------ gcc/config/riscv/riscv-vector-builtins-types.def | 6 ++ gcc/config/riscv/riscv-vector-builtins.def | 2 +- gcc/config/riscv/vector-iterators.md | 10 +++ gcc/config/riscv/vector.md | 39 --------- .../gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c | 53 +++++++++++++ 7 files changed, 162 insertions(+), 92 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c