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from 4bae52896ec [Hexagon] Handle perfect shuffles on single vectors new 7ef89ebab96 [Hexagon] Recognize vdealb, vdealh, vshuffb and vshuffh spe [...] new d62c5bdaf90 [LV] Interleaved access vectorization: fix computing new al [...] new f42965e37ee [AArch64] Add patterns to replace fsub fmul with fma fneg.
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Summary of changes: include/llvm/CodeGen/MachineCombinerPattern.h | 14 ++- lib/Target/AArch64/AArch64InstrInfo.cpp | 105 ++++++++++++++++++++- lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 41 +++++++- lib/Transforms/Vectorize/LoopVectorize.cpp | 18 +++- test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir | 82 ++++++++++++++++ test/CodeGen/Hexagon/autohvx/shuff-single.ll | 62 ++++++++++++ .../LoopVectorize/interleaved-accesses-alias.ll | 63 +++++++++++++ 7 files changed, 372 insertions(+), 13 deletions(-) create mode 100644 test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir create mode 100644 test/CodeGen/Hexagon/autohvx/shuff-single.ll create mode 100644 test/Transforms/LoopVectorize/interleaved-accesses-alias.ll