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unknown user pushed a change to branch master in repository binutils-gdb.
from 7b2ec4e46fb sim: bfin: fix mach/xfail usage in tests new e8f20a28b11 sim: split program path out of argv vector new 852016f9210 sim: run: add --argv0 option to control argv[0] new 565cbe4b917 sim: cris: replace custom "dest" test field with new --argv0 new 145a603abc7 sim: cris: touch up rvdummy handling
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: sim/aarch64/interp.c | 5 +---- sim/arm/wrapper.c | 5 +---- sim/avr/interp.c | 5 +---- sim/bfin/interp.c | 5 +---- sim/bpf/sim-if.c | 5 +---- sim/common/nrun.c | 4 ++-- sim/common/sim-base.h | 9 +++++++++ sim/common/sim-options.c | 27 ++++++++++++++++++++++++--- sim/common/sim-utils.c | 2 ++ sim/cr16/interp.c | 5 +---- sim/cris/Makefile.in | 4 ++-- sim/cris/sim-if.c | 10 +++------- sim/d10v/interp.c | 5 +---- sim/example-synacor/interp.c | 5 +---- sim/frv/sim-if.c | 6 +----- sim/ft32/interp.c | 5 +---- sim/h8300/compile.c | 5 +---- sim/iq2000/sim-if.c | 6 +----- sim/lm32/sim-if.c | 5 +---- sim/m32r/sim-if.c | 6 +----- sim/m68hc11/interp.c | 5 +---- sim/mcore/interp.c | 5 +---- sim/microblaze/interp.c | 5 +---- sim/mips/interp.c | 6 +----- sim/mn10300/interp.c | 6 +----- sim/moxie/interp.c | 5 +---- sim/msp430/msp430-sim.c | 5 +---- sim/or1k/sim-if.c | 5 +---- sim/pru/interp.c | 5 +---- sim/riscv/interp.c | 5 +---- sim/sh/interp.c | 5 +---- sim/testsuite/cris/c/c.exp | 6 ++---- sim/testsuite/cris/c/readlink11.c | 3 +-- sim/testsuite/cris/c/readlink5.c | 2 +- sim/testsuite/cris/c/readlink6.c | 2 +- sim/v850/interp.c | 6 +----- 36 files changed, 73 insertions(+), 132 deletions(-)