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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from 85cf76e783a [analyzer] Validate checker option names and values adds a6d3bd486b7 [X86] Pull out IsNOT helper. NFCI. adds ef9b8e03fd0 [ELF][test] Reorganize some R_*_NONE tests adds 2c52ddf31f5 [MinGW] Allow requesting PDB output without giving a file name adds 9ae0d222dc8 [MinGW] Implement --help for the MinGW driver adds 6863dfaa21d [MinGW] Implement the -v and --version flags for the MinGW driver adds 6ff6a8f656e [MinGW] Include --enable-auto-import in the help listing adds 7f8ea15ffa1 GlobalISel: Add MIRBuilder wrappers for bitcount instructions adds e1a2a28d6bc GlobalISel: Add fp<->int casts to MachineIRBuilder adds 1400a35f716 GlobalISel: Fix missing version of customFor adds b3dc73634c4 AMDGPU/GlobalISel: Use waterfall loop for buffer_load adds a3b5a386fa7 AMDGPU/GlobalISel: Use subreg index instead of extra unmerge adds 568f193847c AMDGPU/GlobalISel: RegBankSelect for llvm.amdgcn.s.buffer.load adds 90900fbc9fd [MergeICmps][NFC] Add more debug. adds 1448f5689e2 AMDGPU/GlobalISel: Legalize G_FCOPYSIGN adds 6aafc5e19d3 AMDGPU/GlobalISel: Legalize G_FRINT adds 6aebcd54998 AMDGPU/GlobalISel: Legalize G_INTRINSIC_TRUNC adds a510b570c28 AMDGPU/GlobalISel: Legalize G_FCEIL adds f3dccc64af5 [ELF] Don't align PT_TLS's p_memsz adds 1a02d30c873 AMDGPU: Fix unused variable warnings in release builds adds 43fcc79837c [AMDGPU][MC] Enabled expressions for most operands which ac [...] adds 10869e29620 Fix Wdocumentation warnings. NFCI. adds 0855896c687 Add a Visit overload for DynTypedNode to ASTNodeTraverser adds c8dcbed6e4c Extract ASTDumper to a header file adds 62c7032c183 [X86][AVX] isNOT - add extract_subvector(xor X, -1) -> extr [...] adds f3a3b93f545 [ELF] -r: fix R_*_NONE to section symbols on Elf*_Rel targets adds 8369a9beb7e [LibTooling] Add support to Transformer for composing rules [...] adds 279314e81b5 [X86][AVX] Remove LowerCTTZ's AVX1 custom vector handling. adds e92a9c99d66 [libcxxabi] Add a test for invalid assumptions on the align [...] adds 5ae3113969b [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork adds 3a02b12439f Fix tests from r361013 on X86 bots. adds 83cc1b35d18 [analyzer] Remove the default value arg from getChecker*Option adds 3275060fe83 [InstCombine] canShiftBinOpWithConstantRHS(): drop bogus si [...] adds 64c756b9917 [DAGCombiner] visitShiftByConstant(): drop bogus signbit check adds 198611b0ff7 [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers adds 777cad2c448 [Docs] Remove SVN checkout from LLDB build steps adds 067e9468596 [InstSimplify] Add unary fneg to `fsub 0.0, (fneg X) ==> X` [...] adds 012ef1cca7d [libFuzzer] Use SleepOneSecondTest.cpp for fork-sigusr.test. adds 5d95b11b6b6 Update list of supported architectures. adds 04323c24a1a Added an assertion to constant evaluation enty points that [...] adds c05d85104d5 [InstCombine] add tests for insertelement with bitcasted op [...] adds 2c2f8e74b97 [X86][SSE] Match all-of bool scalar reductions into a bitca [...] adds 9da9ed53522 gn build: Merge r360991 adds 762b3ef0785 Attempt to fix test on Windows after r360998 adds 10abc76fce3 gn build: Merge r361033 adds 065431c82bf [X86][SSE] Fold movmsk(not(x)) -> not(movmsk) adds 19dc8c72804 [NFC][InstSImplify] Fix flip-flopped comments and test names adds 926e47751b1 [InstCombine] move bitcast after insertelement-with-bitcast [...] adds e78ac9cc72c Revert r361033 "Add a Visit overload for DynTypedNode to AS [...] adds bebc7d6a4e5 [NFC][InstSimplify] Precommit new unary fneg test adds f3cedf4823c GlobalISel: Define integer min/max instructions adds e4351bfa678 gn build: Merge r360993 adds bf161e67838 [hwasan] Limit try-catch tests to aarch64. adds 5bac7063432 [CommandInterpreter] Fix trailing blanks after `all` or [0- [...] adds bbfd8d18857 Add more tests for AST JSON output; NFC. adds 144291e14c1 [OpenMP][bugfix] Add missing math functions variants for lo [...] adds a933030f848 [c++20] P1327R1: Support for typeid applied to objects of p [...] adds dcc477e38cc [CMake] Inline info plist in lldb driver adds fd0779181f5 [CMake] Add first CMake cache files adds 2fd318e5433 [libFuzzer] Dump input on failure for sigusr tests. adds 13717bd54bb [WebAssembly] Remove expected failure of builtin-location.C test adds dc1c41fb6f0 build: use clang-cl for runtimes when targeting Windows adds 182c638fe09 Explicitly remove -stdlib=libc++, as we pass -nostdinc++ an [...] adds 549ddae58f7 Remove `using namespace std;` in __gnu_cxx namespace. adds 236317d2161 Fix missing std:: qualifier in __gnu_cxx::hash_map in C++03 adds 12de5425c19 [NFC][InstSimplify] Add more unary fneg tests to floating-p [...] adds a9c7b2583f2 [sanitizer] Update symbolizer/scripts/global_symbols.txt adds 53f68c57646 [EditLine] Check string pointers before dereferencing them. adds d84d02e1973 Fix IPv6 support on lldb-server platform adds 2fc6b024b98 [CommandInterpreter] Refactor SourceInitFile adds 02b5ca8cd11 GlobalISel: Implement lower for S64->S32 [SU]ITOFP adds 2f29220d6d6 AMDGPU/GlobalISel: Implement s64->s64 [SU]ITOFP adds f9399de525e Unbreak windows build bot adds 348731aeed4 [ELF] Fix TP offset of TLS Variant I after D62059 adds db5cb0fce77 [ELF] Add {i386,x86-64}-tls-le-align.s to test TP offsets f [...] adds 38cc896f002 Revert "Fix IPv6 support on lldb-server platform" adds 8803124d234 [crashlog] Use loads() instead of readPlistFromString() for [...] adds 898896836dd [ELF][X86] Fix R_RELAX_TLS_GD_TO_LE_NEG and R_NEG_TLS after D62059 adds 5f36a28556c [docs][ORC] Start work on an ORC design doc. Very much a wo [...] adds ed2ad77ccb0 [ARM][AArch64] Revert Android Bionic PT_TLS overaligning hack adds 07c96ebd944 Update llvm-nm -s to use a multi-var option adds 82c3f3dae0e [docs] Fix some RST errors. adds 5fab538e2a9 [MinGW] Set the right updated option help for the updated p [...] adds 63621832da6 Suppress false-positive GCC -Wreturn-type warning.
No new revisions were added by this update.
Summary of changes: clang/include/clang/AST/ASTDumper.h | 56 + clang/include/clang/Basic/DiagnosticASTKinds.td | 28 +- clang/include/clang/Sema/Sema.h | 6 +- .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 13 +- .../clang/Tooling/Refactoring/Transformer.h | 103 +- clang/lib/AST/ASTDumper.cpp | 47 +- clang/lib/AST/Expr.cpp | 3 + clang/lib/AST/ExprConstant.cpp | 78 +- clang/lib/Headers/__clang_cuda_cmath.h | 5 + .../Headers/__clang_cuda_math_forward_declares.h | 11 + clang/lib/Sema/SemaOpenMP.cpp | 14 +- clang/lib/Sema/SemaOverload.cpp | 6 +- .../Checkers/AnalysisOrderChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp | 6 +- .../Checkers/LocalizationChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 2 +- .../Checkers/MmapWriteExecChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp | 3 +- .../StaticAnalyzer/Checkers/NullabilityChecker.cpp | 2 +- .../Checkers/NumberObjectConversionChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/PaddingChecker.cpp | 2 +- .../UninitializedObjectChecker.cpp | 13 +- .../StaticAnalyzer/Checkers/VirtualCallChecker.cpp | 3 +- clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp | 55 +- .../StaticAnalyzer/Frontend/CheckerRegistry.cpp | 8 +- clang/lib/Tooling/Refactoring/Transformer.cpp | 113 +- clang/test/AST/ast-dump-records-json.cpp | 4107 ++++++++++++++ clang/test/AST/ast-dump-stmt-json.c | 5094 +++++++++++++++++ clang/test/AST/ast-dump-stmt-json.cpp | 5951 ++++++++++++++++++++ clang/test/Analysis/checker-plugins.c | 10 + clang/test/Analysis/invalid-checker-option.c | 21 + .../CheckerOptionHandling.cpp | 2 +- clang/test/SemaCXX/builtin-object-size-cxx14.cpp | 4 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 59 + .../StaticAnalyzer/AnalyzerOptionsTest.cpp | 31 +- clang/unittests/Tooling/TransformerTest.cpp | 91 +- clang/www/cxx_status.html | 3 +- compiler-rt/lib/gwp_asan/CMakeLists.txt | 3 + .../symbolizer/scripts/global_symbols.txt | 1 + compiler-rt/test/fuzzer/fork-sigusr.test | 6 +- compiler-rt/test/fuzzer/merge-sigusr.test | 2 +- compiler-rt/test/hwasan/TestCases/try-catch.cc | 3 + libcxx/include/ext/__hash | 27 +- libcxx/include/ext/hash_map | 71 +- libcxx/include/ext/hash_set | 27 +- .../libcxx/containers/gnu_cxx/hash_map.pass.cpp | 7 + .../libcxx/containers/gnu_cxx/hash_set.pass.cpp | 7 +- .../test/exception_object_alignment.2.pass.cpp | 34 + lld/ELF/InputSection.cpp | 10 +- lld/ELF/Symbols.h | 1 + lld/ELF/Writer.cpp | 18 - lld/MinGW/Driver.cpp | 37 +- lld/MinGW/Options.td | 10 +- lld/test/ELF/Inputs/dtrace-r.o | Bin 624 -> 0 bytes lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s | 4 +- lld/test/ELF/aarch64-tls-gdle.s | 4 +- lld/test/ELF/aarch64-tls-iele.s | 6 +- lld/test/ELF/aarch64-tls-le.s | 8 +- lld/test/ELF/aarch64-tlsld-ldst.s | 50 +- lld/test/ELF/arm-tls-le32.s | 12 +- lld/test/ELF/arm-tls-norelax-ie-le.s | 4 +- lld/test/ELF/dtrace-r.test | 8 - lld/test/ELF/i386-tls-le-align.s | 29 + lld/test/ELF/icf10.s | 17 + lld/test/ELF/icf10.test | 38 - lld/test/ELF/relocation-dtrace.test | 23 - lld/test/ELF/relocation-none-aarch64.s | 26 + lld/test/ELF/relocation-none-aarch64.test | 23 - lld/test/ELF/relocation-none-arm.s | 26 + lld/test/ELF/relocation-none-i386.s | 24 + lld/test/ELF/relocation-none-i686.test | 22 - lld/test/ELF/relocation-none-x86-64.s | 24 + lld/test/ELF/tls-align.s | 21 - lld/test/ELF/x86-64-tls-le-align.s | 16 + lld/test/MinGW/driver.test | 14 + lldb/cmake/caches/Apple-lldb-base.cmake | 8 + lldb/cmake/caches/Apple-lldb-macOS.cmake | 22 + lldb/docs/index.rst | 10 +- lldb/docs/resources/build.rst | 51 - lldb/examples/python/crashlog.py | 8 +- lldb/include/lldb/Interpreter/CommandInterpreter.h | 5 +- lldb/lit/Commands/command-backtrace.test | 2 +- lldb/source/API/SBCommandInterpreter.cpp | 4 +- lldb/source/Host/common/Editline.cpp | 5 +- lldb/source/Interpreter/CommandInterpreter.cpp | 205 +- lldb/tools/driver/CMakeLists.txt | 5 + llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 21 +- llvm/docs/ORCv2DesignAndImplementation.rst | 248 + llvm/docs/index.rst | 5 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 7 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 69 + llvm/include/llvm/Support/TargetOpcodes.def | 12 + llvm/include/llvm/Target/GenericOpcodes.td | 32 + llvm/lib/Analysis/InstructionSimplify.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 122 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 27 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 180 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 8 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 360 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 16 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 217 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 4 +- .../Target/WebAssembly/known_gcc_test_failures.txt | 1 - llvm/lib/Target/X86/X86ISelLowering.cpp | 73 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 34 +- .../InstCombine/InstCombineVectorOps.cpp | 14 + llvm/lib/Transforms/Scalar/MergeICmps.cpp | 9 + .../GlobalISel/legalizer-info-validation.mir | 12 + .../CodeGen/AArch64/pull-binop-through-shift.ll | 8 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir | 275 + .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 479 ++ .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 160 + .../AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir | 230 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir | 76 + .../CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir | 79 + .../regbankselect-amdgcn-buffer-load.mir | 281 + .../regbankselect-amdgcn-s-buffer-load.mir | 151 + .../regbankselect-extract-vector-elt.mir | 12 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 34 +- llvm/test/CodeGen/X86/pull-binop-through-shift.ll | 6 +- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 8 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 10 +- llvm/test/CodeGen/X86/vector-lzcnt-512.ll | 176 +- llvm/test/CodeGen/X86/xor.ll | 4 +- llvm/test/MC/AMDGPU/dl-insts-err.s | 88 +- llvm/test/MC/AMDGPU/expressions-gfx10.s | 49 + llvm/test/MC/AMDGPU/expressions.s | 272 +- llvm/test/MC/AMDGPU/flat-global.s | 74 +- .../MC/AMDGPU/invalid-instructions-spellcheck.s | 2 +- llvm/test/MC/AMDGPU/labels-branch-gfx9.s | 19 + llvm/test/MC/AMDGPU/literals.s | 88 +- llvm/test/MC/AMDGPU/sopk.s | 10 +- llvm/test/MC/AMDGPU/vop3-errs.s | 7 + llvm/test/MC/AMDGPU/vop3.s | 14 +- llvm/test/MC/AMDGPU/vop3p-err.s | 14 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 11 +- llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt | 6 +- llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt | 2 +- .../InstCombine/insertelement-bitcast.ll | 96 + .../InstCombine/pull-binop-through-shift.ll | 8 +- .../pull-conditional-binop-through-shift.ll | 18 +- llvm/test/Transforms/InstCombine/trunc.ll | 8 +- llvm/test/Transforms/InstSimplify/fast-math.ll | 8 +- .../InstSimplify/floating-point-arithmetic.ll | 75 +- .../Transforms/InstSimplify/known-never-nan.ll | 17 +- llvm/tools/llvm-nm/llvm-nm.cpp | 7 +- .../CodeGen/GlobalISel/MachineIRBuilderTest.cpp | 76 + llvm/utils/gn/secondary/clang/test/BUILD.gn | 6 + llvm/utils/gn/secondary/llvm/test/BUILD.gn | 6 + 152 files changed, 20222 insertions(+), 1191 deletions(-) create mode 100644 clang/include/clang/AST/ASTDumper.h create mode 100644 clang/test/AST/ast-dump-records-json.cpp create mode 100644 clang/test/AST/ast-dump-stmt-json.c create mode 100644 clang/test/AST/ast-dump-stmt-json.cpp create mode 100644 libcxxabi/test/exception_object_alignment.2.pass.cpp delete mode 100644 lld/test/ELF/Inputs/dtrace-r.o delete mode 100644 lld/test/ELF/dtrace-r.test create mode 100644 lld/test/ELF/i386-tls-le-align.s create mode 100644 lld/test/ELF/icf10.s delete mode 100644 lld/test/ELF/icf10.test delete mode 100644 lld/test/ELF/relocation-dtrace.test create mode 100644 lld/test/ELF/relocation-none-aarch64.s delete mode 100644 lld/test/ELF/relocation-none-aarch64.test create mode 100644 lld/test/ELF/relocation-none-arm.s create mode 100644 lld/test/ELF/relocation-none-i386.s delete mode 100644 lld/test/ELF/relocation-none-i686.test create mode 100644 lld/test/ELF/relocation-none-x86-64.s delete mode 100644 lld/test/ELF/tls-align.s create mode 100644 lld/test/ELF/x86-64-tls-le-align.s create mode 100644 lldb/cmake/caches/Apple-lldb-base.cmake create mode 100644 lldb/cmake/caches/Apple-lldb-macOS.cmake create mode 100644 llvm/docs/ORCv2DesignAndImplementation.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buff [...] create mode 100644 llvm/test/MC/AMDGPU/expressions-gfx10.s create mode 100644 llvm/test/MC/AMDGPU/labels-branch-gfx9.s create mode 100644 llvm/test/Transforms/InstCombine/insertelement-bitcast.ll