[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (fc2b4a02b1a -> c9c09ef836b)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project.

from fc2b4a02b1a [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemanded [...] adds cb54c13c217 [clang][analyzer] Modify include AllocationState.h in Puten [...] adds 12cc105f806 [X86] Add DAG combines to form CVTPH2PS/CVTPS2PH from vXf16 [...] adds ce70e289987 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 914a97a4e61 [x86] add vector tests for splatted memory ops; NFC adds 9bbf271fc9d [AArch64] Move isOverflowIntrOpRes help function to the ISD [...] adds 3543ac9ab52 [X86] Rewrite LowerBRCOND to remove dead code and handle IS [...] adds e442f38395f [libc++] Fix unintended ADL inside ref(reference_wrapper<T> [...] adds 092a57f5082 [libc++] Fix unqualified call to 'ref' inside shared_ptr(un [...] adds db8911aad72 [clang-tidy] rename_check.py: maintain alphabetical order i [...] adds 0ed7a615438 [X86] Fix a -Wparentheses warning. NFC adds 6fa3894c4e7 [clang] Fix search path logic for C_INCLUDE_DIRS adds af64b31959f Add target.xml support for qXfer request. adds 0ffa6e1a7e1 [lldb] Fix version string when using LLDB_REVISION but not [...] adds f9c326364e7 [DAGCombiner] Use SDValue::getConstantOperandAPInt helper w [...] adds 726c342ce27 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to libObject adds 70d8fec7c94 [mlir] Refactor the structure of the 'verifyConstructionInv [...] adds 3f785212e9c Revert "[macho][NFC] Extract all CPU_(SUB_)TYPE logic to li [...] adds da181d4ba0c [PowerPC][NFC] Cleanup some of the Darwin mentions in the R [...] adds 064cd2ecdb3 [x86] allow peeking through an extract_subvector to find a [...] adds 5d2baa956ac [libc] Add Initial Support for Signals adds 8928c6dbbf7 Fix some typos in the MLIR documentation. adds 6de21c556d1 [ORC][examples] Fix ThinLtoJIT example after changes in 85f [...] adds 813b1b9fd6c [ORC] Add a convenience method for setting the ExecutionSes [...] adds e2c2eb0a550 [X86] Fix NSW/NUW typo in avg test (PR44973) adds a11ff39ba2a [clang-format] Merge name and colon into a single token for [...] adds 7a7c753b0cc libclang: Make shared object symbol exporting by default adds 967eeb109be [AIX] Pack BasicBlockBits adds 2f56789c8fe [clang][doxygen] Fix false -Wdocumentation warning for tag [...] adds e4a9225f5d1 [GISel][KnownBits] Give up on PHI analysis as soon as we do [...] adds 6d34a87bae6 [cxx_status] Update -std= instructions for C++20. adds 0c8fa6db90a [llvm][build] Fix shared lib builds. [NFC] adds 3d0564c7e07 Revert "[NFCI][DebugInfo]: Corrected a Typo." adds 7ddbf802cf6 [ConstantFold] add/move tests for FP with undef operand; NFC adds 6f4d9d10293 Revert "[AArch64][SVE] Add intrinsics for SVE2 bitwise tern [...] adds e84444781aa Revert "libclang: Add static build support for Windows" and [...] adds 714265dabb6 [X86] Replace a bad use of MVT::getVectorVT with EVT::getVectorVT adds 1d8860f90bc Revert 714265dabb606bfef2f85694234f152edbfa91ac "[X86] Repl [...] adds c7b54a196e1 Recommit "[X86] Replace a bad use of MVT::getVectorVT with [...] adds 9e0c95572e5 [AIX] Improve 32/64-bit build configuration adds bf3f427ba23 [ASTImporter] Add linkage check to ASTNodeImporter::hasSame [...] adds 6123074d0c0 [Driver] Escape the program path for -frecord-command-line adds c767cf24e48 [SVE] Add support for lowering GEPs involving scalable vectors. adds 99809f98d7b [SCCP] Do not mark unknown loads as overdefined. adds ee260c1a0f1 [mlir] [VectorOps] Multi-dim reductions for lowering vector [...] adds 6d60d8695d2 [mlir] Use LLJIT::getMainJITDylib instead of hardcoding '<main>' adds 3ee28108273 [lldb/Plugin] Don't mark ProcessNetBSD as a plugin adds 577d9ce3553 Revert "[Driver] Escape the program path for -frecord-comma [...] adds 51bf5d3cc19 [mlir][Parser] Update DenseElementsAttr to print in hex whe [...] adds 0d19b016226 [lldb/Test] Remove stale README in test/API adds 07c559caef9 [libc++] Explain XFAILs with std::uncaught_exceptions test adds d95a10a7f97 [X86] Custom legalize v1i1 add/sub/mul to xor/xor/and with avx512. adds 5228a5544b2 [X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns. adds b00ef8951b5 [X86] Custom legalize v1i1 UADDSAT/USUBSAT/SADDSAT/UADDSAT [...] adds 7e927698621 [X86] Expand vselect of v1i1 under avx512. adds e5782377f3f [X86] Add CMOV_VK1 pseudo so we don't crash on v1i1 ISD::SELECT adds 72ce0c8073b [libc++][regex] Validate backreferences in the constructor. adds d4ded05ba85 [libunwind][CMake] Treat S files as C to work around CMake bug. adds 2fe457690da Filter callbr insts from critical edge splitting adds 7593a480dbc [Dominators] Use Instruction::comesBefore for block-local q [...] adds e27b61c1ea3 [XCore] Add instruction pattern for bitrev adds 4b540fa8a1c [OpenMP][NFC] Remove leftover debug messages adds c32c8fd1437 [mlir] Use getOperation()->setAttr when generating attribut [...] adds d8969a1cb96 Split _LIBCPP_STRING_EXTERN_TEMPLATE_LIST up into a V1 and [...] adds 78be6187170 [X86] Add CMOV_VR64 pseudo instruction for MMX. Remove mmx [...] adds efeafa1bdaa libclc: Use acos implementation from amd_builtins adds 45766068315 [X86] Remove unnecessary isNullConstant in LowerSelect. NFC adds df74033ec9f [WebAssembly] Remove unneeded getWasmKindForNamedSection function adds 3bc525af235 [X86] Autogenerate complete checks. NFC adds 263bef2bbcb [X86] Make combineCMov not create unsupported FCMOVs when f [...] adds 97f11600e0b [X86] Don't bother avoiding illegal FCMOVs if we don't have [...] adds e326f524304 [clangd] Fix the incomplete template specialization in findTarget. adds 0e5ed1b2626 [lldb][NFC] Split up ClangASTSource::FindExternalVisibleDecls adds bc498198b55 [clangd] Allow renaming class templates in cross-file rename. adds e5eeb8465f2 Make unittests include path relative adds d0b09f89e0e [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue adds 32e4e719663 test/CodeGen/AMDGPU: Add a test case that shows a miscompilation adds a24d46318f6 [NFC] Corrected a minor typo in a comment adds 99b03c1c18d Detect and disable openmp tests that require multiple hardw [...] adds d799190851f [ConstantFold] fold fsub -0.0, undef to undef rather than NaN adds b0761bbc763 [DependenceAnalysis] Memory dependence analysis internal ca [...] adds c51b0bede82 [Hexagon] Introduce noop intrinsic to cast between vector p [...] adds 35b685270b4 [mlir] Add a signedness semantics bit to IntegerType adds 86c52af05a6 [TargetLowering] SimplifyDemandedBits - use getValidShiftAm [...] adds d33e96b68c6 [X86] Regenerate hi reg tests adds b55c58a2d56 [Error/unittests] Add a FailedWithMessage gtest matcher adds 4fdaac0e1eb [PowerPC][NFC] Remove Darwin specific logic in frame finalization. adds a49a41e7855 [AST][NFC] Update outdated comments in ASTStructuralEquival [...] adds 175f6e309ab [PowerPC][NFC] Add a test for vrsave usage iinline asm. adds de8793b9184 [lldb/DWARF] Add support for type units in dwp files adds f0c642e8227 Remove unused functions in llvm-ml adds 5125803d344 [mlir] Silence error: call to constructor of 'llvm::APInt' [...] adds b64aa8c7151 AMDGPU/GlobalISel: Fix constant bus violation with source m [...] adds fab4cdea391 AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy adds 79ff188adde AMDGPU/GlobalISel: Legalize G_FPOW adds ac7abe0ba9a AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC adds 83012cb2171 [ARM] Correct Formatting. NFC adds 89dc8fe6222 AMDGPU/GlobalISel: Precommit xnor matching test adds 6ed8e201433 [ELF] Ignore the maximum of input section alignments for two cases adds de0dda54d38 [ELF] Warn changed output section address adds c47e0e2d37d [lldb-vscode] Use libOption with tablegen to parse command [...] adds dbd7281aa77 [ELF] Shuffle .init_array/.fini_array with --shuffle-sections= adds 42ec6fdce92 [TargetLowering] Apply basic shift combines before recursiv [...] adds 043ed2e22ac AMDGPU/GlobalISel: Fix xnor matching adds 6a479220b5e AMDGPU/GlobalISel: Commit test changes I forgot to squash adds cab39e4b8c8 GlobalISel: Fix narrowing of (G_ASHR i64:x, 32) adds 9fff6e823cf [AArch64][SVE] Add +fullfp16 to sve-vector-splat.ll adds 134bab7cd56 [DSE,MSSA] Add debug counter. adds 23444edf30b [AST matchers] Add basic matchers for googletest EXPECT/ASS [...] adds fc4455891c0 [VectorCombine] refactor matching code to reduce duplication; NFC adds db9c40f5624 [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations adds 60023e34711 AMDGPU: Use default operand for VOP3P clamp adds 41bd9ead35f [SystemZ] Return scalarized costs for vector instructions [...] adds 8c70a2597f5 [gn build] Port 23444edf30b adds a8db806d52c [SimplifyLibCalls][IRBuilder] Accept any IRBuilder in Simpl [...] adds c90ea87cfd7 [X86] Fix SDLoc initialization adds 98f5268a729 [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC). adds deb0a8bfc49 [DSE,MSSA] Dbg counters required assertions. Mark test acco [...] adds 656dff9af48 [InstCombine] Use replaceOperand() in more places adds e4df934ca7b [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp} adds 0e3e242209c [BFI] Fix missed BFI updates in MachineSink. adds b178555318c [InstCombine] Improve simplify demanded bits worklist management adds 31ec721516b [llvm][CodeGen] DAG Combiner folds for vscale. adds bc7b26c333f [MLIR] Allow Loop dialect IfOp and ForOp to define values adds 6b4a193defb [XCOFF][AIX] Put undefined symbol name into StringTable whe [...] adds 2769fb90f0a [LoopVectorize][X86] Regenerate tests. NFCI. adds 1723f219939 Fix MSVC "not all control paths return a value" warning. NFCI. adds 72eef820d52 AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR adds dfce5fd50a0 AMDGPU/GlobalISel: Select VOP3P instructions adds 4c1c9422a3a AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 adds db06870dbd5 AMDGPU: Move dot intrinsic patterns to instruction def adds 07d2cdae116 [lldb/cmake] Enable more verbose find_package output. adds 00955a62e43 AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max adds 73d8d83a6d9 [ARM] Change ARMAttributeParser::Parse to use support::endi [...] adds 7dd6a862e5e [libc++] Do not set the `availability=XXX` feature when not [...] adds 266959c0f72 [AArch64][SVE] Add backend support for splats of immediates adds 0781e93a6ea [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V adds 29ad9d6b26e [mlir][spirv] Add lowering for load/store zero-rank memref [...] adds 042d97eda9f [MLIR] Remove constexpr from LoopOps.td adds d2b7c09e79a [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q [...] adds 69d757c0e8f Move StandardOps/Ops.h to StandardOps/IR/Ops.h adds e2ed1d14d6c [llvm][aarch64] SVE addressing modes. adds 34e3485560c [VectorCombine] refactor cost calcs to reduce duplication; NFC adds 33bf1196475 [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics [...] adds 446b150065c [IR] Update BasicBlock::validateInstrOrdering comments, NFC adds 8875ee18d72 [X86] Add a new format type for instructions that represent [...] adds 1874dee5662 [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat adds 0bb90628b5f Allow customized relative PYTHONHOME adds 8fa776b8ed0 [gn build] Port 1874dee5662 adds e9c79a7aef1 [VectorCombine] refactor to reduce duplicated code; NFC adds b72f1448ce4 AMDGPU/GlobalISel: Better code for one case of G_SHUFFLE_VE [...] adds a5b22b768f5 [AArch64][SVE] Add support for DestructiveBinary and Destru [...] adds dc046c70de9 [llvm-objcopy][MachO] Change the storage of sections adds 1f04d1b7069 [lldb/test] Move `platform process list` tests to its own d [...] adds d7c403e6404 [lldb/Plugins] Add ability to fetch crash information on cr [...] adds 5c33a81b7a4 [AArch64][SVE] Fix -Wimplicit-fallthrough after D73711 adds a6c8698924d clang/Modules: Finish renaming CompilerInstance::ModuleMana [...] adds 0ad6fc9928d [SelectionDAG] remove unused isFast() helper function; NFC adds fad1c750f16 [AArch64][SVE] Fix -DBUILD_SHARED_LIBS=on builds after -D74 [...] adds fddbff14735 [AArch64] Delete an unneeded dependency on Object after 187 [...] adds d37cbda5f9a [Hexagon] Define __ELF__ by default. adds 0a70edd6962 [CloneFunction] Update loop headers after cloning all block [...] adds 9708279c725 [Attributor][FIX] Undo 16188f9 until SCC iterator bug is fixed adds 618dec2aeff [GISel][KnownBits] Add a cache mechanism to speed compile time adds 528a6a1d4cc [Attributor][FIX] Disable a test to unblock the builders adds a32d539798e [Target] Remove libObject dependency in lib/Target adds 215a31115f8 Revert "Allow customized relative PYTHONHOME" adds 393f4e8ac26 [Analysis][Docs] Parents of loops documentation. adds 26222db01b0 [mlir][DeclarativeParser] Add support for the TypesMatchWit [...] adds 2d0477a0036 [mlir][DeclarativeParser] Add basic support for optional gr [...] adds ca4ea51c0af [mlir][DeclarativeParser] Add an 'attr-dict-with-keyword' d [...] adds 93813e5feb1 [mlir] Add a utility iterator range that repeats a given va [...] adds b1de971ba8c [mlir][ODS] Add support for specifying the successors of an [...] adds 9eb436feaa7 [mlir][DeclarativeParser] Add support for formatting the su [...] adds 0050e8f0cf5 [mlir][Tutorial] Add a section to Toy Ch.2 detailing the cu [...] adds 266877a2a8b [llvm-objdump] Print method name from debug info in disasse [...] adds 75af9da7557 [MC][ELF] Error for sh_type, sh_flags or sh_entsize change adds 8a0f0e2656a [lldb/test] Tweak libcxx string test on Apple+ARM devices adds d3e170c4388 Revert "[AMDGPU] Don’t marke the .note section as ALLOC" adds 42060c0a987 [mlir][DeclarativeParser][NFC] Use explicit type names in T [...] adds 340feac6721 [Driver] Escape the program path for -frecord-command-line adds bf4933b4ea6 AMDGPU/GlobalISel: Remove dead code adds 3ec3f62f0a0 Allow customized relative PYTHONHOME (Attemp 1) adds d17123b2577 [llvm-objdump][test] Fix source-interleave-function-from-de [...] adds 3648370a792 [WebAssembly] Fix a non-determinism problem in FixIrreducib [...] adds e33c9bb245a Flags for displaying only hot nodes in CFGPrinter graph adds ebee1312597 [lldb][test] Fix sh_type of .debug_cu_index and .debug_tu_index adds 1b1a97e9b55 Remove unused variable adds 228a2bc9b70 [X86] Teach combineCVTPH2PS to shrink v8i16 loads when the [...] adds e29065a1053 [lldb][test] Fix sh_flags and sh_entsize of .debug_str.dwo adds a4f45ee73a9 [libc] Lay out framework for fuzzing libc functions. adds b6d63c92ec3 [GISel][KnownBits] Suppress unused warning on the dump method adds 59a572eb742 [Preprocessor][test] Move AArch64 tests from init.c to init [...] adds 0123744d46a [Preprocessor][test] Fix __VERSION__ in init-aarch64.c adds fc6057e34fb [Frontend] Replace CC1 option -mcode-model with -mcmodel= adds d2e949eed5b [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does adds 271f9647732 [Preprocessor][X86] Fix __code_model_*__ predefine macros adds d192a4ab2b8 Update Quantization.md adds 453cd2dbe57 Update ShapeInference.md adds 635034f1938 [VE][fix] missing include adds 31f2ad9c368 [yaml2obj] - Automatically assign sh_addr for allocatable s [...] adds a6370d57983 [lldb][test] - Update basic-elf.yaml to fix build bot. adds 837d8129e91 [NFC] Remove some GCC warning from c9e93c84f61400d1aac7d195 [...] adds e48849a2404 [libcxx] [test] Suppress MSVC++ warning 4640 under /Zc:thre [...] adds 7b44f0428af Add a llvm::shuffle and use it in lld adds 56eb15a1c71 [Sema] Fix pointer-to-int-cast diagnostic for _Bool adds 81726894d3c [ORC] Add errors for missing and extraneous symbol definitions. adds 1df947ab403 [ORC] Update LLJIT to automatically run specially named ini [...] adds e7a184fc7c0 [X86] Use movlps for i64 atomic stores on 32-targets with sse1. adds bdb1729c834 [X86] Teach EltsFromConsecutiveLoads that it's ok to form a [...] adds 84cd968f75b [X86] Add AddToWorklist(N) after calls to SimplifyDemandedB [...] adds 57923617181 [X86] Add sse2 command lines to sse-intrinsics-fast-isel.ll. adds 21316f6f928 [NFC] Test commit access. Drop trivial braces. adds 98ac6e76960 [NFC] fix test nan value adds 7d3f8b1e2dc [clangd] Debounce rebuilds responsively to rebuild times. adds a2ce807eb72 [clangd] Reapply b60896fad926 Fall back to selecting token- [...] adds b4b9706d5da Revert "[clangd] Reapply b60896fad926 Fall back to selectin [...] adds af69d5e10eb [DSE] Track overlapping stores. adds a253a2a793c [SDAG] fold fsub -0.0, undef to undef rather than NaN adds 31059ba5eb1 [X86] Regenerate some tests to show FMA4 comments. NFC adds 7769030b931 Recommit "[PatternMatch] Match XOR variant of unsigned-add [...] adds 335e21f9006 [AArch64] Update new test. adds be6d07c9208 [clangd] Reapply b60896fad926 Fall back to selecting token- [...] adds 86cda4c50da Updating a comment to clarify that SkipUntil handles balanc [...] adds e9997cfb4d4 [clangd] Try to fix buildbots - copy elision not happening here? adds 82879c2913d [SystemZ] Support the kernel back chain. adds 2a10f8019dd [X86] Use FIST for i64 atomic stores on 32-bit targets with [...] adds 15b6aa74488 [X86] Enable the use of movlps for i64 atomic load on 32-bi [...] adds 5a705186604 [X86] Remove most X86 specific subclasses of MemSDNode. Jus [...] adds 384d5e33fe2 [SelectionDAG] Remove SelectionDAG::getTargetMemSDNode now [...] adds bae33a7c5a1 IR printing for single function with the new pass manager. adds 8b3a62dc987 [NFC][PowerPC] Refactor the tryAndWithMask() adds 6a3506a208b [Driver][X86] Add helptext for malign-branch*, mbranches-wi [...] adds 4d812acba61 [libc] Add a README to the sub-directories under the utils [...] adds 3a6bb32bd24 [SelectionDAG] Remove ISD::LIFETIME_START/LIFETIME_END from [...] adds f1b8ec3398f [X86] Use custom isel for gather/scatter instructions. adds 7a7146cf72a [X86] When creating X86ISD::MGATHER nodes from AVX2 gather [...] adds 27a79b72162 [JITLink] Add a MachO x86-64 GOT and Stub bypass optimization. adds e657a1eb23f [lldb] Remove all the 'current_id' logging counters from t [...] adds 03756a41979 [ARM][MVE] Combine more extending masked loads adds 0f7cfb25432 [lldb/DWARF] Don't index dwp file multiple times adds be3b448c2e3 [lldb/test] simplify basic-elf.yaml adds c131dfefe2b [lldb] Disable auto fix-its when evaluating expressions in [...] adds c3f36acc924 [MC] Widen the functional unit type from 32 to 64 bits. adds 9b23024c8b5 Use new FailedWithMessage matcher in DWARFDebugLineTest.cpp adds 8f46269f0c1 [profile] Don't dump counters when forking and don't reset [...] adds 6e561d1c94e [Intrinsic] Add fixed point saturating division intrinsics. adds bc1947a6f51 Add a basic tiling pass for parallel loops adds 3ac37eb9a93 Silence compiler warnings adds f2ff153401f [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions adds 8c893cac3f6 [ORC] Remove spammy debug print adds a4370b2ec46 Use temporary directory for tests in D74346 adds eaa41e103c5 [CostModel][X86] Try to check against common prefixes befor [...] adds f287bb8cf5e [ARM] FP16 bitcast test. NFC adds 12fed51c080 [ARM,MVE] Remove 64-bit variants of vbrsrq* intrinsics adds bd5b22070b6 Fix TryParsePtrOperatorSeq. adds a67eb221e22 [RDA][ARM][LowOverheadLoops] Iteration count IT blocks adds f87f23c81ca [AArch64][SVE] Add the SVE dupq_lane intrinsic adds 7efabe5c7de [MIR][ARM] MachineOperand comments adds b82438872b1 [CostModel][X86] We don't need a scale factor for SLM extra [...] adds c8dadac228b add release notes for ffp-model and ffp-exception-behavior adds 8bee52bdb54 [AIX][Frontend] C++ ABI customizations for AIX boilerplate adds d66d25f8382 [OpenMP] Refactor the analysis in checkMapClauseBaseExpress [...] adds 54fa9ecd308 [libc++] Implementation of C++20's P1135R6 for libcxx adds 80e73f22956 [libc++] Adapt a few things around the implementation of P1135R6 adds c0087164175 [libc++] Mark the C++03 version of std::function as deprecated adds c9c09ef836b [lldb/DWARF] Fix dwp search path in the separate-debug-file case

No new revisions were added by this update.

Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 10 +- clang-tools-extra/clang-tidy/rename_check.py | 32 +- clang-tools-extra/clangd/ClangdServer.cpp | 73 +- clang-tools-extra/clangd/ClangdServer.h | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 10 +- clang-tools-extra/clangd/Hover.cpp | 7 +- clang-tools-extra/clangd/Selection.cpp | 76 +- clang-tools-extra/clangd/Selection.h | 49 +- clang-tools-extra/clangd/SemanticSelection.cpp | 3 +- clang-tools-extra/clangd/XRefs.cpp | 86 +- clang-tools-extra/clangd/refactor/Rename.cpp | 10 +- clang-tools-extra/clangd/refactor/Tweak.cpp | 6 +- clang-tools-extra/clangd/refactor/Tweak.h | 2 +- .../clangd/unittests/FindTargetTests.cpp | 14 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 17 + .../clangd/unittests/SelectionTests.cpp | 71 +- .../clangd/unittests/TweakTesting.cpp | 57 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 6 + clang-tools-extra/docs/ReleaseNotes.rst | 1 - clang/docs/ReleaseNotes.rst | 7 + clang/include/clang-c/Platform.h | 20 +- clang/include/clang/AST/CommentSema.h | 3 + clang/include/clang/ASTMatchers/GtestMatchers.h | 45 + clang/include/clang/Basic/TargetCXXABI.h | 12 + clang/include/clang/Basic/arm_mve.td | 2 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Driver/Options.td | 11 +- clang/include/clang/Frontend/CompilerInstance.h | 3 +- clang/include/clang/Parse/Parser.h | 7 +- clang/lib/AST/ASTContext.cpp | 2 + clang/lib/AST/ASTImporter.cpp | 26 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 12 +- clang/lib/AST/CMakeLists.txt | 2 +- clang/lib/AST/CommentSema.cpp | 48 +- .../lib/AST/Interp/{Block.cpp => InterpBlock.cpp} | 2 +- clang/lib/AST/Interp/{Block.h => InterpBlock.h} | 2 +- clang/lib/AST/Interp/Pointer.cpp | 2 +- clang/lib/AST/Interp/Pointer.h | 4 +- clang/lib/ASTMatchers/CMakeLists.txt | 1 + clang/lib/ASTMatchers/GtestMatchers.cpp | 104 ++ clang/lib/Basic/Targets/AArch64.cpp | 7 + clang/lib/Basic/Targets/Hexagon.cpp | 2 + clang/lib/Basic/Targets/OSTargets.h | 2 + clang/lib/Basic/Targets/X86.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 2 - clang/lib/CodeGen/CodeGenModule.cpp | 1 + clang/lib/CodeGen/ItaniumCXXABI.cpp | 21 + clang/lib/Driver/ToolChains/Clang.cpp | 27 +- clang/lib/Driver/ToolChains/Darwin.cpp | 4 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 2 +- clang/lib/Driver/ToolChains/Hurd.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/Solaris.cpp | 2 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/FormatTokenLexer.cpp | 35 + clang/lib/Format/FormatTokenLexer.h | 1 + clang/lib/Frontend/ChainedIncludesSource.cpp | 2 +- clang/lib/Frontend/CompilerInstance.cpp | 4 +- clang/lib/Frontend/CompilerInvocation.cpp | 13 +- clang/lib/Frontend/FrontendAction.cpp | 4 +- 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llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 12 - .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- .../JITLink/BasicGOTAndStubsBuilder.h | 30 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 114 +- llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.h | 105 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 106 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 36 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 20 + llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 27 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 30 + .../Orc/RTDyldObjectLinkingLayer.cpp | 3 +- llvm/lib/ExecutionEngine/OrcError/OrcError.cpp | 4 + llvm/lib/IR/BasicBlock.cpp | 2 +- llvm/lib/IR/ConstantFold.cpp | 6 +- llvm/lib/IR/Dominators.cpp | 14 +- llvm/lib/IR/Verifier.cpp | 6 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 19 +- llvm/lib/MC/MCParser/MasmParser.cpp | 77 +- llvm/lib/MC/XCOFFObjectWriter.cpp | 26 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 38 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 +- llvm/lib/Passes/StandardInstrumentations.cpp | 16 +- llvm/lib/Support/ARMAttributeParser.cpp | 8 +- llvm/lib/Support/YAMLTraits.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 183 +++ llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 167 ++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 65 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 26 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 19 + llvm/lib/Target/AArch64/AArch64InstrInfo.h | 31 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 231 ++- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 3 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 20 +- .../MCTargetDesc/AArch64MachObjectWriter.cpp | 2 +- llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 121 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 4 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp | 9 + llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 13 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 311 +++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 10 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 54 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 61 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 18 + llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 5 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 108 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 35 +- .../Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 12 +- llvm/lib/Target/ARM/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/ARM/README-Thumb.txt | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 40 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 2 +- llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 3 +- llvm/lib/Target/PowerPC/MCTargetDesc/LLVMBuild.txt | 2 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 8 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 16 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 269 +-- llvm/lib/Target/PowerPC/README.txt | 61 - llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 143 +- llvm/lib/Target/SystemZ/SystemZFrameLowering.h | 9 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 17 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 261 ++- llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 2 +- .../WebAssemblyFixIrreducibleControlFlow.cpp | 28 +- llvm/lib/Target/X86/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 306 ++-- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 10 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 2 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 157 ++ llvm/lib/Target/X86/X86ISelLowering.cpp | 689 +++++--- llvm/lib/Target/X86/X86ISelLowering.h | 105 +- llvm/lib/Target/X86/X86InstrAVX512.td | 99 +- llvm/lib/Target/X86/X86InstrCompiler.td | 8 +- llvm/lib/Target/X86/X86InstrFormats.td | 1 + llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 107 +- llvm/lib/Target/X86/X86InstrInfo.td | 10 +- llvm/lib/Target/X86/X86InstrSSE.td | 57 +- llvm/lib/Target/X86/X86InstrSystem.td | 12 +- llvm/lib/Target/X86/X86InstrTSX.td | 4 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 2 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 1 + llvm/lib/Target/XCore/XCoreInstrInfo.td | 3 + llvm/lib/Transforms/IPO/Attributor.cpp | 8 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 97 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 7 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 4 +- .../InstCombine/InstructionCombining.cpp | 36 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 143 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 23 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 7 + llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 3 +- llvm/lib/Transforms/Utils/CloneFunction.cpp | 7 +- llvm/lib/Transforms/Utils/InjectTLIMappings.cpp | 9 - llvm/lib/Transforms/Utils/KnowledgeRetention.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 29 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 9 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 213 +-- .../ConstantFolding}/fp-undef.ll | 314 ++-- .../Analysis/CostModel/SystemZ/oldarch-vectors.ll | 13 + .../CostModel/X86/alternate-shuffle-cost.ll | 130 +- llvm/test/Analysis/CostModel/X86/arith-fix.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-fp.ll | 61 +- llvm/test/Analysis/CostModel/X86/arith-overflow.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-ssat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith-usat.ll | 6 +- llvm/test/Analysis/CostModel/X86/arith.ll | 354 +--- llvm/test/Analysis/CostModel/X86/div.ll | 40 +- llvm/test/Analysis/CostModel/X86/extend.ll | 2 +- llvm/test/Analysis/CostModel/X86/fcmp.ll | 214 +-- llvm/test/Analysis/CostModel/X86/fptosi.ll | 168 +- llvm/test/Analysis/CostModel/X86/fptoui.ll | 216 +-- llvm/test/Analysis/CostModel/X86/fround.ll | 57 +- llvm/test/Analysis/CostModel/X86/fshl.ll | 4 +- llvm/test/Analysis/CostModel/X86/fshr.ll | 4 +- llvm/test/Analysis/CostModel/X86/icmp.ll | 6 +- llvm/test/Analysis/CostModel/X86/rem.ll | 78 +- .../Analysis/CostModel/X86/shuffle-broadcast.ll | 2 +- .../CostModel/X86/shuffle-extract_subvector.ll | 242 +-- .../CostModel/X86/shuffle-insert_subvector.ll | 30 +- .../test/Analysis/CostModel/X86/shuffle-reverse.ll | 2 +- .../Analysis/CostModel/X86/shuffle-single-src.ll | 8 +- .../Analysis/CostModel/X86/shuffle-transpose.ll | 14 +- .../test/Analysis/CostModel/X86/shuffle-two-src.ll | 16 +- llvm/test/Analysis/CostModel/X86/sitofp.ll | 59 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 25 +- llvm/test/Analysis/CostModel/X86/uitofp.ll | 52 +- llvm/test/Analysis/CostModel/X86/vector-extract.ll | 305 ++-- llvm/test/Analysis/CostModel/X86/vector-insert.ll | 115 +- .../Analysis/CostModel/X86/vshift-ashr-cost.ll | 58 +- .../Analysis/CostModel/X86/vshift-lshr-cost.ll | 58 +- .../test/Analysis/CostModel/X86/vshift-shl-cost.ll | 66 +- .../MemoryDependenceAnalysis/memdep_with_tbaa.ll | 125 ++ llvm/test/CodeGen/AArch64/O0-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 + llvm/test/CodeGen/AArch64/sat-add.ll | 34 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 139 ++ .../sve-intrinsics-contiguous-prefetches.ll | 252 +++ .../AArch64/sve-intrinsics-fp-arith-merging.ll | 261 +++ .../CodeGen/AArch64/sve-intrinsics-perm-select.ll | 181 +++ ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 622 +++++++ ...pred-contiguous-ldst-addressing-mode-reg-reg.ll | 610 +++++++ ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 171 ++ ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 145 ++ llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 101 +- llvm/test/CodeGen/AArch64/sve-vscale-combine.ll | 97 ++ llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll | 284 ++++ .../test/CodeGen/AArch64/sve2-intrinsics-crypto.ll | 99 ++ .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 4 +- .../AMDGPU/GlobalISel/constant-bus-restriction.ll | 67 + llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll | 542 +++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll | 619 +++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir | 54 +- .../inst-select-build-vector-trunc.v2s16.mir | 272 +++- .../AMDGPU/GlobalISel/inst-select-fadd.s32.mir | 90 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 90 +- .../GlobalISel/inst-select-fcanonicalize.mir | 14 +- .../GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir | 11 +- .../GlobalISel/inst-select-fmaxnum.v2s16.mir | 11 +- .../GlobalISel/inst-select-fminnum-ieee.v2s16.mir | 10 +- .../GlobalISel/inst-select-fminnum.v2s16.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir | 74 + .../AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir | 54 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-shl.v2s16.mir | 55 +- .../inst-select-shuffle-vector.v2s16.mir | 740 +++++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir | 306 +++- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 183 +++ .../AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll | 136 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll | 388 +++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll | 141 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll | 94 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll | 388 +++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll | 141 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll | 94 ++ .../AMDGPU/GlobalISel/regbankselect-smax.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-smin.mir | 94 +- .../AMDGPU/GlobalISel/regbankselect-umax.mir | 96 +- .../AMDGPU/GlobalISel/regbankselect-umin.mir | 96 +- llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll | 272 ++++ llvm/test/CodeGen/AMDGPU/hsa.ll | 3 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 35 + llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir | 34 +- .../CodeGen/ARM/GlobalISel/arm-call-lowering.ll | 73 +- .../ARM/GlobalISel/arm-instruction-select-cmp.mir | 484 +++--- .../GlobalISel/arm-instruction-select-combos.mir | 295 ++-- .../ARM/GlobalISel/arm-instruction-select.mir | 545 +++---- .../CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 48 +- .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 72 +- .../CodeGen/ARM/GlobalISel/arm-param-lowering.ll | 130 +- .../arm-select-copy_to_regclass-of-fptosi.mir | 4 +- .../ARM/GlobalISel/arm-select-globals-pic.mir | 16 +- .../GlobalISel/arm-select-globals-ropi-rwpi.mir | 32 +- .../ARM/GlobalISel/arm-select-globals-static.mir | 12 +- .../GlobalISel/irtranslator-varargs-lowering.ll | 30 +- llvm/test/CodeGen/ARM/GlobalISel/select-clz.mir | 6 +- .../CodeGen/ARM/GlobalISel/select-fp-const.mir | 28 +- llvm/test/CodeGen/ARM/GlobalISel/select-fp.mir | 108 +- llvm/test/CodeGen/ARM/GlobalISel/select-neon.mir | 27 +- llvm/test/CodeGen/ARM/GlobalISel/select-pkhbt.mir | 36 +- .../test/CodeGen/ARM/GlobalISel/select-pr35926.mir | 17 +- llvm/test/CodeGen/ARM/GlobalISel/select-revsh.mir | 4 +- .../GlobalISel/thumb-instruction-select-cmp.mir | 121 +- .../ARM/GlobalISel/thumb-select-arithmetic-ops.mir | 125 +- .../CodeGen/ARM/GlobalISel/thumb-select-br.mir | 26 +- .../CodeGen/ARM/GlobalISel/thumb-select-exts.mir | 259 +-- .../ARM/GlobalISel/thumb-select-globals-pic.mir | 28 +- .../GlobalISel/thumb-select-globals-ropi-rwpi.mir | 32 +- .../ARM/GlobalISel/thumb-select-globals-static.mir | 12 +- .../CodeGen/ARM/GlobalISel/thumb-select-imm.mir | 28 +- .../ARM/GlobalISel/thumb-select-load-store.mir | 81 +- .../ARM/GlobalISel/thumb-select-logical-ops.mir | 81 +- .../CodeGen/ARM/GlobalISel/thumb-select-select.mir | 35 +- .../CodeGen/ARM/GlobalISel/thumb-select-shifts.mir | 38 +- llvm/test/CodeGen/ARM/cmp1-peephole-thumb.mir | 22 +- llvm/test/CodeGen/ARM/cmpxchg.mir | 33 +- llvm/test/CodeGen/ARM/codesize-ifcvt.mir | 94 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 10 +- llvm/test/CodeGen/ARM/constant-islands-cfg.mir | 29 +- .../test/CodeGen/ARM/constant-islands-split-IT.mir | 53 +- llvm/test/CodeGen/ARM/expand-pseudos.mir | 29 +- llvm/test/CodeGen/ARM/fp16-bitcast.ll | 60 + llvm/test/CodeGen/ARM/fpoffset_overflow.mir | 99 +- .../ARM/ifcvt-diamond-unanalyzable-common.mir | 42 +- .../CodeGen/ARM/ifcvt_diamond_unanalyzable.mir | 20 +- .../ARM/ifcvt_forked_diamond_unanalyzable.mir | 36 +- .../ARM/ifcvt_simple_bad_zero_prob_succ.mir | 28 +- .../test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir | 17 +- .../test/CodeGen/ARM/ifcvt_triangleSameCvtNext.mir | 30 +- .../CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir | 43 +- .../CodeGen/ARM/load_store_opt_clobber_cpsr.mir | 8 +- llvm/test/CodeGen/ARM/load_store_opt_kill.mir | 7 +- llvm/test/CodeGen/ARM/load_store_opt_reg_limit.mir | 6 +- llvm/test/CodeGen/ARM/machine-copyprop.mir | 15 +- llvm/test/CodeGen/ARM/peephole-phi.mir | 86 +- .../ARM/regcoal-invalid-subrange-update.mir | 2 +- .../CodeGen/ARM/register-scavenger-exceptions.mir | 22 +- llvm/test/CodeGen/ARM/tail-dup-bundle.mir | 39 +- llvm/test/CodeGen/ARM/tst-peephole.mir | 18 +- llvm/test/CodeGen/ARM/vldm-liveness.mir | 9 +- .../Hexagon/autohvx/vector-predicate-typecast.ll | 31 + llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir | 35 +- llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 18 +- llvm/test/CodeGen/PowerPC/aix-undef-func-call.ll | 20 + llvm/test/CodeGen/PowerPC/vrsave-inline-asm.ll | 42 + llvm/test/CodeGen/SystemZ/frame-23.ll | 20 + llvm/test/CodeGen/SystemZ/frame-24.ll | 72 + llvm/test/CodeGen/SystemZ/frameaddr-02.ll | 54 + llvm/test/CodeGen/Thumb/peephole-cmp.mir | 133 +- llvm/test/CodeGen/Thumb/peephole-mi.mir | 191 ++- .../CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir | 28 +- .../CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir | 14 +- .../Thumb2/LowOverheadLoops/disjoint-vcmp.mir | 38 +- .../Thumb2/LowOverheadLoops/dont-ignore-vctp.mir | 14 +- .../LowOverheadLoops/dont-remove-loop-update.mir | 26 +- .../LowOverheadLoops/dont-remove-loop-update2.mir | 12 +- .../LowOverheadLoops/end-positive-offset.mir | 76 +- .../Thumb2/LowOverheadLoops/extending-loads.ll | 229 +++ .../Thumb2/LowOverheadLoops/extract-element.mir | 29 +- .../Thumb2/LowOverheadLoops/incorrect-sub-16.mir | 20 +- .../Thumb2/LowOverheadLoops/incorrect-sub-32.mir | 20 +- .../Thumb2/LowOverheadLoops/incorrect-sub-8.mir | 20 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-1.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-2.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-3.mir | 30 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-1.mir | 32 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-2.mir | 32 +- .../Thumb2/LowOverheadLoops/it-block-chain.mir | 29 +- .../Thumb2/LowOverheadLoops/it-block-itercount.mir | 23 +- .../Thumb2/LowOverheadLoops/it-block-mov.mir | 218 +++ .../Thumb2/LowOverheadLoops/it-block-random.mir | 27 +- .../LowOverheadLoops/livereg-no-loop-def.mir | 10 +- .../LowOverheadLoops/loop-dec-copy-chain.mir | 162 +- .../loop-dec-copy-prev-iteration.mir | 160 +- .../Thumb2/LowOverheadLoops/loop-dec-liveout.mir | 158 +- .../Thumb2/LowOverheadLoops/matrix-debug.mir | 52 +- .../CodeGen/Thumb2/LowOverheadLoops/matrix.mir | 130 +- .../Thumb2/LowOverheadLoops/mov-after-dls.mir | 14 +- .../Thumb2/LowOverheadLoops/mov-lr-terminator.mir | 20 +- .../LowOverheadLoops/move-def-before-start.mir | 22 +- .../LowOverheadLoops/move-start-after-def.mir | 26 +- .../Thumb2/LowOverheadLoops/multiple-do-loops.mir | 100 +- .../Thumb2/LowOverheadLoops/no-dec-cbnz.mir | 183 ++- .../Thumb2/LowOverheadLoops/no-vpsel-liveout.mir | 27 +- .../Thumb2/LowOverheadLoops/non-masked-load.mir | 34 +- .../Thumb2/LowOverheadLoops/non-masked-store.mir | 22 +- .../Thumb2/LowOverheadLoops/out-of-range-cbz.mir | 106 +- .../Thumb2/LowOverheadLoops/predicated-liveout.mir | 12 +- .../Thumb2/LowOverheadLoops/remove-elem-moves.mir | 80 +- .../Thumb2/LowOverheadLoops/revert-non-header.mir | 4 +- .../Thumb2/LowOverheadLoops/revert-while.mir | 26 +- .../Thumb2/LowOverheadLoops/safe-def-no-mov.mir | 16 +- .../CodeGen/Thumb2/LowOverheadLoops/size-limit.mir | 22 +- .../CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir | 30 +- .../LowOverheadLoops/unrolled-and-vector.mir | 146 +- .../LowOverheadLoops/unsafe-cpsr-loop-def.mir | 30 +- .../LowOverheadLoops/unsafe-cpsr-loop-use.mir | 32 +- .../Thumb2/LowOverheadLoops/unsafe-use-after.mir | 22 +- .../LowOverheadLoops/vctp-add-operand-liveout.mir | 30 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir | 32 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt.mir | 20 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir | 8 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir | 8 +- .../Thumb2/LowOverheadLoops/vctp-subri12.mir | 8 +- .../Thumb2/LowOverheadLoops/vctp16-reduce.mir | 36 +- .../Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir | 12 +- .../Thumb2/LowOverheadLoops/vmldava_in_vpt.mir | 16 +- .../test/CodeGen/Thumb2/LowOverheadLoops/while.mir | 14 +- .../test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir | 56 +- .../LowOverheadLoops/wrong-liveout-lsr-shift.mir | 35 +- .../LowOverheadLoops/wrong-vctp-opcode-liveout.mir | 34 +- .../wrong-vctp-operand-liveout.mir | 28 +- llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir | 108 +- llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir | 10 +- llvm/test/CodeGen/Thumb2/high-reg-spill.mir | 15 +- llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 48 +- llvm/test/CodeGen/Thumb2/mve-stacksplot.mir | 20 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir | 6 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-2-preds.mir | 6 +- .../CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir | 4 +- .../mve-vpt-2-blocks-non-consecutive-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir | 4 +- .../CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-4-ins.mir | 4 +- .../CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir | 12 +- llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir | 4 +- llvm/test/CodeGen/Thumb2/mve-vpt-nots.mir | 12 +- llvm/test/CodeGen/Thumb2/mve-vpt-preuse.mir | 6 +- llvm/test/CodeGen/Thumb2/peephole-addsub.mir | 15 +- llvm/test/CodeGen/Thumb2/peephole-cmp.mir | 19 +- llvm/test/CodeGen/Thumb2/t2-teq-reduce.mir | 62 +- llvm/test/CodeGen/Thumb2/t2sizereduction.mir | 18 +- llvm/test/CodeGen/X86/atomic-fp.ll | 312 ++-- llvm/test/CodeGen/X86/atomic-load-store-wide.ll | 37 +- llvm/test/CodeGen/X86/atomic-mi.ll | 501 ++---- llvm/test/CodeGen/X86/atomic-non-integer.ll | 142 +- llvm/test/CodeGen/X86/avg.ll | 4 +- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 2 +- llvm/test/CodeGen/X86/avx-splat.ll | 2 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 433 +++++ llvm/test/CodeGen/X86/avx512-select.ll | 178 ++ .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 28 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 10 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 10 +- llvm/test/CodeGen/X86/cmov-fp.ll | 1608 ++++++++++++++---- llvm/test/CodeGen/X86/extractelement-load.ll | 6 +- llvm/test/CodeGen/X86/fma.ll | 40 +- llvm/test/CodeGen/X86/h-register-addressing-32.ll | 51 +- llvm/test/CodeGen/X86/h-register-addressing-64.ll | 58 +- llvm/test/CodeGen/X86/half.ll | 57 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 2 +- llvm/test/CodeGen/X86/machine-sink.ll | 1 + llvm/test/CodeGen/X86/masked_gather.ll | 97 +- .../CodeGen/X86/merge-consecutive-loads-128.ll | 29 +- llvm/test/CodeGen/X86/pr34653.ll | 123 +- llvm/test/CodeGen/X86/pr44976.ll | 85 + llvm/test/CodeGen/X86/recip-fastmath.ll | 68 +- llvm/test/CodeGen/X86/recip-fastmath2.ll | 80 +- llvm/test/CodeGen/X86/sat-add.ll | 32 +- llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 1411 ++++++++++++++++ llvm/test/CodeGen/X86/select-mmx.ll | 35 +- llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 143 +- llvm/test/CodeGen/X86/udiv_fix_sat.ll | 528 ++++++ llvm/test/CodeGen/X86/vec_fneg.ll | 2 - llvm/test/CodeGen/X86/vector-half-conversions.ll | 1713 +------------------- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 3 +- llvm/test/CodeGen/X86/x86-interleaved-access.ll | 299 ++++ llvm/test/CodeGen/XCore/bitrev.ll | 55 + .../MIR/ARM/live-debug-values-reg-copy.mir | 2 +- .../Inputs/MachO_GOTAndStubsOptimizationHelper.s | 8 + .../JITLink/X86/MachO_GOTAndStubsOptimization.s | 31 + .../JITLink/X86/MachO_x86-64_relocations.s | 12 +- .../OrcLazy/static-initializers-in-objectfiles.ll | 28 + llvm/test/MC/AArch64/SVE2/bsl-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/bsl1n-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/bsl2n-diagnostics.s | 12 +- llvm/test/MC/AArch64/SVE2/nbsl-diagnostics.s | 12 +- llvm/test/MC/ELF/exclude-debug-dwo.s | 14 +- llvm/test/MC/ELF/section-entsize-changed.s | 12 + llvm/test/MC/ELF/section-flags-changed.s | 12 + llvm/test/MC/ELF/section-type-changed.s | 11 + llvm/test/Other/cfg_deopt_unreach.ll | 35 + llvm/test/Other/module-pass-printer.ll | 40 +- llvm/test/Transforms/Attributor/liveness.ll | 1 + .../CodeGenPrepare/AArch64/overflow-intrinsics.ll | 16 +- .../CodeGenPrepare/X86/overflow-intrinsics.ll | 31 +- .../MSSA/OverwriteStoreBegin.ll | 1 - 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