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from 1d6e2d991dc libstdc++: Fix testsuite for remote testing (and sim) new 4cbbce04568 RISC-V: Allow LICM hoist POLY_INT configuration code sequence new e589ffb6d78 RISC-V: Error early with V and no M extension.
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Summary of changes: gcc/config/riscv/riscv.cc | 14 +++++++---- gcc/testsuite/gcc.target/riscv/arch-31.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-32.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-37.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-38.c | 2 +- gcc/testsuite/gcc.target/riscv/compare-debug-1.c | 2 +- gcc/testsuite/gcc.target/riscv/compare-debug-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 6 ++--- gcc/testsuite/gcc.target/riscv/predef-15.c | 4 ++-- gcc/testsuite/gcc.target/riscv/predef-16.c | 4 ++-- gcc/testsuite/gcc.target/riscv/predef-26.c | 6 ++++- gcc/testsuite/gcc.target/riscv/predef-27.c | 6 ++++- gcc/testsuite/gcc.target/riscv/predef-32.c | 6 ++++- gcc/testsuite/gcc.target/riscv/predef-33.c | 6 ++++- gcc/testsuite/gcc.target/riscv/predef-36.c | 6 ++++- gcc/testsuite/gcc.target/riscv/predef-37.c | 6 ++++- .../gcc.target/riscv/rvv/autovec/poly_licm-1.c | 18 +++++++++++++++ .../gcc.target/riscv/rvv/autovec/poly_licm-2.c | 27 ++++++++++++++++++++++ .../riscv/rvv/autovec/poly_licm-3.c} | 6 ++--- .../gcc.target/riscv/rvv/autovec/pr111486.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/base/pr116036.c | 11 +++++++++ 21 files changed, 112 insertions(+), 28 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-2.c copy gcc/testsuite/{gcc.c-torture/compile/20020706-2.c => gcc.target/riscv/rvv/aut [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr116036.c