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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project.
from 5c10d7361c1 Merging r369251: ------------------------------------------ [...] adds f3a5f2397d6 Merging r369537: ------------------------------------------ [...] adds 74ed1f26415 Merging r369093: ------------------------------------------ [...] adds 79c1eb90116 Merging r369095: ------------------------------------------ [...] new ee7601a873d Merging r369426 and r369443:
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/lib/Basic/Targets/RISCV.cpp | 4 ++++ clang/test/CodeGen/riscv-inline-asm.c | 6 ++++++ libcxx/include/__threading_support | 7 ++++-- llvm/include/llvm/IR/InlineAsm.h | 1 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 3 +++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 17 +++++++++++++++ llvm/lib/Target/RISCV/RISCVISelLowering.h | 3 +++ llvm/lib/Target/TargetMachine.cpp | 8 ++++--- llvm/lib/Target/X86/X86Subtarget.cpp | 3 +++ .../propagate-attributes-bitcast-function.ll | 2 +- .../CodeGen/AMDGPU/propagate-attributes-clone.ll | 2 +- .../AMDGPU/propagate-attributes-single-set.ll | 2 +- llvm/test/CodeGen/Hexagon/pic-jt-big.ll | 2 +- llvm/test/CodeGen/Hexagon/pic-sdata.ll | 4 ++-- llvm/test/CodeGen/RISCV/inline-asm.ll | 25 ++++++++++++++++++++++ llvm/test/CodeGen/SPARC/tls.ll | 18 ++++++++-------- llvm/test/CodeGen/X86/mingw-refptr.ll | 7 ++++++ 17 files changed, 94 insertions(+), 20 deletions(-)