[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (9c68eddbbe7 -> 14cf2b20ca6)

3 Sep 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig
in repository toolchain/ci/llvm-project.
from  9c68eddbbe7 [AMDGPU][MC][GFX10] Enabled null with 64-bit operands
      adds  4b9233cafbd [llvm-nm] - Add a test case for case when we dump a symbol  [...]
      adds  b567ce76804 Revert r370661 "[llvm-nm] - Add a test case for case when w [...]
      adds  a291b950dbd [FileCheck] Forbid using var defined on same line
      adds  efa1ca2c25d [FileCheck] Make NumericVariable ctor explicit
      adds  4aa90ea58ef [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null
      adds  6e18266aa4d Partially revert D61491 "AMDGPU: Be explicit about whether  [...]
      adds  4e54cf3e0e7 [DAGCombiner] try to form test+set out of shift+mask patterns
      adds  78e8011a29d Recommit r370661 "[llvm-nm] - Add a test case for case when [...]
      adds  fb5661a8848 [X86] getPMOVMSKB - add MVT::v64i8 handling and remove from [...]
      adds  4fa267bcbb6 ThinLTO: Document the option BOOTSTRAP_LLVM_ENABLE_LTO
      adds  da4ef9b4c86 [SVE][Inline-Asm] Support for SVE asm operands
      adds  b21e2457114 [SystemZ] Support constrained fpto[su]i intrinsics
      adds  13190c42253 [TargetLowering][PS4] Add sincos(f) lib functions when targ [...]
      adds  a95ec59fa5e [ARM] Use MQPR not QPR for MVE registers
      adds  d94b42f4228 [Wdocumentation] fixes an assertion failure with typedefed  [...]
      adds  a5fd8d8f47d [ARM] MVE predicate bitcast test and VPSEL adjustment. NFC
      adds  45cd1851097 [X86] Enable fp128 as a legal type with SSE1 rather than with MMX.
      adds  cacf4db571d [CostModel][X86] Add scalar sext/zext cost tests
      adds  34a38a3b543 Split -Wreorder into different warnings for reordering a co [...]
      adds  ea366122d28 Rename -Wc++20-designator to -Wc++2a-designator for consist [...]
      adds  dea9cad10e0 [x86] Fix bugs of some intrinsic functions in CLANG : _mm51 [...]
      adds  dcecc7ea468 [X86] Custom promote i32->f80 uint_to_fp on AVX512 64-bit targets.
      adds  9c74c774044 [LegalizeDAG] Pass DAG to two calls to SDNode::dump in debu [...]
      adds  f255f443361 [X86] Add an exhaustive test for i32 fptosi/fptoui across d [...]
      adds  9dc8c448ed4 [X86] Don't use Expand for i32 fp_to_uint on SSE1/2 targets [...]
      adds  b915109043d [X86] Simplify the setOperationAction handling for fp_to_ui [...]
      adds  13edbbe2faa [lldb][NFC] Remove setup boilerplate from types/ tests
      adds  8b2df85d023 [ARM] Select vmla
      adds  935499579c2 [MachinePipeliner] Add a way to unit-test the schedule emitter
      adds  b10a433da85 [lldb][NFC] Unify log files in commands/log/basic
      adds  0469b0e4ef7 [LV] Tail-folding with runtime memory checks
      adds  03c9e139c7a [RISCV] Correct Logic around ilp32e macros
      adds  718f909ccd0 [LV] Tail-folding, runtime scev checks
      adds  d77ea5b297a [lldb] Test 'command' commands and fix the found crashes
      adds  7a65f5ebee3 [ARM NEON] Avoid duplicated decarations
      adds  e76113347de [lldb][NFC] Also test unaliasing in nested_alias test
      adds  b78900e0ab5 [lldb][NFC] Simplify script_alias test
      adds  253eecf525f [lldb][NFC] Remove unnecessary constructors from invalid-ar [...]
      adds  0760d348eb7 [LV] Precommit test case showing miscompile from PR43166. NFC
      adds  dd18ce4501e [LV] Fix miscompiles by adding non-header PHI nodes to AllowedExit
      adds  07ae1bd711a [lldb][NFC] Test that enabling all log options doesn't cras [...]
      adds  855caf2335c [ARM] More MVE load/store tests for offsets around the nega [...]
      adds  39bf484d92b Bug fix on function epilog optimization (ARM backend)
      adds  3be2df2418e [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredict [...]
      adds  3e8d5f335da [ARM] Fix MVE ldst offset ranges
      adds  99f9f1f2d81 [lldb][NFC] Test 'command delete'
      adds  607c92afdab [lldb] Test 'frame select -r' and fix that INT32_MIN breaks [...]
      adds  25d5b54542e [mips] Switch to the `.text` section after emitting asm fil [...]
      adds  c50da3d0525 Added fixit notes for -Wfinal-dtor-non-final-class
      adds  a1ae7e37347 [ARM] Add csel tests. NFC
      adds  57cc65ff472 [ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions.
      adds  54904aba474 Fixit for -Wfinal-dtor-non-final-class
      adds  61973d978bf [ARM] Invert CSEL predicates if the opposite is a simpler c [...]
      adds  f12415812c0 [SystemZ]  Add support for fentry.
      adds  92b2be1e923 [OpenCL] Drop spurious semicolon in generated file; NFC
      adds  2f3574c1689 [ARM] Ignore Implicit CPSR regs when lowering from Machine  [...]
      adds  489cc589c55 [clangd] Add targetDecl(), which determines what declaratio [...]
      adds  3276fffc170 [lldb] Replace std::call_once() with llvm::call_once()
      adds  5f9aea72d6f gn build: Merge r370746
      adds  54b989cf988 Fix MSVC "not all control paths return a value" warning. NFCI.
      adds  600f5c57272 gn build: (manually) merge r370499
      adds  a0a811739dd [SystemZ]  Recognize INLINEASM_BR in backend.
      adds  14cf2b20ca6 compiler-rt: use more __sanitizer_time_t on FreeBSD
No new revisions were added by this update.
Summary of changes:
 clang-tools-extra/clangd/CMakeLists.txt            |    1 +
 clang-tools-extra/clangd/FindTarget.cpp            |  382 ++++++
 clang-tools-extra/clangd/FindTarget.h              |  144 +++
 clang-tools-extra/clangd/unittests/ASTTests.cpp    |    1 -
 clang-tools-extra/clangd/unittests/CMakeLists.txt  |    1 +
 .../clangd/unittests/FindTargetTests.cpp           |  469 +++++++
 clang/docs/ThinLTO.rst                             |    4 +
 clang/include/clang/Basic/DiagnosticGroups.td      |    8 +-
 clang/include/clang/Basic/DiagnosticSemaKinds.td   |    4 +-
 clang/lib/AST/CommentSema.cpp                      |    8 +
 clang/lib/Basic/Targets/RISCV.cpp                  |    5 +-
 clang/lib/Headers/avx512fintrin.h                  |    6 +-
 clang/lib/Sema/SemaDeclCXX.cpp                     |   11 +-
 clang/test/CodeGen/avx512f-builtins.c              |   17 +
 clang/test/Sema/warn-documentation.cpp             |   31 +
 clang/test/Sema/warn-documentation.m               |    8 +
 .../test/SemaCXX/cxx2a-initializer-aggregates.cpp  |   19 +-
 .../SemaCXX/warn-final-dtor-non-final-class.cpp    |    2 +
 clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp |    2 +-
 clang/utils/TableGen/NeonEmitter.cpp               |   25 +-
 .../sanitizer_platform_limits_freebsd.h            |   22 +-
 .../commands/command/delete/TestCommandDelete.py   |   17 +
 .../command/invalid-args/TestInvalidArgsCommand.py |   58 +
 .../command/nested_alias/TestNestedAlias.py        |    9 +
 .../command/script_alias/TestCommandScriptAlias.py |    5 +-
 .../invalid-args/TestInvalidArgsExpression.py      |    3 -
 .../select}/Makefile                               |    0
 .../test/commands/frame/select/TestFrameSelect.py  |   37 +
 .../lldbsuite/test/commands/frame/select/main.cpp  |   16 +
 .../test/commands/log/basic/TestLogging.py         |   27 +-
 .../log/invalid-args/TestInvalidArgsLog.py         |    3 -
 .../invalid-args/TestInvalidArgsReproducer.py      |    3 -
 .../Python/lldbsuite/test/types/TestDoubleTypes.py |    8 -
 .../lldbsuite/test/types/TestDoubleTypesExpr.py    |    8 -
 .../Python/lldbsuite/test/types/TestFloatTypes.py  |    8 -
 .../lldbsuite/test/types/TestFloatTypesExpr.py     |    8 -
 .../lldbsuite/test/types/TestIntegerTypes.py       |    8 -
 .../lldbsuite/test/types/TestIntegerTypesExpr.py   |    8 -
 .../lldbsuite/test/types/TestRecursiveTypes.py     |    5 +-
 lldb/source/Commands/CommandObjectCommands.cpp     |   13 +
 lldb/source/Commands/CommandObjectFrame.cpp        |   32 +-
 lldb/source/Target/Process.cpp                     |    4 +-
 llvm/docs/CommandGuide/FileCheck.rst               |    2 +-
 llvm/docs/LangRef.rst                              |    5 +-
 llvm/include/llvm/CodeGen/ModuloSchedule.h         |   18 +
 llvm/include/llvm/InitializePasses.h               |    1 +
 llvm/include/llvm/Support/FileCheck.h              |   39 +-
 llvm/include/llvm/Target/TargetSelectionDAG.td     |   10 +
 .../Vectorize/LoopVectorizationLegality.h          |    4 +-
 llvm/lib/CodeGen/CodeGen.cpp                       |    1 +
 llvm/lib/CodeGen/MachinePipeliner.cpp              |   13 +
 llvm/lib/CodeGen/ModuloSchedule.cpp                |  114 ++
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   57 +
 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp      |    4 +-
 llvm/lib/CodeGen/TargetLoweringBase.cpp            |    5 +
 llvm/lib/Object/ObjectFile.cpp                     |    4 +-
 llvm/lib/Support/FileCheck.cpp                     |   42 +-
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp      |   25 +-
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp    |   11 +
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp       |   10 +
 llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td     |   50 +
 .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp    |    9 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |    5 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp    |    2 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp           |   58 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.h             |   14 +
 llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp        |    8 +-
 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp            |   72 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |   61 +-
 llvm/lib/Target/ARM/ARMISelLowering.h              |    5 +
 llvm/lib/Target/ARM/ARMInstrFormats.td             |    7 +
 llvm/lib/Target/ARM/ARMInstrInfo.td                |   10 +
 llvm/lib/Target/ARM/ARMInstrMVE.td                 |  195 +--
 llvm/lib/Target/ARM/ARMInstrThumb2.td              |   19 +
 llvm/lib/Target/ARM/ARMInstrVFP.td                 |   54 +-
 llvm/lib/Target/ARM/ARMMCInstLower.cpp             |    4 +-
 llvm/lib/Target/Mips/MipsAsmPrinter.cpp            |    4 +
 llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp      |   14 +
 llvm/lib/Target/SystemZ/SystemZAsmPrinter.h        |    1 +
 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp    |   16 +
 llvm/lib/Target/SystemZ/SystemZInstrFP.td          |   24 +-
 llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp       |    4 +-
 llvm/lib/Target/SystemZ/SystemZInstrVector.td      |    8 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   89 +-
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp     |    4 +
 .../Vectorize/LoopVectorizationLegality.cpp        |    1 +
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |    9 +-
 llvm/test/Analysis/CostModel/X86/extend.ll         |  158 +++
 .../CodeGen/AArch64/aarch64-sve-asm-negative.ll    |   12 +
 llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll       |   44 +
 llvm/test/CodeGen/AArch64/arm64-inline-asm.ll      |    2 +
 llvm/test/CodeGen/AMDGPU/global-constant.ll        |   42 +-
 .../AMDGPU/no-initializer-constant-addrspace.ll    |    2 +-
 .../CodeGen/AMDGPU/r600-constant-array-fixup.ll    |    4 +-
 llvm/test/CodeGen/ARM/fold-stack-adjust.ll         |   13 +
 .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir    |  151 +++
 llvm/test/CodeGen/Hexagon/tstbit.ll                |   47 +-
 llvm/test/CodeGen/Mips/start-asm-file.ll           |    1 +
 llvm/test/CodeGen/SystemZ/asm-20.ll                |   15 +
 llvm/test/CodeGen/SystemZ/fentry-insertion.ll      |   29 +
 llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll     |   40 +
 llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll     |   95 ++
 llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll     |   40 +
 llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll     |   94 ++
 llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll     |   77 ++
 llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll     |   63 +
 llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll    |   67 +
 llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll    |   29 +
 llvm/test/CodeGen/Thumb2/csel.ll                   |  340 ++++++
 llvm/test/CodeGen/Thumb2/mve-abs.ll                |   57 +-
 llvm/test/CodeGen/Thumb2/mve-fmath.ll              |   62 +-
 llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll        |  468 ++++++-
 llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll       |  417 +++++++
 llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll        |  417 +++++++
 llvm/test/CodeGen/Thumb2/mve-loadstore.ll          |    6 +-
 llvm/test/CodeGen/Thumb2/mve-minmax.ll             |   40 +-
 llvm/test/CodeGen/Thumb2/mve-phireg.ll             |  113 ++
 llvm/test/CodeGen/Thumb2/mve-pred-and.ll           |   70 +-
 llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll       |  172 +++
 llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll     |  170 ++-
 llvm/test/CodeGen/Thumb2/mve-pred-ext.ll           |   16 +-
 llvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll     |   14 +-
 llvm/test/CodeGen/Thumb2/mve-pred-not.ll           |   28 +-
 llvm/test/CodeGen/Thumb2/mve-pred-or.ll            |   56 +-
 llvm/test/CodeGen/Thumb2/mve-pred-xor.ll           |   56 +-
 llvm/test/CodeGen/Thumb2/mve-vcmp.ll               |  104 +-
 llvm/test/CodeGen/Thumb2/mve-vcmpf.ll              | 1228 ++++++++-----------
 llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll             | 1280 +++++++++-----------
 llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll             | 1208 ++++++++----------
 llvm/test/CodeGen/Thumb2/mve-vcmpr.ll              |  104 +-
 llvm/test/CodeGen/Thumb2/mve-vcmpz.ll              |   28 +-
 llvm/test/CodeGen/Thumb2/mve-vmla.ll               |   80 ++
 llvm/test/CodeGen/Thumb2/mve-vpsel.ll              |   40 +-
 llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll  |   35 +
 llvm/test/CodeGen/X86/atomic-non-integer.ll        |   74 +-
 llvm/test/CodeGen/X86/atomicf128.ll                |   32 +-
 llvm/test/CodeGen/X86/extract-store.ll             |   99 +-
 llvm/test/CodeGen/X86/fp128-cast.ll                |  216 +---
 llvm/test/CodeGen/X86/fp128-select.ll              |   60 +-
 llvm/test/CodeGen/X86/scalar-fp-to-i32.ll          | 1024 ++++++++++++++++
 llvm/test/CodeGen/X86/scalar-int-to-fp.ll          |   22 +-
 llvm/test/CodeGen/X86/sincos-opt.ll                |   27 +
 llvm/test/CodeGen/X86/test-vs-bittest.ll           |   37 +-
 llvm/test/CodeGen/X86/vec_fp_to_int.ll             |   32 +-
 llvm/test/FileCheck/numeric-expression.txt         |   28 +-
 llvm/test/MC/AMDGPU/gfx10-constant-bus.s           |    6 +
 llvm/test/MC/ARM/thumbv8.1m.s                      |   12 +
 .../test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt |  178 +++
 .../LoopVectorize/pr43166-fold-tail-by-masking.ll  |  165 +++
 llvm/test/tools/llvm-nm/format-sysv-section.test   |   30 +-
 llvm/unittests/Support/FileCheckTest.cpp           |   49 +-
 .../gn/secondary/clang-tools-extra/clangd/BUILD.gn |    1 +
 .../clang-tools-extra/clangd/unittests/BUILD.gn    |    1 +
 llvm/utils/gn/secondary/llvm/test/BUILD.gn         |    1 +
 .../gn/secondary/llvm/tools/llvm-ifs/BUILD.gn      |   11 +
 155 files changed, 8721 insertions(+), 3580 deletions(-)
 create mode 100644 clang-tools-extra/clangd/FindTarget.cpp
 create mode 100644 clang-tools-extra/clangd/FindTarget.h
 create mode 100644 clang-tools-extra/clangd/unittests/FindTargetTests.cpp
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/command/delete/Tes [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/command/invalid-ar [...]
 copy lldb/packages/Python/lldbsuite/test/commands/{expression/completion-crash-inc [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/frame/select/TestF [...]
 create mode 100644 lldb/packages/Python/lldbsuite/test/commands/frame/select/main.cpp
 create mode 100644 llvm/test/CodeGen/AArch64/aarch64-sve-asm-negative.ll
 create mode 100644 llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
 create mode 100644 llvm/test/CodeGen/Hexagon/pipeliner/swp-phi-start.mir
 create mode 100644 llvm/test/CodeGen/SystemZ/asm-20.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fentry-insertion.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/csel.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-phireg.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/mve-vmla.ll
 create mode 100644 llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
 create mode 100644 llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
 create mode 100644 llvm/test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt
 create mode 100644 llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
 create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-ifs/BUILD.gn
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (9c68eddbbe7 -> 14cf2b20ca6)